199 lines
5 KiB
C
199 lines
5 KiB
C
/**************************************************************************
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*
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* BRIEF MODULE DESCRIPTION
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* Definitions for IDT RC32434 CPU
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*
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* Copyright 2004 IDT Inc. (rischelp@idt.com)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*
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**************************************************************************
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* May 2004 rkt, neb.
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*
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* Initial Release
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*
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*
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*
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**************************************************************************
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*/
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#ifndef _RC32434_H_
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#define _RC32434_H_
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#include <linux/autoconf.h>
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#include <linux/delay.h>
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#include <asm/io.h>
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#include <asm/idt-boards/rc32434/rc32434_timer.h>
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#define RC32434_REG_BASE 0x18000000
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#define interrupt ((volatile INT_t ) INT0_VirtualAddress)
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#define idt_timer ((volatile TIM_t) TIM0_VirtualAddress)
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#define idt_gpio ((volatile GPIO_t) GPIO0_VirtualAddress)
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#define IDT_CLOCK_MULT 2
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#define MIPS_CPU_TIMER_IRQ 7
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/* Interrupt Controller */
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#define IC_GROUP0_PEND (RC32434_REG_BASE + 0x38000)
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#define IC_GROUP0_MASK (RC32434_REG_BASE + 0x38008)
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#define IC_GROUP_OFFSET 0x0C
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#define RTC_BASE 0xBA001FF0
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#define NUM_INTR_GROUPS 5
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/* 16550 UARTs */
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#define GROUP0_IRQ_BASE 8 /* GRP2 IRQ numbers start here */
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#define GROUP1_IRQ_BASE (GROUP0_IRQ_BASE + 32) /* GRP3 IRQ numbers start here */
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#define GROUP2_IRQ_BASE (GROUP1_IRQ_BASE + 32) /* GRP4 IRQ numbers start here */
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#define GROUP3_IRQ_BASE (GROUP2_IRQ_BASE + 32) /* GRP5 IRQ numbers start here */
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#define GROUP4_IRQ_BASE (GROUP3_IRQ_BASE + 32)
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#ifdef __MIPSEB__
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#define RC32434_UART0_BASE (RC32434_REG_BASE + 0x58003)
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#define EB434_UART1_BASE (0x19800003)
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#else
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#define RC32434_UART0_BASE (RC32434_REG_BASE + 0x58000)
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#define EB434_UART1_BASE (0x19800000)
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#endif
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#define RC32434_UART0_IRQ GROUP3_IRQ_BASE + 0
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#define EB434_UART1_IRQ GROUP4_IRQ_BASE + 11
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#define RC32434_NR_IRQS (GROUP4_IRQ_BASE + 32)
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/* cpu pipeline flush */
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static inline void rc32434_sync(void)
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{
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__asm__ volatile ("sync");
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}
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static inline void rc32434_sync_udelay(int us)
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{
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__asm__ volatile ("sync");
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udelay(us);
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}
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static inline void rc32434_sync_delay(int ms)
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{
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__asm__ volatile ("sync");
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mdelay(ms);
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}
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/*
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* Macros to access internal RC32434 registers. No byte
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* swapping should be done when accessing the internal
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* registers.
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*/
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#define rc32434_readb __raw_readb
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#define rc32434_readw __raw_readw
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#define rc32434_readl __raw_readl
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#define rc32434_writeb __raw_writeb
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#define rc32434_writew __raw_writew
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#define rc32434_writel __raw_writel
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#if 0
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static inline u8 rc32434_readb(unsigned long pa)
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{
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return *((volatile u8 *)KSEG1ADDR(pa));
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}
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static inline u16 rc32434_readw(unsigned long pa)
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{
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return *((volatile u16 *)KSEG1ADDR(pa));
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}
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static inline u32 rc32434_readl(unsigned long pa)
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{
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return *((volatile u32 *)KSEG1ADDR(pa));
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}
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static inline void rc32434_writeb(u8 val, unsigned long pa)
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{
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*((volatile u8 *)KSEG1ADDR(pa)) = val;
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}
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static inline void rc32434_writew(u16 val, unsigned long pa)
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{
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*((volatile u16 *)KSEG1ADDR(pa)) = val;
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}
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static inline void rc32434_writel(u32 val, unsigned long pa)
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{
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*((volatile u32 *)KSEG1ADDR(pa)) = val;
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}
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#endif
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/*
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* C access to CLZ and CLO instructions
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* (count leading zeroes/ones).
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*/
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static inline int rc32434_clz(unsigned long val)
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{
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int ret;
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__asm__ volatile (
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".set\tnoreorder\n\t"
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".set\tnoat\n\t"
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".set\tmips32\n\t"
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"clz\t%0,%1\n\t"
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".set\tmips0\n\t"
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".set\tat\n\t"
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".set\treorder"
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: "=r" (ret)
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: "r" (val));
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return ret;
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}
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static inline int rc32434_clo(unsigned long val)
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{
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int ret;
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__asm__ volatile (
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".set\tnoreorder\n\t"
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".set\tnoat\n\t"
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".set\tmips32\n\t"
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"clo\t%0,%1\n\t"
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".set\tmips0\n\t"
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".set\tat\n\t"
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".set\treorder"
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: "=r" (ret)
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: "r" (val));
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return ret;
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}
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#endif /* _RC32434_H_ */
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