c6c731fe31
Add support for NXP layerscape ls1043ardb 64b/32b Dev board. LS1043a is an SoC with 4x64-bit up to 1.6 GHz ARMv8 A53 cores. ls1043ardb support features as: 2GB DDR4, 128MB NOR/512MB NAND, USB3.0, eSDHC, I2C, GPIO, PCIe/Mini-PCIe, 6x1G/1x10G network port, etc. 64b/32b ls1043ardb target is using 4.4 kernel, and rcw/u-boot/fman images from NXP QorIQ SDK release. All of 4.4 kernel patches porting from SDK release or upstream. QorIQ SDK ISOs can be downloaded from this location: http://www.nxp.com/products/software-and-tools/run-time-software/linux-sdk/linux-sdk-for-qoriq-processors:SDKLINUX Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
53 lines
1.7 KiB
Diff
53 lines
1.7 KiB
Diff
From 0ce5d6bd62a9f1dbaa2d39c3535a8bdb31cf7951 Mon Sep 17 00:00:00 2001
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From: Raghav Dogra <raghav.dogra@nxp.com>
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Date: Wed, 24 Feb 2016 23:12:58 +0530
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Subject: [PATCH 47/70] drivers/memory: Fix build error for arm64
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Replace spin_event_timeout() with arch independent macro
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Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
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Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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---
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drivers/memory/fsl_ifc.c | 16 +++++++++-------
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1 file changed, 9 insertions(+), 7 deletions(-)
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--- a/drivers/memory/fsl_ifc.c
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+++ b/drivers/memory/fsl_ifc.c
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@@ -39,7 +39,7 @@
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struct fsl_ifc_ctrl *fsl_ifc_ctrl_dev;
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EXPORT_SYMBOL(fsl_ifc_ctrl_dev);
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#define FSL_IFC_V1_3_0 0x01030000
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-#define IFC_TIMEOUT_MSECS 100000 /* 100ms */
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+#define IFC_TIMEOUT_MSECS 1000 /* 1000ms */
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/*
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* convert_ifc_address - convert the base address
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@@ -365,7 +365,7 @@ static int fsl_ifc_resume(struct device
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struct fsl_ifc_runtime __iomem *runtime = ctrl->rregs;
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struct fsl_ifc_fcm *savd_gregs = ctrl->saved_gregs;
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struct fsl_ifc_runtime *savd_rregs = ctrl->saved_rregs;
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- uint32_t ver = 0, ncfgr, status, ifc_bank, i;
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+ uint32_t ver = 0, ncfgr, timeout, ifc_bank, i;
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/*
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* IFC interrupts disabled
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@@ -469,12 +469,14 @@ static int fsl_ifc_resume(struct device
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ifc_out32(ncfgr | IFC_NAND_SRAM_INIT_EN,
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&runtime->ifc_nand.ncfgr);
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/* wait for SRAM_INIT bit to be clear or timeout */
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- status = spin_event_timeout(
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- !(ifc_in32(&runtime->ifc_nand.ncfgr)
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- & IFC_NAND_SRAM_INIT_EN),
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- IFC_TIMEOUT_MSECS, 0);
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+ timeout = 10;
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+ while ((ifc_in32(&runtime->ifc_nand.ncfgr) &
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+ IFC_NAND_SRAM_INIT_EN) && timeout) {
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+ mdelay(IFC_TIMEOUT_MSECS);
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+ timeout--;
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+ }
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- if (!status)
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+ if (!timeout)
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dev_err(ctrl->dev, "Timeout waiting for IFC SRAM INIT");
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}
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