665 lines
24 KiB
C
665 lines
24 KiB
C
/*****************************************************************************
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** FILE NAME : ifxusb_cif.h
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** PROJECT : IFX USB sub-system V3
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** MODULES : IFX USB sub-system Host and Device driver
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** SRC VERSION : 1.0
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** DATE : 1/Jan/2009
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** AUTHOR : Chen, Howard
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** DESCRIPTION : The Core Interface provides basic services for accessing and
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** managing the IFX USB hardware. These services are used by both the
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** Host Controller Driver and the Peripheral Controller Driver.
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** FUNCTIONS :
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** COMPILER : gcc
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** REFERENCE : IFX hardware ref handbook for each plateforms
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** COPYRIGHT :
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** Version Control Section **
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** $Author$
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** $Date$
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** $Revisions$
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** $Log$ Revision history
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*****************************************************************************/
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/*!
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\defgroup IFXUSB_DRIVER_V3 IFX USB SS Project
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\brief IFX USB subsystem V3.x
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*/
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/*!
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\defgroup IFXUSB_CIF Core Interface APIs
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\ingroup IFXUSB_DRIVER_V3
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\brief The Core Interface provides basic services for accessing and
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managing the IFXUSB hardware. These services are used by both the
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Host Controller Driver and the Peripheral Controller Driver.
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*/
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/*!
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\file ifxusb_cif.h
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\ingroup IFXUSB_DRIVER_V3
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\brief This file contains the interface to the IFX USB Core.
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*/
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#if !defined(__IFXUSB_CIF_H__)
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#define __IFXUSB_CIF_H__
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#include <linux/workqueue.h>
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#include <linux/version.h>
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#include <asm/param.h>
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#include "ifxusb_plat.h"
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#include "ifxusb_regs.h"
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#ifdef __DEBUG__
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#include "linux/timer.h"
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#endif
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///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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#define IFXUSB_PARAM_SPEED_HIGH 0
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#define IFXUSB_PARAM_SPEED_FULL 1
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#define IFXUSB_EP_SPEED_LOW 0
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#define IFXUSB_EP_SPEED_FULL 1
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#define IFXUSB_EP_SPEED_HIGH 2
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#define IFXUSB_EP_TYPE_CTRL 0
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#define IFXUSB_EP_TYPE_ISOC 1
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#define IFXUSB_EP_TYPE_BULK 2
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#define IFXUSB_EP_TYPE_INTR 3
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#define IFXUSB_HC_PID_DATA0 0
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#define IFXUSB_HC_PID_DATA2 1
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#define IFXUSB_HC_PID_DATA1 2
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#define IFXUSB_HC_PID_MDATA 3
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#define IFXUSB_HC_PID_SETUP 3
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/*!
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\addtogroup IFXUSB_CIF
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*/
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/*@{*/
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/*!
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\struct ifxusb_params
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\brief IFXUSB Parameters structure.
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This structure is used for both importing from insmod stage and run-time storage.
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These parameters define how the IFXUSB controller should be configured.
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*/
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typedef struct ifxusb_params
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{
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int32_t dma_burst_size; /*!< The DMA Burst size (applicable only for Internal DMA
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Mode). 0(for single), 1(incr), 4(incr4), 8(incr8) 16(incr16)
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*/
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/* Translate this to GAHBCFG values */
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int32_t speed; /*!< Specifies the maximum speed of operation in host and device mode.
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The actual speed depends on the speed of the attached device and
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the value of phy_type. The actual speed depends on the speed of the
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attached device.
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0 - High Speed (default)
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1 - Full Speed
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*/
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int32_t data_fifo_size; /*!< Total number of dwords in the data FIFO memory. This
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memory includes the Rx FIFO, non-periodic Tx FIFO, and periodic
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Tx FIFOs.
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32 to 32768
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*/
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#ifdef __IS_DEVICE__
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int32_t rx_fifo_size; /*!< Number of dwords in the Rx FIFO in device mode.
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16 to 32768
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*/
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int32_t tx_fifo_size[MAX_EPS_CHANNELS]; /*!< Number of dwords in each of the Tx FIFOs in device mode.
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4 to 768
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*/
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#ifdef __DED_FIFO__
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int32_t thr_ctl; /*!< Threshold control on/off */
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int32_t tx_thr_length; /*!< Threshold length for Tx */
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int32_t rx_thr_length; /*!< Threshold length for Rx*/
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#endif
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#else //__IS_HOST__
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int32_t host_channels; /*!< The number of host channel registers to use.
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1 to 16
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*/
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int32_t rx_fifo_size; /*!< Number of dwords in the Rx FIFO in host mode.
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16 to 32768
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*/
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int32_t nperio_tx_fifo_size;/*!< Number of dwords in the non-periodic Tx FIFO in host mode.
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16 to 32768
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*/
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int32_t perio_tx_fifo_size; /*!< Number of dwords in the host periodic Tx FIFO.
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16 to 32768
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*/
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#endif //__IS_HOST__
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int32_t max_transfer_size; /*!< The maximum transfer size supported in bytes.
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2047 to 65,535
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*/
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int32_t max_packet_count; /*!< The maximum number of packets in a transfer.
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15 to 511 (default 511)
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*/
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int32_t phy_utmi_width; /*!< Specifies the UTMI+ Data Width.
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8 or 16 bits (default 16)
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*/
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int32_t turn_around_time_hs; /*!< Specifies the Turn-Around time at HS*/
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int32_t turn_around_time_fs; /*!< Specifies the Turn-Around time at FS*/
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int32_t timeout_cal_hs; /*!< Specifies the Timeout_Calibration at HS*/
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int32_t timeout_cal_fs; /*!< Specifies the Timeout_Calibration at FS*/
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} ifxusb_params_t;
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///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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/*!
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\struct ifxusb_core_if
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\brief The ifx_core_if structure contains information needed to manage
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the IFX USB controller acting in either host or device mode. It
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represents the programming view of the controller as a whole.
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*/
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typedef struct ifxusb_core_if
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{
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ifxusb_params_t params; /*!< Run-time Parameters */
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uint8_t core_no; /*!< core number (used as id when multi-core case */
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char *core_name; /*!< core name used for registration and informative purpose*/
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int irq; /*!< irq number this core is hooked */
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/*****************************************************************
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* Structures and pointers to physical register interface.
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*****************************************************************/
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/** Core Global registers starting at offset 000h. */
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ifxusb_core_global_regs_t *core_global_regs; /*!< pointer to Core Global Registers, offset at 000h */
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/** Host-specific registers */
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#ifdef __IS_HOST__
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/** Host Global Registers starting at offset 400h.*/
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ifxusb_host_global_regs_t *host_global_regs; /*!< pointer to Host Global Registers, offset at 400h */
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#define IFXUSB_HOST_GLOBAL_REG_OFFSET 0x400
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/** Host Port 0 Control and Status Register */
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volatile uint32_t *hprt0; /*!< pointer to HPRT0 Registers, offset at 440h */
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#define IFXUSB_HOST_PORT_REGS_OFFSET 0x440
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/** Host Channel Specific Registers at offsets 500h-5FCh. */
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ifxusb_hc_regs_t *hc_regs[MAX_EPS_CHANNELS]; /*!< pointer to Host-Channel n Registers, offset at 500h */
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#define IFXUSB_HOST_CHAN_REGS_OFFSET 0x500
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#define IFXUSB_CHAN_REGS_OFFSET 0x20
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#endif
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/** Device-specific registers */
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#ifdef __IS_DEVICE__
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/** Device Global Registers starting at offset 800h */
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ifxusb_device_global_regs_t *dev_global_regs; /*!< pointer to Device Global Registers, offset at 800h */
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#define IFXUSB_DEV_GLOBAL_REG_OFFSET 0x800
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/** Device Logical IN Endpoint-Specific Registers 900h-AFCh */
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ifxusb_dev_in_ep_regs_t *in_ep_regs[MAX_EPS_CHANNELS]; /*!< pointer to Device IN-EP Registers, offset at 900h */
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#define IFXUSB_DEV_IN_EP_REG_OFFSET 0x900
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#define IFXUSB_EP_REG_OFFSET 0x20
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/** Device Logical OUT Endpoint-Specific Registers B00h-CFCh */
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ifxusb_dev_out_ep_regs_t *out_ep_regs[MAX_EPS_CHANNELS];/*!< pointer to Device OUT-EP Registers, offset at 900h */
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#define IFXUSB_DEV_OUT_EP_REG_OFFSET 0xB00
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#endif
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/** Power and Clock Gating Control Register */
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volatile uint32_t *pcgcctl; /*!< pointer to Power and Clock Gating Control Registers, offset at E00h */
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#define IFXUSB_PCGCCTL_OFFSET 0xE00
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/** Push/pop addresses for endpoints or host channels.*/
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uint32_t *data_fifo[MAX_EPS_CHANNELS]; /*!< pointer to FIFO access windows, offset at 1000h */
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#define IFXUSB_DATA_FIFO_OFFSET 0x1000
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#define IFXUSB_DATA_FIFO_SIZE 0x1000
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uint32_t *data_fifo_dbg; /*!< pointer to FIFO debug windows, offset at 1000h */
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/** Hardware Configuration -- stored here for convenience.*/
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hwcfg1_data_t hwcfg1; /*!< preserved Hardware Configuration 1 */
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hwcfg2_data_t hwcfg2; /*!< preserved Hardware Configuration 2 */
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hwcfg3_data_t hwcfg3; /*!< preserved Hardware Configuration 3 */
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hwcfg4_data_t hwcfg4; /*!< preserved Hardware Configuration 3 */
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uint32_t snpsid; /*!< preserved SNPSID */
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/*****************************************************************
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* Run-time informations.
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*****************************************************************/
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/* Set to 1 if the core PHY interface bits in USBCFG have been initialized. */
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uint8_t phy_init_done; /*!< indicated PHY is initialized. */
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#ifdef __IS_HOST__
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uint8_t queuing_high_bandwidth; /*!< Host mode, Queueing High Bandwidth. */
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#endif
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} ifxusb_core_if_t;
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/*@}*//*IFXUSB_CIF*/
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/*!
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\fn void *ifxusb_alloc_buf(size_t size, int clear)
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\brief This function is called to allocate buffer of specified size.
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The allocated buffer is mapped into DMA accessable address.
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\param size Size in BYTE to be allocated
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\param clear 0: don't do clear after buffer allocated, other: do clear to zero
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\return 0/NULL: Fail; uncached pointer of allocated buffer
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\ingroup IFXUSB_CIF
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*/
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extern void *ifxusb_alloc_buf(size_t size, int clear);
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/*!
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\fn void ifxusb_free_buf(void *vaddr)
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\brief This function is called to free allocated buffer.
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\param vaddr the uncached pointer of the buffer
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\ingroup IFXUSB_CIF
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*/
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extern void ifxusb_free_buf(void *vaddr);
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/*!
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\fn int ifxusb_core_if_init(ifxusb_core_if_t *_core_if,
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int _irq,
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uint32_t _reg_base_addr,
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uint32_t _fifo_base_addr,
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uint32_t _fifo_dbg_addr)
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\brief This function is called to initialize the IFXUSB CSR data
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structures. The register addresses in the device and host
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structures are initialized from the base address supplied by the
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caller. The calling function must make the OS calls to get the
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base address of the IFXUSB controller registers.
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\param _core_if Pointer of core_if structure
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\param _irq irq number
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\param _reg_base_addr Base address of IFXUSB core registers
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\param _fifo_base_addr Fifo base address
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\param _fifo_dbg_addr Fifo debug address
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\return 0: success;
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\ingroup IFXUSB_CIF
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*/
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extern int ifxusb_core_if_init(ifxusb_core_if_t *_core_if,
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int _irq,
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uint32_t _reg_base_addr,
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uint32_t _fifo_base_addr,
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uint32_t _fifo_dbg_addr);
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/*!
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\fn void ifxusb_core_if_remove(ifxusb_core_if_t *_core_if)
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\brief This function free the mapped address in the IFXUSB CSR data structures.
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\param _core_if Pointer of core_if structure
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\ingroup IFXUSB_CIF
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*/
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extern void ifxusb_core_if_remove(ifxusb_core_if_t *_core_if);
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/*!
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\fn void ifxusb_enable_global_interrupts( ifxusb_core_if_t *_core_if )
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\brief This function enbles the controller's Global Interrupt in the AHB Config register.
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\param _core_if Pointer of core_if structure
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*/
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extern void ifxusb_enable_global_interrupts( ifxusb_core_if_t *_core_if );
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/*!
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\fn void ifxusb_disable_global_interrupts( ifxusb_core_if_t *_core_if )
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\brief This function disables the controller's Global Interrupt in the AHB Config register.
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\param _core_if Pointer of core_if structure
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\ingroup IFXUSB_CIF
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*/
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extern void ifxusb_disable_global_interrupts( ifxusb_core_if_t *_core_if );
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/*!
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\fn void ifxusb_flush_tx_fifo( ifxusb_core_if_t *_core_if, const int _num )
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\brief Flush a Tx FIFO.
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\param _core_if Pointer of core_if structure
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\param _num Tx FIFO to flush. ( 0x10 for ALL TX FIFO )
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\ingroup IFXUSB_CIF
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*/
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extern void ifxusb_flush_tx_fifo( ifxusb_core_if_t *_core_if, const int _num );
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/*!
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\fn void ifxusb_flush_rx_fifo( ifxusb_core_if_t *_core_if )
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\brief Flush Rx FIFO.
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\param _core_if Pointer of core_if structure
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\ingroup IFXUSB_CIF
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*/
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extern void ifxusb_flush_rx_fifo( ifxusb_core_if_t *_core_if );
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/*!
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\fn void ifxusb_flush_both_fifo( ifxusb_core_if_t *_core_if )
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\brief Flush ALL Rx and Tx FIFO.
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\param _core_if Pointer of core_if structure
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\ingroup IFXUSB_CIF
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*/
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extern void ifxusb_flush_both_fifo( ifxusb_core_if_t *_core_if );
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/*!
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\fn int ifxusb_core_soft_reset(ifxusb_core_if_t *_core_if)
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\brief Do core a soft reset of the core. Be careful with this because it
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resets all the internal state machines of the core.
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\param _core_if Pointer of core_if structure
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\ingroup IFXUSB_CIF
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*/
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extern int ifxusb_core_soft_reset(ifxusb_core_if_t *_core_if);
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/*!
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\brief Turn on the USB Core Power
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\param _core_if Pointer of core_if structure
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\ingroup IFXUSB_CIF
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*/
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extern void ifxusb_power_on (ifxusb_core_if_t *_core_if);
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/*!
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\fn void ifxusb_power_off (ifxusb_core_if_t *_core_if)
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\brief Turn off the USB Core Power
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\param _core_if Pointer of core_if structure
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\ingroup IFXUSB_CIF
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*/
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extern void ifxusb_power_off (ifxusb_core_if_t *_core_if);
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/*!
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\fn void ifxusb_phy_power_on (ifxusb_core_if_t *_core_if)
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\brief Turn on the USB PHY Power
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\param _core_if Pointer of core_if structure
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\ingroup IFXUSB_CIF
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*/
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extern void ifxusb_phy_power_on (ifxusb_core_if_t *_core_if);
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/*!
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\fn void ifxusb_phy_power_off (ifxusb_core_if_t *_core_if)
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\brief Turn off the USB PHY Power
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\param _core_if Pointer of core_if structure
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\ingroup IFXUSB_CIF
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*/
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extern void ifxusb_phy_power_off (ifxusb_core_if_t *_core_if);
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/*!
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\fn void ifxusb_hard_reset(ifxusb_core_if_t *_core_if)
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\brief Reset on the USB Core RCU
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\param _core_if Pointer of core_if structure
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\ingroup IFXUSB_CIF
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*/
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extern void ifxusb_hard_reset(ifxusb_core_if_t *_core_if);
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///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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#ifdef __IS_HOST__
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/*!
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\fn void ifxusb_host_core_init(ifxusb_core_if_t *_core_if, ifxusb_params_t *_params)
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\brief This function initializes the IFXUSB controller registers for Host mode.
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This function flushes the Tx and Rx FIFOs and it flushes any entries in the
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request queues.
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\param _core_if Pointer of core_if structure
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\param _params parameters to be set
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\ingroup IFXUSB_CIF
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*/
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extern void ifxusb_host_core_init(ifxusb_core_if_t *_core_if, ifxusb_params_t *_params);
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/*!
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\fn void ifxusb_host_enable_interrupts(ifxusb_core_if_t *_core_if)
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\brief This function enables the Host mode interrupts.
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\param _core_if Pointer of core_if structure
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\ingroup IFXUSB_CIF
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*/
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extern void ifxusb_host_enable_interrupts(ifxusb_core_if_t *_core_if);
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/*!
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\fn void ifxusb_host_disable_interrupts(ifxusb_core_if_t *_core_if)
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\brief This function disables the Host mode interrupts.
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\param _core_if Pointer of core_if structure
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\ingroup IFXUSB_CIF
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*/
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extern void ifxusb_host_disable_interrupts(ifxusb_core_if_t *_core_if);
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#if defined(__IS_TWINPASS__)
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extern void ifxusb_enable_afe_oc(void);
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#endif
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/*!
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\fn void ifxusb_vbus_init(ifxusb_core_if_t *_core_if)
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\brief This function init the VBUS control.
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\param _core_if Pointer of core_if structure
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\ingroup IFXUSB_CIF
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*/
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extern void ifxusb_vbus_init(ifxusb_core_if_t *_core_if);
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/*!
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\fn void ifxusb_vbus_free(ifxusb_core_if_t *_core_if)
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\brief This function free the VBUS control.
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\param _core_if Pointer of core_if structure
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\ingroup IFXUSB_CIF
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*/
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extern void ifxusb_vbus_free(ifxusb_core_if_t *_core_if);
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/*!
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\fn void ifxusb_vbus_on(ifxusb_core_if_t *_core_if)
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\brief Turn on the USB 5V VBus Power
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\param _core_if Pointer of core_if structure
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\ingroup IFXUSB_CIF
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*/
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extern void ifxusb_vbus_on(ifxusb_core_if_t *_core_if);
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/*!
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\fn void ifxusb_vbus_off(ifxusb_core_if_t *_core_if)
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\brief Turn off the USB 5V VBus Power
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\param _core_if Pointer of core_if structure
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\ingroup IFXUSB_CIF
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*/
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extern void ifxusb_vbus_off(ifxusb_core_if_t *_core_if);
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/*!
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\fn int ifxusb_vbus(ifxusb_core_if_t *_core_if)
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\brief Read Current VBus status
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\param _core_if Pointer of core_if structure
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\ingroup IFXUSB_CIF
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*/
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extern int ifxusb_vbus(ifxusb_core_if_t *_core_if);
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#if defined(__DO_OC_INT__) && defined(__DO_OC_INT_ENABLE__)
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/*!
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\fn void ifxusb_oc_int_on(void)
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\brief Turn on the OC interrupt
|
|
\ingroup IFXUSB_CIF
|
|
*/
|
|
extern void ifxusb_oc_int_on(void);
|
|
|
|
/*!
|
|
\fn void ifxusb_oc_int_off(void)
|
|
\brief Turn off the OC interrupt
|
|
\ingroup IFXUSB_CIF
|
|
*/
|
|
extern void ifxusb_oc_int_off(void);
|
|
#endif //defined(__DO_OC_INT__) && defined(__DO_OC_INT_ENABLE__)
|
|
#endif
|
|
|
|
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
#ifdef __IS_DEVICE__
|
|
/*!
|
|
\fn void ifxusb_dev_enable_interrupts(ifxusb_core_if_t *_core_if)
|
|
\brief This function enables the Device mode interrupts.
|
|
\param _core_if Pointer of core_if structure
|
|
\ingroup IFXUSB_CIF
|
|
*/
|
|
extern void ifxusb_dev_enable_interrupts(ifxusb_core_if_t *_core_if);
|
|
|
|
/*!
|
|
\fn uint32_t ifxusb_dev_get_frame_number(ifxusb_core_if_t *_core_if)
|
|
\brief Gets the current USB frame number. This is the frame number from the last SOF packet.
|
|
\param _core_if Pointer of core_if structure
|
|
\ingroup IFXUSB_CIF
|
|
*/
|
|
extern uint32_t ifxusb_dev_get_frame_number(ifxusb_core_if_t *_core_if);
|
|
|
|
/*!
|
|
\fn void ifxusb_dev_ep_set_stall(ifxusb_core_if_t *_core_if, uint8_t _epno, uint8_t _is_in)
|
|
\brief Set the EP STALL.
|
|
\param _core_if Pointer of core_if structure
|
|
\param _epno EP number
|
|
\param _is_in 1: is IN transfer
|
|
\ingroup IFXUSB_CIF
|
|
*/
|
|
extern void ifxusb_dev_ep_set_stall(ifxusb_core_if_t *_core_if, uint8_t _epno, uint8_t _is_in);
|
|
|
|
/*!
|
|
\fn void ifxusb_dev_ep_clear_stall(ifxusb_core_if_t *_core_if, uint8_t _epno, uint8_t _ep_type, uint8_t _is_in)
|
|
\brief Set the EP STALL.
|
|
\param _core_if Pointer of core_if structure
|
|
\param _epno EP number
|
|
\param _ep_type EP Type
|
|
\ingroup IFXUSB_CIF
|
|
*/
|
|
extern void ifxusb_dev_ep_clear_stall(ifxusb_core_if_t *_core_if, uint8_t _epno, uint8_t _ep_type, uint8_t _is_in);
|
|
|
|
/*!
|
|
\fn void ifxusb_dev_core_init(ifxusb_core_if_t *_core_if, ifxusb_params_t *_params)
|
|
\brief This function initializes the IFXUSB controller registers for Device mode.
|
|
This function flushes the Tx and Rx FIFOs and it flushes any entries in the
|
|
request queues.
|
|
This function validate the imported parameters and store the result in the CIF structure.
|
|
After
|
|
\param _core_if Pointer of core_if structure
|
|
\param _params structure of inported parameters
|
|
\ingroup IFXUSB_CIF
|
|
*/
|
|
extern void ifxusb_dev_core_init(ifxusb_core_if_t *_core_if, ifxusb_params_t *_params);
|
|
#endif
|
|
|
|
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
|
|
#if defined(__GADGET_LED__) || defined(__HOST_LED__)
|
|
/*!
|
|
\fn void ifxusb_led_init(ifxusb_core_if_t *_core_if)
|
|
\brief This function init the LED control.
|
|
\param _core_if Pointer of core_if structure
|
|
\ingroup IFXUSB_CIF
|
|
*/
|
|
extern void ifxusb_led_init(ifxusb_core_if_t *_core_if);
|
|
|
|
/*!
|
|
\fn void ifxusb_led_free(ifxusb_core_if_t *_core_if)
|
|
\brief This function free the LED control.
|
|
\param _core_if Pointer of core_if structure
|
|
\ingroup IFXUSB_CIF
|
|
*/
|
|
extern void ifxusb_led_free(ifxusb_core_if_t *_core_if);
|
|
|
|
/*!
|
|
\fn void ifxusb_led(ifxusb_core_if_t *_core_if)
|
|
\brief This function trigger the LED access.
|
|
\param _core_if Pointer of core_if structure
|
|
\ingroup IFXUSB_CIF
|
|
*/
|
|
extern void ifxusb_led(ifxusb_core_if_t *_core_if);
|
|
#endif
|
|
|
|
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
|
|
/* internal routines for debugging */
|
|
extern void ifxusb_dump_msg(const u8 *buf, unsigned int length);
|
|
extern void ifxusb_dump_spram(ifxusb_core_if_t *_core_if);
|
|
extern void ifxusb_dump_registers(ifxusb_core_if_t *_core_if);
|
|
extern void ifxusb_clean_spram(ifxusb_core_if_t *_core_if,uint32_t dwords);
|
|
|
|
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
|
|
static inline uint32_t ifxusb_read_core_intr(ifxusb_core_if_t *_core_if)
|
|
{
|
|
return (ifxusb_rreg(&_core_if->core_global_regs->gintsts) &
|
|
(ifxusb_rreg(&_core_if->core_global_regs->gintmsk)
|
|
#ifdef __USE_TIMER_4_SOF__
|
|
| IFXUSB_SOF_INTR_MASK
|
|
#endif
|
|
));
|
|
}
|
|
|
|
static inline uint32_t ifxusb_read_otg_intr (ifxusb_core_if_t *_core_if)
|
|
{
|
|
return (ifxusb_rreg (&_core_if->core_global_regs->gotgint));
|
|
}
|
|
|
|
static inline uint32_t ifxusb_mode(ifxusb_core_if_t *_core_if)
|
|
{
|
|
return (ifxusb_rreg( &_core_if->core_global_regs->gintsts ) & 0x1);
|
|
}
|
|
static inline uint8_t ifxusb_is_device_mode(ifxusb_core_if_t *_core_if)
|
|
{
|
|
return (ifxusb_mode(_core_if) != 1);
|
|
}
|
|
static inline uint8_t ifxusb_is_host_mode(ifxusb_core_if_t *_core_if)
|
|
{
|
|
return (ifxusb_mode(_core_if) == 1);
|
|
}
|
|
|
|
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
|
|
#ifdef __IS_HOST__
|
|
static inline uint32_t ifxusb_read_hprt0(ifxusb_core_if_t *_core_if)
|
|
{
|
|
hprt0_data_t hprt0;
|
|
hprt0.d32 = ifxusb_rreg(_core_if->hprt0);
|
|
hprt0.b.prtena = 0;
|
|
hprt0.b.prtconndet = 0;
|
|
hprt0.b.prtenchng = 0;
|
|
hprt0.b.prtovrcurrchng = 0;
|
|
return hprt0.d32;
|
|
}
|
|
|
|
static inline uint32_t ifxusb_read_host_all_channels_intr (ifxusb_core_if_t *_core_if)
|
|
{
|
|
return (ifxusb_rreg (&_core_if->host_global_regs->haint));
|
|
}
|
|
|
|
static inline uint32_t ifxusb_read_host_channel_intr (ifxusb_core_if_t *_core_if, int hc_num)
|
|
{
|
|
return (ifxusb_rreg (&_core_if->hc_regs[hc_num]->hcint));
|
|
}
|
|
#endif
|
|
|
|
#ifdef __IS_DEVICE__
|
|
static inline uint32_t ifxusb_read_dev_all_in_ep_intr(ifxusb_core_if_t *_core_if)
|
|
{
|
|
uint32_t v;
|
|
v = ifxusb_rreg(&_core_if->dev_global_regs->daint) &
|
|
ifxusb_rreg(&_core_if->dev_global_regs->daintmsk);
|
|
return (v & 0xffff);
|
|
}
|
|
|
|
static inline uint32_t ifxusb_read_dev_all_out_ep_intr(ifxusb_core_if_t *_core_if)
|
|
{
|
|
uint32_t v;
|
|
v = ifxusb_rreg(&_core_if->dev_global_regs->daint) &
|
|
ifxusb_rreg(&_core_if->dev_global_regs->daintmsk);
|
|
return ((v & 0xffff0000) >> 16);
|
|
}
|
|
|
|
static inline uint32_t ifxusb_read_dev_in_ep_intr(ifxusb_core_if_t *_core_if, int _ep_num)
|
|
{
|
|
uint32_t v;
|
|
v = ifxusb_rreg(&_core_if->in_ep_regs[_ep_num]->diepint) &
|
|
ifxusb_rreg(&_core_if->dev_global_regs->diepmsk);
|
|
return v;
|
|
}
|
|
|
|
static inline uint32_t ifxusb_read_dev_out_ep_intr(ifxusb_core_if_t *_core_if, int _ep_num)
|
|
{
|
|
uint32_t v;
|
|
v = ifxusb_rreg(&_core_if->out_ep_regs[_ep_num]->doepint) &
|
|
ifxusb_rreg(&_core_if->dev_global_regs->doepmsk);
|
|
return v;
|
|
}
|
|
|
|
#endif
|
|
|
|
extern void ifxusb_attr_create (void *_dev);
|
|
|
|
extern void ifxusb_attr_remove (void *_dev);
|
|
|
|
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
|
|
#endif // !defined(__IFXUSB_CIF_H__)
|
|
|
|
|