02629d8f87
Targets were build tested and patches are refreshed. Signed-off-by: Luka Perkov <luka@openwrt.org> SVN-Revision: 42463
114 lines
4 KiB
Diff
114 lines
4 KiB
Diff
From 0f171b8a6e1723f0ce6f98f8b3fba7d2583088c1 Mon Sep 17 00:00:00 2001
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From: Kumar Gala <galak@codeaurora.org>
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Date: Fri, 4 Apr 2014 11:31:29 -0500
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Subject: [PATCH 079/182] clk: qcom: Add basic support for APQ8064 global
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clock controller clocks
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The APQ8064 and MSM8960 share a significant amount of clock data and
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code between the two SoCs. Rather than duplicating the data we just add
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support for a unqiue APQ8064 clock table into the MSM8960 code.
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For now add just enough clocks to get a basic serial port going on an
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APQ8064 device.
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Signed-off-by: Kumar Gala <galak@codeaurora.org>
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Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
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Signed-off-by: Mike Turquette <mturquette@linaro.org>
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[mturquette@linaro.org: trivial conflict due to missing ipq8064 support]
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---
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.../devicetree/bindings/clock/qcom,gcc.txt | 1 +
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drivers/clk/qcom/Kconfig | 4 +--
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drivers/clk/qcom/gcc-msm8960.c | 30 ++++++++++++++++++--
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3 files changed, 30 insertions(+), 5 deletions(-)
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--- a/Documentation/devicetree/bindings/clock/qcom,gcc.txt
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+++ b/Documentation/devicetree/bindings/clock/qcom,gcc.txt
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@@ -4,6 +4,7 @@ Qualcomm Global Clock & Reset Controller
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Required properties :
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- compatible : shall contain only one of the following:
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+ "qcom,gcc-apq8064"
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"qcom,gcc-msm8660"
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"qcom,gcc-msm8960"
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"qcom,gcc-msm8974"
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--- a/drivers/clk/qcom/Kconfig
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+++ b/drivers/clk/qcom/Kconfig
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@@ -13,10 +13,10 @@ config MSM_GCC_8660
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i2c, USB, SD/eMMC, etc.
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config MSM_GCC_8960
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- tristate "MSM8960 Global Clock Controller"
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+ tristate "APQ8064/MSM8960 Global Clock Controller"
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depends on COMMON_CLK_QCOM
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help
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- Support for the global clock controller on msm8960 devices.
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+ Support for the global clock controller on apq8064/msm8960 devices.
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Say Y if you want to use peripheral devices such as UART, SPI,
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i2c, USB, SD/eMMC, SATA, PCIe, etc.
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--- a/drivers/clk/qcom/gcc-msm8960.c
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+++ b/drivers/clk/qcom/gcc-msm8960.c
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@@ -1,5 +1,5 @@
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/*
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- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
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+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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@@ -2868,6 +2868,16 @@ static const struct qcom_reset_map gcc_m
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[RIVA_RESET] = { 0x35e0 },
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};
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+static struct clk_regmap *gcc_apq8064_clks[] = {
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+ [PLL8] = &pll8.clkr,
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+ [PLL8_VOTE] = &pll8_vote,
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+ [GSBI7_UART_SRC] = &gsbi7_uart_src.clkr,
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+ [GSBI7_UART_CLK] = &gsbi7_uart_clk.clkr,
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+ [GSBI7_QUP_SRC] = &gsbi7_qup_src.clkr,
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+ [GSBI7_QUP_CLK] = &gsbi7_qup_clk.clkr,
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+ [GSBI7_H_CLK] = &gsbi7_h_clk.clkr,
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+};
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+
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static const struct regmap_config gcc_msm8960_regmap_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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@@ -2884,8 +2894,17 @@ static const struct qcom_cc_desc gcc_msm
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.num_resets = ARRAY_SIZE(gcc_msm8960_resets),
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};
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+static const struct qcom_cc_desc gcc_apq8064_desc = {
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+ .config = &gcc_msm8960_regmap_config,
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+ .clks = gcc_apq8064_clks,
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+ .num_clks = ARRAY_SIZE(gcc_apq8064_clks),
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+ .resets = gcc_msm8960_resets,
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+ .num_resets = ARRAY_SIZE(gcc_msm8960_resets),
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+};
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+
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static const struct of_device_id gcc_msm8960_match_table[] = {
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- { .compatible = "qcom,gcc-msm8960" },
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+ { .compatible = "qcom,gcc-msm8960", .data = &gcc_msm8960_desc },
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+ { .compatible = "qcom,gcc-apq8064", .data = &gcc_apq8064_desc },
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{ }
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};
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MODULE_DEVICE_TABLE(of, gcc_msm8960_match_table);
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@@ -2894,6 +2913,11 @@ static int gcc_msm8960_probe(struct plat
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{
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struct clk *clk;
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struct device *dev = &pdev->dev;
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+ const struct of_device_id *match;
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+
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+ match = of_match_device(gcc_msm8960_match_table, &pdev->dev);
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+ if (!match)
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+ return -EINVAL;
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/* Temporary until RPM clocks supported */
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clk = clk_register_fixed_rate(dev, "cxo", NULL, CLK_IS_ROOT, 19200000);
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@@ -2904,7 +2928,7 @@ static int gcc_msm8960_probe(struct plat
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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- return qcom_cc_probe(pdev, &gcc_msm8960_desc);
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+ return qcom_cc_probe(pdev, match->data);
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}
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static int gcc_msm8960_remove(struct platform_device *pdev)
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