100 lines
3.6 KiB
Diff
100 lines
3.6 KiB
Diff
From e0e3768b73daae674c69db1f71718894274b7bfc Mon Sep 17 00:00:00 2001
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From: Ryder Lee <ryder.lee@mediatek.com>
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Date: Thu, 4 Jan 2018 15:44:07 +0800
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Subject: [PATCH 184/224] ASoC: mediatek: add some core clocks for MT2701 AFE
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Add three core clocks for MT2701 AFE.
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Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
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Signed-off-by: Mark Brown <broonie@kernel.org>
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---
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sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c | 30 ++++++++++++++++++++++-
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sound/soc/mediatek/mt2701/mt2701-afe-common.h | 3 +++
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2 files changed, 32 insertions(+), 1 deletion(-)
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diff --git a/sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c b/sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c
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index 56a057c78c9a..949fc3a1d025 100644
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--- a/sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c
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+++ b/sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c
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@@ -18,8 +18,11 @@
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#include "mt2701-afe-clock-ctrl.h"
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static const char *const base_clks[] = {
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+ [MT2701_INFRA_SYS_AUDIO] = "infra_sys_audio_clk",
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[MT2701_TOP_AUD_MCLK_SRC0] = "top_audio_mux1_sel",
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[MT2701_TOP_AUD_MCLK_SRC1] = "top_audio_mux2_sel",
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+ [MT2701_TOP_AUD_A1SYS] = "top_audio_a1sys_hp",
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+ [MT2701_TOP_AUD_A2SYS] = "top_audio_a2sys_hp",
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[MT2701_AUDSYS_AFE] = "audio_afe_pd",
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[MT2701_AUDSYS_AFE_CONN] = "audio_afe_conn_pd",
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[MT2701_AUDSYS_A1SYS] = "audio_a1sys_pd",
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@@ -169,10 +172,26 @@ static int mt2701_afe_enable_audsys(struct mtk_base_afe *afe)
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struct mt2701_afe_private *afe_priv = afe->platform_priv;
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int ret;
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- ret = clk_prepare_enable(afe_priv->base_ck[MT2701_AUDSYS_AFE]);
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+ /* Enable infra clock gate */
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+ ret = clk_prepare_enable(afe_priv->base_ck[MT2701_INFRA_SYS_AUDIO]);
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if (ret)
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return ret;
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+ /* Enable top a1sys clock gate */
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+ ret = clk_prepare_enable(afe_priv->base_ck[MT2701_TOP_AUD_A1SYS]);
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+ if (ret)
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+ goto err_a1sys;
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+
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+ /* Enable top a2sys clock gate */
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+ ret = clk_prepare_enable(afe_priv->base_ck[MT2701_TOP_AUD_A2SYS]);
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+ if (ret)
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+ goto err_a2sys;
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+
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+ /* Internal clock gates */
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+ ret = clk_prepare_enable(afe_priv->base_ck[MT2701_AUDSYS_AFE]);
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+ if (ret)
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+ goto err_afe;
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+
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ret = clk_prepare_enable(afe_priv->base_ck[MT2701_AUDSYS_A1SYS]);
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if (ret)
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goto err_audio_a1sys;
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@@ -193,6 +212,12 @@ static int mt2701_afe_enable_audsys(struct mtk_base_afe *afe)
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clk_disable_unprepare(afe_priv->base_ck[MT2701_AUDSYS_A1SYS]);
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err_audio_a1sys:
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clk_disable_unprepare(afe_priv->base_ck[MT2701_AUDSYS_AFE]);
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+err_afe:
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+ clk_disable_unprepare(afe_priv->base_ck[MT2701_TOP_AUD_A2SYS]);
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+err_a2sys:
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+ clk_disable_unprepare(afe_priv->base_ck[MT2701_TOP_AUD_A1SYS]);
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+err_a1sys:
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+ clk_disable_unprepare(afe_priv->base_ck[MT2701_INFRA_SYS_AUDIO]);
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return ret;
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}
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@@ -205,6 +230,9 @@ static void mt2701_afe_disable_audsys(struct mtk_base_afe *afe)
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clk_disable_unprepare(afe_priv->base_ck[MT2701_AUDSYS_A2SYS]);
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clk_disable_unprepare(afe_priv->base_ck[MT2701_AUDSYS_A1SYS]);
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clk_disable_unprepare(afe_priv->base_ck[MT2701_AUDSYS_AFE]);
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+ clk_disable_unprepare(afe_priv->base_ck[MT2701_TOP_AUD_A1SYS]);
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+ clk_disable_unprepare(afe_priv->base_ck[MT2701_TOP_AUD_A2SYS]);
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+ clk_disable_unprepare(afe_priv->base_ck[MT2701_INFRA_SYS_AUDIO]);
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}
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int mt2701_afe_enable_clock(struct mtk_base_afe *afe)
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diff --git a/sound/soc/mediatek/mt2701/mt2701-afe-common.h b/sound/soc/mediatek/mt2701/mt2701-afe-common.h
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index 9a2b301a4c21..ae8ddeacfbfe 100644
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--- a/sound/soc/mediatek/mt2701/mt2701-afe-common.h
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+++ b/sound/soc/mediatek/mt2701/mt2701-afe-common.h
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@@ -61,8 +61,11 @@ enum {
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};
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enum audio_base_clock {
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+ MT2701_INFRA_SYS_AUDIO,
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MT2701_TOP_AUD_MCLK_SRC0,
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MT2701_TOP_AUD_MCLK_SRC1,
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+ MT2701_TOP_AUD_A1SYS,
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+ MT2701_TOP_AUD_A2SYS,
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MT2701_AUDSYS_AFE,
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MT2701_AUDSYS_AFE_CONN,
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MT2701_AUDSYS_A1SYS,
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--
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2.11.0
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