02f815d190
That commit exposed a bug in the DTS files used by mt7621 where the wrong reg value for pcie1 (and potentially pcie2) was being used. This was causing WiFi failures for interfaces in pcie1. eg. 2.4GHz working but not 5GHz. As all of these dts entries are already specified in mt7621.dtsi, remove them. Signed-off-by: Rosen Penev <rosenp@gmail.com>
119 lines
1.8 KiB
Text
119 lines
1.8 KiB
Text
/dts-v1/;
|
|
|
|
#include "mt7621.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
compatible = "firefly,firewrt", "mediatek,mt7621-soc";
|
|
model = "Firefly FireWRT";
|
|
|
|
memory@0 {
|
|
device_type = "memory";
|
|
reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
|
|
};
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,57600";
|
|
};
|
|
|
|
gpio-leds {
|
|
compatible = "gpio-leds";
|
|
|
|
power {
|
|
label = "firewrt:green:power";
|
|
gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
gpio-keys-polled {
|
|
compatible = "gpio-keys-polled";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
poll-interval = <20>;
|
|
|
|
wps {
|
|
label = "wps";
|
|
gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
};
|
|
|
|
power {
|
|
label = "power";
|
|
gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_POWER>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&sdhci {
|
|
status = "okay";
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
|
|
m25p80@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <10000000>;
|
|
m25p,chunked-io = <32>;
|
|
|
|
partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x0 0x30000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@30000 {
|
|
label = "u-boot-env";
|
|
reg = <0x30000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
factory: partition@40000 {
|
|
label = "factory";
|
|
reg = <0x40000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@50000 {
|
|
label = "firmware";
|
|
reg = <0x50000 0xfb0000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
|
|
pcie0 {
|
|
mt76@0,0 {
|
|
mediatek,mtd-eeprom = <&factory 0x8000>;
|
|
ieee80211-freq-limit = <5000000 6000000>;
|
|
};
|
|
};
|
|
|
|
pcie1 {
|
|
mt76@1,0 {
|
|
mediatek,mtd-eeprom = <&factory 0x0000>;
|
|
ieee80211-freq-limit = <2400000 2500000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
ðernet {
|
|
mtd-mac-address = <&factory 0xe000>;
|
|
};
|
|
|
|
&pinctrl {
|
|
state_default: pinctrl0 {
|
|
gpio {
|
|
ralink,group = "wdt", "rgmii2";
|
|
ralink,function = "gpio";
|
|
};
|
|
};
|
|
};
|