02629d8f87
Targets were build tested and patches are refreshed. Signed-off-by: Luka Perkov <luka@openwrt.org> SVN-Revision: 42463
31 lines
874 B
Diff
31 lines
874 B
Diff
From 0f9bb2cf6171f47d932df46e34cc5cfce384ff3d Mon Sep 17 00:00:00 2001
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From: Marc Zyngier <marc.zyngier@arm.com>
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Date: Tue, 18 Feb 2014 14:04:44 +0000
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Subject: [PATCH] ARM: sun7i: add arch timer node
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The Allwinner A20 SoC is built around a pair of Cortex-A7 cores,
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which have the usual generic timers. Report this in the DT.
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Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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---
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arch/arm/boot/dts/sun7i-a20.dtsi | 8 ++++++++
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1 file changed, 8 insertions(+)
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--- a/arch/arm/boot/dts/sun7i-a20.dtsi
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+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
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@@ -49,6 +49,14 @@
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reg = <0x40000000 0x80000000>;
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};
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+ timer {
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+ compatible = "arm,armv7-timer";
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+ interrupts = <1 13 0xf08>,
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+ <1 14 0xf08>,
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+ <1 11 0xf08>,
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+ <1 10 0xf08>;
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+ };
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+
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clocks {
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#address-cells = <1>;
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#size-cells = <1>;
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