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Author SHA1 Message Date
John Crispin
e07c4f2150 lantiq: disable buffered writes on Intel command set flash
Some Lantiq SoCs are not able to use buffered writes properly with
Intel command set flash due to the way NOR addresses on EBU are
manipulated. This patch disables buffered writes on those devices.
The only device affected at the moment is ARV4510PW, others use
AMD/Fujitsu command set.

Signed-off-by: Matti Laakso <malaakso@elisanet.fi>

SVN-Revision: 44451
2015-02-14 20:48:32 +00:00