Instead of using off-the-tree .dts files for ARC boards we're
switching to use in-tree ones. And for that to work properly
we apply upstream patch that adds currently missing "model"
property.
Upstream patch and discussion could be found here:
http://lists.infradead.org/pipermail/linux-snps-arc/2016-August/001394.html
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Jonas Gorski <jonas.gorski@gmail.com>
Cc: John Crispin <john@phrozen.org>
It is used by a core build template, so the variable should be
initialized and added to DEVICE_VARS in the core.
Same for DEVICE_DTS_DIR
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Initially for ARC we were building vmlinux images because it
was both simpler and more convenient to debug Linux kernel
in runt-time via JTAG. Now when base system works quite nice
we may finally use U-Boot for loading the system image as
well. Still we keep building vmlinux images as some of our
boards are development boards and loading images with JTAG
could be at some points very beneficial.
Note for U-Boot header it's required to specify 2 values:
* loading address
* entry point (if it doesn't match loading address)
and in case of ARC entry point (EP) not only differs from
loading address but also changes from build to build due to
initramfs being placed between loading address and text section.
To accommodate that feature we have to calculate EP after
vmlinux gets built and before call to mkimage.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This patch introduces support of new boards with ARC cores.
[1] Synopsys SDP board
This is a new-generation development board from Synopsys that
consists of base-board and CPU tile-board (which might have a real
ASIC or FPGA with CPU image).
It sports a lot of DesignWare peripherals like GMAC, USB, SPI, I2C
etc and is intended to be used for early development of ARC-based
products.
[2] nSIM
This is a virtual board implemented in Synopsys proprietary
software simulator (even though available for free for open source
community). This board has only serial port as a peripheral and so
it is meant to be used for runtime testing which is especially
useful during bring-up of new tools and platforms.
What's also important ARC cores are very configurable so there're
many variations of options like cache sizes, their line lengths,
additional hardware blocks like multipliers, dividers etc. And this
board could be used to make sure built software still runs on
different HW configurations.
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Jo-Philipp Wich <jow@openwrt.org>
Cc: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
SVN-Revision: 47589
