Commit graph

322 commits

Author SHA1 Message Date
Jonas Gorski
d24d5412ff b53: widen stp state mask to 3 bits (instead of 2)
At least on my b53 chip, the mask is 3 bits wide, and because
of this some STP states are not set properly and discarded when read.

Maybe for some other chips it makes sense to have just 2 bits width,
but I don't have other versions around to test/validate.

If that's the case then maybe we could add another STP state mask.

Signed-off-by: Alexandru Ardelean <ardeleanalex@gmail.com>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>

SVN-Revision: 45937
2015-06-10 09:21:31 +00:00
Rafał Miłecki
e93c68eedd b53: Allow using all ports on BCM53012
This chipset has at least 8 usable ports, e.g. Netgear R8000 has ports
5, 7 and 8 connected to Ethernet interfaces:
vlan1ports=0 1 2 3 5 7 8*
vlan2ports=4 8u
Port 6 seems to be always disabled.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Jonas Gorski <jogo@openwrt.org>

SVN-Revision: 45676
2015-05-12 13:18:53 +00:00
Rafał Miłecki
06ac2f5c74 b53: improve overriding CPU port state on BCM5301X
On BCM5301X there are two different cases to handle: CPU port 8 vs. any
other one. Support for CPU port 8 was already partially implemented but
it lacked setting some extra bit for 2G speed. It also will need to be
extended to implement "SMP dual core 3 GMAC setup". That's the reason
for handling it in separated code block.
This patch also adds overriding CPU port state for port other than 8. It
requires using recently defined GMII_PORT registers.
It was tested for regressions on BCM53011 revs 2 & 3. It was also
confirmed to fix switch on some internal Broadcom board.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Jonas Gorski <jogo@openwrt.org>

SVN-Revision: 45402
2015-04-12 20:00:42 +00:00
Jonas Gorski
4e826d8303 b53: clean up code to match kernel style better
* properly enclose macro arguments in paranthesis on use
* remove trailing white space
* convert C99 // comments
* add missing blank lines after declaration
* remove braces from single statement blocks
* split lines > 80 chars (except for one)

Signed-off-by: Jonas Gorski <jogo@openwrt.org>

SVN-Revision: 45356
2015-04-10 10:29:04 +00:00
Jonas Gorski
61885f95f0 b53: define registers available and needed on BCM5301X
They are also present on some BCM63xx switches.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>

SVN-Revision: 45355
2015-04-10 10:28:46 +00:00
Jonas Gorski
87568ebeac b53: reverse duplex bit meaning for IMP state override register
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>

SVN-Revision: 44875
2015-03-18 10:44:15 +00:00
Jonas Gorski
085b8e0014 b53: global config is part of the management page, not the control page
It will now actually enable the mib counters instead of enabling rx/tx for
the first switch port.

Reported-by: Daniel Gonzalez <dgcbueu@gmail.com>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>

SVN-Revision: 44788
2015-03-15 14:19:28 +00:00
John Crispin
57c7bed820 swconfig: fix build with linux 4.0
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

SVN-Revision: 44617
2015-03-06 07:57:03 +00:00
Jonas Gorski
d75cd5be37 b53: fix mmap register read/writes > 32 bit
For bcm63xx integrated switches, broadcom changed the data endianess
to match the system endianess. But this only applies to within one word,
which causes 48/64 bit values to be still split into their "litte endian"
groups.

E.g. 48 bit values (with 5 being the most significant byte) aligned

0x00 ..01  or   0123
0x04 2345       45..

will become

0x00 ..10 resp. 3210
0x04 5432       54..

Likewise for 64 bit values.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>

SVN-Revision: 44568
2015-02-27 17:40:17 +00:00
John Crispin
28353b3fc5 kernel: fix compile error inside adm6996.c
drivers/net/phy/adm6996.c:881:5: warning: format '%lu' expects argument of type 'long unsigned int', but argument 5 has type 'u32' [-Wformat=]

Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 44333
2015-02-09 12:09:17 +00:00
Felix Fietkau
f7ece95303 ar8216: prefix mii_xxx functions to avoid kernel namespace pollution
Prefix the exported mii_xxx32 functions with ar8xxx_
to avoid kernel namespace pollution.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 44105
2015-01-24 19:42:12 +00:00
Felix Fietkau
3a313a3e11 ar8216: add swconfig attribute to display ARL table on AR8327/AR8337
Add global read-only swconfig attribute "arl_table" to display the
address resolution table.
So far the chip-specific part is implemented for AR8327/AR8337 only
as I don't have the datasheets for the other AR8XXX chips.

Successfully tested on TL-WDR4300 (AR8327rev2)
and TL-WDR4900 (AR8327rev4).

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 44104
2015-01-24 19:42:06 +00:00
Felix Fietkau
6ce848f622 ar8216: decrease page switch wait time
Until a few years ago the page switch wait time was set to msleep(1)
what was changed to usleep_range(1000, 2000) later.

I can not imagine that a low-level operation like switching page
on register level takes so much time.
Most likely the value of 1ms was initially set to check whether
it fixes an issue and then remained w/o further checking whether
also a smaller value would be sufficient.

Now the wait time is set to 5us and I successfully tested this on
AR8327. IMHO 5us should be plenty of time for all supported chips.
However I couldn't test this due to missing hardware.

If other chips should need a longer wait time we can add the
wait time as a parameter to the ar8xxx_chip struct.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 44103
2015-01-24 19:42:01 +00:00
Felix Fietkau
a1fba9dfbe ar8216: add link change detection for switch ports
Check for switch port link changes and
- flush ATU in case of a change
- report link change via syslog

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 44102
2015-01-24 19:41:55 +00:00
Felix Fietkau
74146c62c0 ar8216: fix ATU flushing
The functionality to flush the address translation table contains two bugs
which luckily compensate each other.
1. Just setting the operation is not sufficient to perform the flushing.
   The "active" bit needs to be set to actually trigger an action.
   For the vtu operations this is implemented correctly.
2. ar8xxx_phy_read_status is called every 2s by the phy state machine
   to check for link changes. This would have caused an ATU flush
   every 2s.

Fix the chip-specific ATU flush functions and remove the ATU flush call
from ar8xxx_phy_read_status.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 44101
2015-01-24 19:41:51 +00:00
Felix Fietkau
6dfea16ab9 ar8216: display flow control info in swconfig get_link in case of autonegatiation too
The swconfig get_link attribute (at least) on AR8327/AR8337 doesn't
consider the autonegotiated flow control.
AR8327/AR8337 provide the info about autonegotiated rx/tx flow control
in bits 10 and 11 of the port status register.
Use these values to display info about autonegotiated rx/tx flow
control as part of the get_link attribute.

Successfully tested on TL-WDR4900 (AR8327 rev.4) and
TL-WDR4300 (AR8327 rev.2).

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 44023
2015-01-18 00:54:06 +00:00
Felix Fietkau
53c0c6054f ar8216: add 802.3az EEE info to swconfig get_link attribute
AR8327/AR8337 allow to read the result of EEE autonegotiation.
If EEE is autonegotiated between the link partners, display
this as part of the swconfig get_link attribute.

eee100:  100MBit EEE supported by both link partners
eee1000: 1GBit EEE supported by both link partners

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 44022
2015-01-18 00:53:59 +00:00
Felix Fietkau
bdc0750191 ar8216: introduce enable_eee swconfig attribute to control 802.3az EEE per port
Users reported network issues with AR8327 which turned out to be caused
by EEE not working correctly with certain link partners (ticket 14597).
The workaround was to disable EEE on all ports (changeset 41577).

The issue was with certain link partners only, therefore this patch
allows to control usage of EEE per port via swconfig.
Still the default is to initially disable EEE on all ports.

Successfully tested on a TL-WDR4900 (AR8327 rev.4)

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 44021
2015-01-18 00:53:53 +00:00
John Crispin
64ccdb98fb ar8216: introduce ar8xxx_reg_clear complementing ar8xxx_reg_set
Introduce ar8xxx_reg_clear complementing ar8xxx_reg_set.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 44004
2015-01-17 14:24:56 +00:00
John Crispin
0fb39e6f4b ar8216: replace ar8xxx_rmw with ar8xxx_reg_set where appropriate
Replace ar8xxx_rmw with ar8xxx_reg_set where appropriate.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 44003
2015-01-17 14:24:47 +00:00
John Crispin
1cb2596f19 ar8216: define all switch_addr structs as const
Define all switch_addr structs as const.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 44002
2015-01-17 14:24:40 +00:00
Luka Perkov
9db3df9d6b mvsw61xx: track and set per-VLAN port state in STU
Since the driver doesn't know anything about (M)STP
we just hard-set the ports to be enabled if they are
part of the VLAN.

Signed-off-by: Claudio Leite <leitec@staticky.com>

SVN-Revision: 43938
2015-01-11 17:20:16 +00:00
Luka Perkov
0b2cbeca7a mvsw61xx: clean up and expand register definitions
- eliminate MV_CPUPORT; not necessary since we define
  the CPU port(s) via Device Tree

- add STU and expand VTU operations

- update register names to match those of 88E61xx rather than
  mvswitch's 88E6060

- use more consistent formatting

Signed-off-by: Claudio Leite <leitec@staticky.com>

SVN-Revision: 43937
2015-01-11 17:20:06 +00:00
Luka Perkov
1e39f3aef8 mvsw61xx: rework chip recognition
Recognizes 88E6171/6172/6176 at the moment.

Signed-off-by: Claudio Leite <leitec@staticky.com>

SVN-Revision: 43936
2015-01-11 17:20:03 +00:00
Luka Perkov
a1872182bb mvsw6171: rename to 'mvsw61xx'
In preparation for properly supporting switches
beyond the 88E6171.

Signed-off-by: Claudio Leite <leitec@staticky.com>

SVN-Revision: 43935
2015-01-11 17:19:58 +00:00
Felix Fietkau
1cbf0fbcb4 ar8216: factor out AR8327/AR8337-specific driver code into ar8327.c
Move all AR8327/AR8337-specific driver code into a separate source file
ar8327.c and adjust patches so that ar8327.c is compiled if
CONFIG_AR8216_PHY is set.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43845
2015-01-05 13:03:07 +00:00
Felix Fietkau
cc02d4c72d ar8216: move definitions from ar8216.c to ar8216.h and introduce ar8327.h
Move several structure definitions and #defines from ar8216.c
to ar8216.h and move AR8327/AR8337 header stuff into a new
header file ar8327.h.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43844
2015-01-05 13:02:57 +00:00
Felix Fietkau
5506420980 kernel: remove openwrt micrel.c (replaced by upstream driver)
Signed-off-by: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 43762
2014-12-22 14:37:07 +00:00
Luka Perkov
0847247129 mvsw6171: note support for 88E6172 switches
The '6171 and '6172 are similar enough to work
without any changes to the code.

Signed-off-by: Claudio Leite <leitec@staticky.com>

SVN-Revision: 43753
2014-12-19 22:02:59 +00:00
Felix Fietkau
2f9b042d69 ar8216: Inline function ar8xxx_create_mii
Inline function ar8xxx_create_mii.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43743
2014-12-18 11:28:47 +00:00
Felix Fietkau
2289c7a010 ar8216: Remove read/write/rmw member functions from ar8xxx_priv
Remove read/write/rmw member functions from ar8xxx_priv

There seems to be no real benefit of the ar8xxx_priv member functions
read/write/rmw as one implementation exists for each of them only.
Especially ar8xxx_mii_rmw is assigned to priv->rmw first and then
mapped to ar8xxx_rmw.
Rename the ar8xxx_mii_.. functions to ar8xxx_.. and use them directly.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43742
2014-12-18 11:28:39 +00:00
Felix Fietkau
45a494b808 ar8216: Create helpers mii_read32 / mii_write32 for 32 bit MII ops
Create helpers mii_read32 / mii_write32 for 32 bit MII ops.
Rename r3 variable to page in ar8xxx_mii_write to make it consistent
with the other ar8xxx_mii_xxxx functions.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43741
2014-12-18 11:28:34 +00:00
Felix Fietkau
0e7f844c66 ar8216: Factor out chip-specific parameters from ar8xxx_probe_switch
Factor out chip-specific parameters from ar8xxx_probe_switch.
Move the ar8xxx_chip definitions after the swops definitions.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43740
2014-12-18 11:28:28 +00:00
Felix Fietkau
054767cebc ar8216: remove unused function parameter in ar8327_led_register
Remove unused function parameter in ar8327_led_register.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43739
2014-12-18 11:28:20 +00:00
Felix Fietkau
5b16fd1bf8 ar8216: enable cpu port to receive arp and broadcast frames for ar8236
Signed-off-by: Weijie Gao <hackpascal@gmail.com>

SVN-Revision: 43668
2014-12-12 16:23:29 +00:00
John Crispin
9b5f583906 kernel: add driver for Marvell 88E6171 switch
This is a swconfig driver for the Marvell 88E6171 switch,
which is a 7-port GigE switch with two CPU ports and 64
802.1q VLANs.

Signed-off-by: Claudio Leite <leitec@staticky.com>

SVN-Revision: 43486
2014-12-01 21:30:35 +00:00
John Crispin
ecd27db757 ar8216: factor out reg_port_stats_base parameters to ar8xxx_chip
Factor out reg_port_stats_base parameters to ar8xxx_chip.
Remove related chip_is_... checks.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43471
2014-12-01 16:15:08 +00:00
John Crispin
ae15531bd2 ar8216: factor out mii_lo_first to ar8xxx_chip
Factor out mii_lo_first to ar8xxx_chip.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43470
2014-12-01 16:15:02 +00:00
John Crispin
ea9324f3d3 ar8216: factor out chip-specific data structures from ar8xxx_priv
Factor out chip-specific data structures from ar8xxx_priv.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43469
2014-12-01 16:14:54 +00:00
John Crispin
a3b651635f ar8216: factor out set_mirror_regs to ar8xxx_chip
Factor out set_mirror_regs to ar8xxx_chip.
Remove related chip_is_... checks.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43468
2014-12-01 16:14:43 +00:00
John Crispin
b82a08f5b6 ar8216: factor out mib_func to ar8xxx_chip
Factor out mib_func to ar8xxx_chip. Remove related chip_is_... checks.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43467
2014-12-01 16:14:39 +00:00
John Crispin
af003867b1 ar8216: factor out info whether switch should be configured at probe stage to ar8xxx_chip
Factor out info whether switch should be configured at probe stage
to ar8xxx_chip. Remove related chip_is_... checks.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43466
2014-12-01 16:14:32 +00:00
Felix Fietkau
14db2826ad ar8216: suppress PHY reset for linux 3.14
Signed-off-by: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 43410
2014-11-27 18:26:06 +00:00
Felix Fietkau
35902404fc ar8216: Fix issue with autoneg being disabled under 3.14, revert 43332
Patch reverts 43332 which seems to cause issues with VLAN functionality.
Add a specific check to check whether ANEG is still enabled and re-enable
it if necessary. Disable generic phy soft reset for kernel >=3.16.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43356
2014-11-24 09:33:48 +00:00
Felix Fietkau
c9340fd8a9 ar8216: Use generic hw_init from ar8236 for ar8216 too
We should make sure that also for ar8216 hw gets initialized.
For ar8216 hw_init is a dummy currently. The hw_init used for ar8236
should be generic enough to be usable with ar8216 too.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43334
2014-11-20 15:19:15 +00:00
Felix Fietkau
0178b516a2 ar8216: simplify PHY fixup/init
Move the PHY fixup call to the PHY init loop.
Use ar8xxx_has_gige in the PHY init instead of passing the gigE
capability via function parameter.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43333
2014-11-20 15:19:04 +00:00
Felix Fietkau
43e3e88379 ar8216: use genphy_config_aneg also for PHY 0
Kernel 3.14 introduced a switch reset in phy_init_hw in drivers/net/phy
causing BMCR_ANENABLE to get cleared.

Due to the fact that ar8xxx_phy_config_aneg does nothing for
PHY 0 autonegatiation support remains disabled.
This can cause ports to operate at 10MBit/half-duplex only.

Fix this by calling genphy_config_aneg for PHY 0 too as
genphy_config_aneg sets BMCR_ANENABLE if it's not yet set.
Fixes: ticket 17800

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43332
2014-11-19 20:18:01 +00:00
Felix Fietkau
898712f43f ar8216: factor out PHY init code into a generic function
PHY init code in the switch-specific hw_init functions is mainly
identical. Factor it out into a generic ar8xxx_phy_init function.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 43331
2014-11-19 20:17:52 +00:00
Felix Fietkau
20baeb5595 ar8216: introduce fixup_phys callback in ar8xxx_chip
Move phy fixup code from the chip-specific hw_init functions into a
fixup_phys callback.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43330
2014-11-19 20:17:43 +00:00
Felix Fietkau
37fefea79b ar8216: after a switch reset poll until BCMR_RESET is cleared
Currently there is a fixed 1000ms wait time after the switch was reset.
Most if not all switches need much less time to perform a reset.
Therefore replace the fixed wait time with polling for BMCR_RESET to
be cleared.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 43329
2014-11-19 20:17:37 +00:00