Commit graph

10 commits

Author SHA1 Message Date
Henryk Heisig
eec0c41375 ar71xx: QCA956X: add missing register
Signed-off-by: Henryk Heisig <hyniu@o2.pl>
2017-01-26 11:38:20 +01:00
John Crispin
b269a3520d Revert "ar71xx: Allow to set the RXDV, RXD, TXD, TXE delays for QCA955x"
The default delays RXD 3. RDV 3, TXD 0, TXE 0 doesn't seem to work for some
boards. These boards depend on the preset values of u-boot which may
differ.

This reverts commit f2d4bb96b62512caa161dcc2867c91692fb16a38.

Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>

SVN-Revision: 49071
2016-03-23 12:52:17 +00:00
John Crispin
22c5f96c6b ar71xx: Allow to set the RXDV, RXD, TXD, TXE delays for QCA955x
Some u-boot versions for QCA955x change the delays based on the link speed
during boot. This usually breaks the support of other linkspeeds when
OpenWrt is booted. It also conflicts with the
at803x_platform_data::fixup_rgmii_tx_delay. OpenWrt has to set its own
values in QCA955X_GMAC_REG_ETH_CFG.

The default RGMII values from the Atheros u-boot are currently used to
preset the existing mach files. These may have to be adjusted for boards
using different values but which are not currently set them explicitely in
OpenWrt.

Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Christian Beier <cb@shoutrlabs.com>
Cc: Chris R Blake <chrisrblake93@gmail.com>
Cc: Benjamin Berg <benjamin@sipsolutions.net>
Cc: Heiner Kallweit <hkallweit1@gmail.com>
Cc: Cezary Jackiewicz <cezary.jackiewicz@gmail.com>
Cc: Matthias Schiffer <mschiffer@universe-factory.net>
Cc: Dirk Neukirchen <dirkneukirchen@web.de>
Cc: Christian Mehlis <christian@m3hlis.de>
Cc: Luka Perkov <luka@openwrt.org>
Cc: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 49029
2016-03-16 09:27:08 +00:00
Felix Fietkau
f4e6418a32 ar71xx: add a helper function to set RXDV/RXD of ETH_CFG on AR934x
The ETH_RXDV_DELAY (17:16) and ETH_RXD_DELAY (15:14) are currently not cleared
by the function ath79_setup_ar934x_eth_cfg. Clearing these in the
ath79_setup_ar934x_eth_cfg may cause problems on some hardware because they
rely on the preset value by the bootloader.

Instead another function is introduced which also works on ETH_CFG on AR934x.
It can be used to safely clear and set ETH_RXDV_DELAY and ETH_RXD_DELAY on
machines which require special settings.

Signed-off-by: Sven Eckelmann <sven@open-mesh.com>

SVN-Revision: 45523
2015-04-20 15:00:52 +00:00
Gabor Juhos
ee3dfafaf1 ar71xx: add a helper function for setting up ETH_CFG register on QCA955x
Signed-off-by: Jon Suphammer <jon@suphammer.net>
Patchwork: http://patchwork.openwrt.org/patch/5839/
[juhosg: fix coding style]
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

SVN-Revision: 41623
2014-07-13 19:43:56 +00:00
Gabor Juhos
ba860e4c3a ar71xx: make ag71xx_mdio_platform_data visible
This enables us to modify the ag71xx_mdio_platform_data from within the
board support files.

Signed-off-by: Felix Kaechele <heffer@fedoraproject.org>
Patchwork: http://patchwork.openwrt.org/patch/4613/
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

SVN-Revision: 39126
2013-12-17 22:14:07 +00:00
Gabor Juhos
e312a917d3 ar71xx: rename ath79_parse_mac_addr to ath79_parse_ascii_mac
Rename the function and extend it in order to make it
usable from board setup code.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

SVN-Revision: 38085
2013-09-20 16:41:30 +00:00
Gabor Juhos
5ffc08e3dc ar71xx: add a helper function for setting up ETH_CFG register on AR934x
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

SVN-Revision: 33817
2012-10-17 18:27:45 +00:00
Felix Fietkau
dc9675282e ar71xx: add a helper function for setting up PHY4 swapping on ar933x
SVN-Revision: 32092
2012-06-06 17:24:09 +00:00
Gabor Juhos
d72bde99cd ar71xx: merge files-3.2 to files
SVN-Revision: 30405
2012-02-10 08:19:31 +00:00
Renamed from target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-eth.h (Browse further)