Commit graph

13 commits

Author SHA1 Message Date
Ram Chandra Jangir
bf7719f22c kernel: ar83xx: Add support for three GMAC's connection
We have IPQ8064 AP161 board which has three GMAC's
 * RGMII x2
 * SGMII x1.
The existing ar8327 driver does not have support for
three GMAC's connection, hence this change adds support
for the same. This has been verified on AP148 and AP161
board.

Signed-off-by: xiaofeis <xiaofeis@codeaurora.org>
Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
2018-12-06 08:15:27 +01:00
Günther Kelleter
33878b0a40 kernel: ar8xxx: get_arl_table now shows all ports of an entry
Multicast ARL entries can have multiple destination ports. Get and dump
all destination ports of each entry, not just the lowest.

Signed-off-by: Günther Kelleter <guenther.kelleter@devolo.de>
2018-11-26 18:41:21 +01:00
Mathias Kresin
6b13238a13 generic: revert workarounds for AR8337 switch
The intention of 967b6be118 ("ar8327: Add workarounds for AR8337
switch") was to remove the register fixups for AR8337. But instead they
were removed for AR8327.

The RGMII RX delay is forced even if the port is used as phy instead of
mac, which results in no package flow at least for one board.

Fixes: FS#1664

Signed-off-by: Mathias Kresin <dev@kresin.me>
2018-08-23 22:40:59 +02:00
Tan Hong Hui
1263d07b89 kernel: ar83xx: add support to configure per port VLAN priority
Add support to allow for per switch port VLAN priority (PCP) bits
for the ar8327/8337 chip using the swconfig utility.

Tested on Netgear R7800

Signed-off-by: Tan Hong Hui <hhtan72@yahoo.com>
2018-02-20 10:33:34 +01:00
Vittorio Gambaletta
967b6be118 ar8327: Add workarounds for AR8337 switch.
RGMII RX delay setting needs to be always specified for AR8337 to
avoid port 5 RX hang on high traffic / flood conditions.

Also, the HOL registers that set per-port and per-packet-priority
buffer sizes are updated with the reduced values suggested by the
QCA switch team.

Finally, AR8327 reserved register fixups are disabled for the AR8337.

This patch is adapted from the Code Aurora QSDK, but with magic
values mapped to proper defines.

Signed-off-by: Vittorio Gambaletta <openwrt@vittgam.net>
2017-03-30 09:48:52 +02:00
Felix Fietkau
7eeb254cc4 treewide: replace nbd@openwrt.org with nbd@nbd.name
Signed-off-by: Felix Fietkau <nbd@nbd.name>
2016-06-07 08:58:42 +02:00
John Crispin
d3776bdfc9 AR8216: make ARL age time configurable
The default TTL for address resolution table entries is 5 minutes
for all members of the AR8216 family. This can cause issues if
e.g. Wifi clients roam to another AP and their MAC appears on
another switch port suddenly. Then the client may not be reachable
until the old ARL entry expires.
I would have expected the switch to invalidate old entries if it
detects the same MAC on another port. But that's not the case.

Therefore make the TTL for ARL entries configurable.
The effective TTL will always be a multiple of 7 seconds.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 48913
2016-03-04 08:33:30 +00:00
Felix Fietkau
f8d2ec6e9d ar8327: add IGMP Snooping support
This add support for IGMP Snooping on atheros switches (disabled by default),
which avoids flooding the network with multicast data.

Tested on TL-WDR4300: disabling IGMP Snooping results in multicast flooding
on each specific port, enabling it back again prevents each port from
receiving all multicast packets.

Partially based on: http://patchwork.ozlabs.org/patch/418122/

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

SVN-Revision: 48268
2016-01-17 10:42:46 +00:00
Felix Fietkau
00e599b0b7 ar8216: add ARL table flushing per port
Adds functions for flushing ARL table entries per port.

Successfully tested on AR8327. Implementation for AR8216/AR8236/AR8316
is based on the AR8236 datasheet and assumes that the three chips
share a common ATU register layout.
Compile-tested only for AR8216/AR8236/AR8316.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 46380
2015-07-15 08:17:28 +00:00
Felix Fietkau
3a313a3e11 ar8216: add swconfig attribute to display ARL table on AR8327/AR8337
Add global read-only swconfig attribute "arl_table" to display the
address resolution table.
So far the chip-specific part is implemented for AR8327/AR8337 only
as I don't have the datasheets for the other AR8XXX chips.

Successfully tested on TL-WDR4300 (AR8327rev2)
and TL-WDR4900 (AR8327rev4).

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 44104
2015-01-24 19:42:06 +00:00
Felix Fietkau
6dfea16ab9 ar8216: display flow control info in swconfig get_link in case of autonegatiation too
The swconfig get_link attribute (at least) on AR8327/AR8337 doesn't
consider the autonegotiated flow control.
AR8327/AR8337 provide the info about autonegotiated rx/tx flow control
in bits 10 and 11 of the port status register.
Use these values to display info about autonegotiated rx/tx flow
control as part of the get_link attribute.

Successfully tested on TL-WDR4900 (AR8327 rev.4) and
TL-WDR4300 (AR8327 rev.2).

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 44023
2015-01-18 00:54:06 +00:00
Felix Fietkau
bdc0750191 ar8216: introduce enable_eee swconfig attribute to control 802.3az EEE per port
Users reported network issues with AR8327 which turned out to be caused
by EEE not working correctly with certain link partners (ticket 14597).
The workaround was to disable EEE on all ports (changeset 41577).

The issue was with certain link partners only, therefore this patch
allows to control usage of EEE per port via swconfig.
Still the default is to initially disable EEE on all ports.

Successfully tested on a TL-WDR4900 (AR8327 rev.4)

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 44021
2015-01-18 00:53:53 +00:00
Felix Fietkau
cc02d4c72d ar8216: move definitions from ar8216.c to ar8216.h and introduce ar8327.h
Move several structure definitions and #defines from ar8216.c
to ar8216.h and move AR8327/AR8337 header stuff into a new
header file ar8327.h.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43844
2015-01-05 13:02:57 +00:00