This should help finding potential problems with the SPI driver.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 47209
Until now the SPI driver used the TX bits for the RX FIFO. This seems
uncritical for now since both are equals on my devices (VR9), but this
could cause problems on other SoCs.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 47208
This reverts commit 68c2e4789b4f071ee75d39248f4d08fe8283eb28.
commit r47159 was bad
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 47207
add the SDK alsa driver. this has only been tested on mt7628/88 and wm8960.
mt7620 is only compile tested.
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 47205
When talking to an atmel controller we need 9600 or 250000 baud.
as 250000 does not exist we use 2500000.
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 47204
* use build step mktplinkfw with extra arguments
* remove now unused mktplinkfw-chn-v2
* use Device/tplink
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
SVN-Revision: 47175
Allow to pass extra arguments to mktplinkfw step. Some board requires
an extra argument to create a valid image.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
SVN-Revision: 47174
These profiles covered by new image/Makefile descriptions. Only the old format uses
MultiProfile macro
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
SVN-Revision: 47173
This patch fixes a wrong non pre-emptive crc errors output of
dsl_control.sh status.
Signed-off-by: Luca Debernardi <luca.debernardi@gmail.com>
SVN-Revision: 47172
The device is similar to the TD-W8970, beside a different Atheros 2.4 GHz
wireless chip and the additional, PCI connected, WAVE300 5 GHz wireless.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 47130
Port of r41856.
In contrast to the brcm63xx target, it isn't sufficient to enable/disable
the bridge. The device needs to be enabled/disabled to fix the hang. The
bridge will be automatically enabled by the time the connected device is
enabled.
Fixes boot on TD-W8980.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 47129
This adds the changes from r46219 to the linux 4.1 patches as well.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 47128
This way it's easier to configure device tree overlays, customize other
parameters...
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
SVN-Revision: 47126
Right now, selecting kmod-sound-soc-bcm2708-i2s causes build errors due to
missing configs.
kmod-regmap enables I2C and SPI, causing build errors due to depending
variables not defined.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
SVN-Revision: 47123
when sleep mode is disable use MIPS as clocksource and clockevent instead of systick.
because MIPS timer has higher resolution 5ns less than systick 20us and
larger counter bits 32 > 16.
clean interrupt by write compare register at isr.
fix typo cause sleep mode not enable.
Signed-off-by: Michael Lee <igvtee@gmail.com>
SVN-Revision: 47122
Due to datasheet of rt3883 SoC rgmii1 port handles pins 84-95 and rgmii2 port handles pins 72-83. When this function ports gets added to rt3883_pinmux_data there's wrong pinmux bits set (RT3883_GPIO_MODE_GE1 manages 84-95 pins and RT3883_GPIO_MODE_GE2 manages 72-83). So when enabling rgmii2 as GPIO driver confuses hardware and nothing work, neither rgmii nor gpio.
Also in '0030-pinctrl-ralink-add-pinctrl-driver.patch' typo in name of rgmii2 port.
Signed-off-by: Nick Leiten <nickleiten@gmail.com>
SVN-Revision: 47118
The default switch frame size (with FCS + header) is 1536 bytes. But the
GMAC only accepted frames up to 1522 bytes. Setting it to 1536 allows to
receive ethernet frames using the full of MTU 1500 + an extra VLAN header +
VLAN header added by the switch.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 47117
The driver assumes that the maximum received buffer for non-jumbo frames is
1536 bytes. But the allocation of the rx fragment doesn't reflect that. It
currently allocates fragments which will only be large enough to be used as
rx buffer with the size of 1534 bytes. This is problematic because the GMAC
will now try to write to 2 bytes which don't belong to its receive buffer
when a large enough ethernet frame is received.
This may already be a problem on existing chips but will at least become a
problem when the 1536 byte rx modus is enabled on MT7621a. It is required
on this SoC to receive ethernet frames which use their full 1500 bytes MTU
and a VLAN header next to the switch VLAN tag.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 47116
The length of the DMA rx buffer was always set to 0 because the function
for extracting the length was used to calculate the value for setting it.
Instead the macro has to be split in a get and set function similar to the
TX_DMA_(GET_|)PLEN(0|1) macro.
No problem was noticed on MT7621a before this was changed and thus maybe it
was hidden by different problem which is not yet fixed.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 47115
