Fix the incorrect usage of ar934x_nfc_write_page and ar934x_nfc_write_page_raw.
Add *page* in the argument list and remove the local variable.
Signed-off-by: Paul Wassi <p.wassi@gmx.at>
In 814d70b2 the member mac06_exchange_en of struct
ar8327_pad_cfg was changed to mac06_exchange_dis,
but wpj344 was not adopted to stay in sync.
Signed-off-by: Christian Mehlis <christian@m3hlis.de>
Reported-by: Nick Dennis <ndennis@rapiduswireless.com>
This patch adds support solely for version 1 of the TP-Link WR802N.
It is based on Rick Pannen's patch posted on the OpenWrt devel list.
Signed-off-by: Julius Schulz-Zander <julius@inet.tu-berlin.de>
On the stock Meraki Firmare for the MR12/MR16, a chunk of SPI space
after u-boot-env is used to store the boards Mac address. Sadly as this
was removed on any device already on OpenWRT/LEDE, moving forward a new,
64k partition named "mac" will be used to store the mac address for the
device (which is the minimum size). This allows users to properly set
the correct MAC, without editing the ART partition (which holds the same
MAC for all devices).
The reason the space is taken from kernel instead of rootfs is currently
kernels are only 1.3MB, so that way we can leave the current rootfs
space alone for users who fully utilize the available storage space.
Once this partition is added to a device, you can set your MAC doing the
following:
mtd erase mac
echo -n -e '\x00\x18\x0a\x33\x44\x55' > /dev/mtd5
sync && reboot
Where 00:18:0a:33:44:55 is your MAC address.
This was tested, and confirmed working on both the MR12 and MR16.
Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
This patch adds support for the Airtight C-60.
SOC: Atheros AR9344 rev 2 (CPU:560.000MHz)
RAM: 128 MiB
NOR: MX25L3205D 4MiB
NAND: ST Micro NAND 32MiB 3,3V 8-bit
SW-NET: AR8327N (2 Ports)
WLAN1: Dual-Band AR9340 Rev:2 (built-in SoC)
WLAN2: Dual-Band AR9300 Rev:4 PCIe Chip
The switch is setup for an accesspoint:
LAN1: (gigabit) is the wan-port.
LAN2: (fast ethernet) is bridged with the br-lan.
Flashing Guide (via initramfs):
1. Connect a PC to the serial port of the C-60.
power up the C-60.
Enter u-boot command prompt:
#> nand erase
#> setenv bootcmd "bootm 0x9f060000"
#> saveenv
#> setenv ipaddr 192.168.1.1
#> setenv netmask 255.255.255.0
#> setenv serverip 192.168.1.100
#> setenv bootfile lede-ar71xx-nand-c-60-initramfs-kernel.bin
#> tftpboot
#> bootm
2. Wait for the C-60 to boot LEDE.
On the root prompt. Enter:
# ubiformat /dev/mtd4
# ubiattach -p /dev/mtd4
3. After that copy the sysupgrade.tar onto the router and run:
# sysupgrade sysupgrade.tar
to flash the image.
Special thanks to Chris Blake <chrisrblake93@gmail.com>. He provided
a C-60 unit and he helped with debugging the switch, LEDs and platfrom
support.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
This patch adds support for Cisco's Z1.
Detailed instructions for the flashing the device can
be found in the OpenWrt wiki:
<https://wiki.openwrt.org/toh/meraki/z1>
Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
Zbtlink ZBT-WE1526 is based on Qualcomm Atheros QCA9531 v2.
Short specification:
- 650/400/200 MHz (CPU/DDR/AHB)
- 5x 10/100 Mbps Ethernet
- 1x USB 2.0
- 128 MB of RAM (DDR2)
- 16 MB of FLASH
- 2T2R 2.4 GHz, up to 22 dBm
- two external, non-detachable antennas
- 8x LED, 1x button
- UART header (pinout: VCC, RX, TX, GND)
Flash instruction:
Use sysupgrade in vendor firmare which is based on OpenWrt.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
jjPlus JWAP230 is based on Qualcomm Atheros QCA9558 + QCA8337.
Short specification:
- 720/600/200 MHz (CPU/DDR/AHB)
- 2x 10/100/1000 Mbps Ethernet
- 128 MB of RAM (DDR2)
- 16 MB of FLASH
- 3T3R 2.4 GHz with external PA (SST12LP15A), up to 28 dBm
- 3x MMCX connectors
- power input: 802.3at PoE or wide range DC (36-57 V)
- optional 802.3af PSE
- 1x mini-PCIe connector with PCIe, USB buses and SIM slot
- 1x mini-PCIe connector with PCIe bus
- 1x USB type-A connector
- 6x LED, 1x button (hardware reset)
- RS232 (MAX3223) and (E)JTAG headers
Default configuration:
- WAN on eth1 (RJ45 near LEDs with PoE input)
- LAN on eth0 (RJ45 near DC jack)
- left top LED set to be status LED
- all LEDs configurable form user space
Flash instruction (do it under U-Boot, using RS232):
1. tftp 0x80060000 lede-ar71xx-generic-jwap230-squashfs-sysupgrade.bin
2. erase 0x9f050000 +$filesize
3. cp.b $fileaddr 0x9f050000 $filesize
4. setenv bootcmd "bootm 0x9f050000"
5. saveenv && reset
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Wallys DR531 is based on Qualcomm Atheros QCA9531 v2.
Short specification:
- 550/400/200 MHz (CPU/DDR/AHB)
- 2x 10/100 Mbps Ethernet
- 64 MB of RAM (DDR2)
- 8 MB of FLASH
- 2T2R 2.4 GHz with external PA (SE2576L), up to 30 dBm
- 2x MMCX connectors
- mini-PCIe connector with PCIe/USB buses and SIM slot
- 7x LED, 1x button, 1x optional buzzer
- UART, (E)JTAG and LED headers
Default configuration:
- WAN on eth1 (RJ45 near DC jack)
- LAN on eth0 (RJ45 near button)
- S4 LED set to be status LED
- all LEDs configurable form user space
- button configured for reset
Flash instruction (do it under U-Boot, using UART):
1. tftp 0x80060000 lede-ar71xx-generic-dr531-squashfs-sysupgrade.bin
2. erase 0x9f050000 +$filesize
3. cp.b $fileaddr 0x9f050000 $filesize
4. setenv bootcmd "bootm 0x9f050000"
5. saveenv && reset
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
In new kernels we should use clk_prepare_enable instead of clk_enable
since clk_enable does not make proper initialization that leads
to rise WARN_ON messages and not working spi bus on the device.
Signed-off-by: Sergey Sergeev <adron@yapic.net>
Should fix LAN speed issues on some devices. This is an updated version
of the previously reverted commit with the same name.
It improves the check for MACs connected to a built-in switch
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This patch adds the target profile SOM9331 and configures hardware
functionality for the 3x Eth Ports & corresponding LED's, the USB Host,
the USART to USB bridge and the System LED.
Signed-off-by: Allan Nick Pedrana <nik9993@gmail.com>
The cpe510 has two calibration tables. The first calibration
table requires to modify ath9k driver to work (patched tx gain table).
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
The LNA improves the rx path. Within a simple test setup
it improved the signal from -60dbm to -40dbm.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
- CPU QCA9531-BL3A
- RAM: 64MB
- flash: 16MB
- USB
AP143 platform, similar to tl-wr841n v10/v11, but with USB
Signed-off-by: Cezary Jackiewicz <cezary@eko.one.pl>
