A re-write of the driver based on xway_nand.c and constants as
well as the cmd_ctrl() function from the original oxnas_nand.c
resulted in a extremely similar looking file (see diffsize),
and fixes the issue of NAND not being detected on newer kernels.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
SVN-Revision: 48986
As usual these patches were extracted from the raspberry repo:
https://github.com/raspberrypi/linux/commits/rpi-4.4.y
- Disable unused MFD RPISENSE driver.
- Disable ethernet HW checksums in order to avoid kernel exceptions.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
SVN-Revision: 48985
Looks like the addresses for BCM3368 were wrongly defined when DT
support was introduced.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
SVN-Revision: 48980
According to the calling convention of the o32 ABI the caller
function must reserve stack space for $a0-$a3 registers in case
the callee needs to save its arguments.
The assembly code of the loader does not reserve stack space for
these registers thus when the 'loader_main' function needs to save
its arguments, those will be stored in the 'workspace' area instead
of the stack.
Because the workspace area is also used by other part of the code, the
saved register values gets overwritten and this often leads to failed
kernel boots.
Fix the code to reserve stack space for the registers to avoid this
error.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
[noltari: apply the fix for brcm63xx too]
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
SVN-Revision: 48979
This only drops WGR614 V9 which has 2 MiB flash and it's unlikely to get
any interest.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 48975
add support for Planex MZK-WDPR.
MZK-WDPR(MZK-WDPR-R01) is internet radio tuner.
This patch is "network board" in MZK-WDPR.
LCD board is non OpenWrt Platform.
Signed-off-by: YuheiOKAWA <tochiro.srchack@gmail.com>
SVN-Revision: 48968
Complete internal switch initialization for QCA956X.
Set default mdio device if the interface mode of GE0 is not SGMII (fix ticket #21520).
Signed-off-by: Weijie Gao <hackpascal@gmail.com>
SVN-Revision: 48937
The function memblock_insert_region() is in the section
__init_memblock, also put crashlog_init_memblock there.
This fixes this section mismatch warning:
The function memblock_insert_region.isra.1() references
the function __meminit crashlog_init_memblock().
This is often because memblock_insert_region.isra.1 lacks a __meminit
annotation or the annotation of crashlog_init_memblock is wrong.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 48931
The buildbots complained about these config options being missing for arm64:
CONFIG_DUMMY_CONSOLE_COLUMNS=80
CONFIG_DUMMY_CONSOLE_ROWS=25
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 48929
This patch provides full GPIO support for WNR612v2 (LEDs and buttons).
It exposes all LEDs to operating system, including Ethernet ones.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
SVN-Revision: 48924
This patch add speed_mask parameter to Ethernet port LED initialization
during system startup. LEDs are configured to show amber light for 10 Mbps
link and green for 100 Mbps as described on device label.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
SVN-Revision: 48923
This patch provides full GPIO support for WNR2000v3 (LEDs and buttons).
It exposes all LEDs to operating system, including Ethernet ones.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
SVN-Revision: 48922
Combine all bus operations for one MMD access in one function.
Protecting all these bus operations with one lock also helps
to avoid potential issues due to bus operations intercepting
the register and data write.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 48914
The default TTL for address resolution table entries is 5 minutes
for all members of the AR8216 family. This can cause issues if
e.g. Wifi clients roam to another AP and their MAC appears on
another switch port suddenly. Then the client may not be reachable
until the old ARL entry expires.
I would have expected the switch to invalidate old entries if it
detects the same MAC on another port. But that's not the case.
Therefore make the TTL for ARL entries configurable.
The effective TTL will always be a multiple of 7 seconds.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 48913
The line before includes the port number anyway so there's no need
to duplicate the port number in the MIB info header.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 48912
The decimal values especially for TxByte and RxGoodByte are hard to read
once bigger amounts of data have been transferred.
Therefore complement the decimal values with info in GiB / MiB / KiB.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 48911
For unused switch ports all MIB values are zero. Displaying ~40 empty
MIB counters is just confusing and makes it hard to read the output of
swconfig dev <dev> show.
Therefore, if all MIB counters for a port are zero, just display
an info that the MIB counters are empty.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 48910
This patch adds profiles and support for building factory and
sysupgrade images for JHR-N805R, JHR-N825R and JHR-N926R.
Signed-off-by: Reinhard Max <reinhard@m4x.de>
Reviewed-by: Torsten Duwe <duwe@lst.de>
SVN-Revision: 48906
This patch adds support for JHR-N805R, JHR-N825R and JHR-N926R to
various scripts in the base-files directory.
Signed-off-by: Reinhard Max <reinhard@m4x.de>
Reviewed-by: Torsten Duwe <duwe@lst.de>
SVN-Revision: 48905
Add a device tree for JCG JHR-N825R
This router is based on a RT3052 and has 4MB of CFI flash and 32MB of
SDRAM. As a special feature, it comes with a two digit seven segment
display that is connected to a pair of daisy-chained 74164 shift
registers that can be controlled via GPIOs.
For details, see https://wikidevi.com/wiki/JCG_JHR-N825R .
Signed-off-by: Reinhard Max <reinhard@m4x.de>
Reviewed-by: Torsten Duwe <duwe@lst.de>
SVN-Revision: 48904
Add a device tree for JCG JHR-N825R
This router is based on a RT3052 and has 4MB of CFI flash and 32MB of
SDRAM. For details, see https://wikidevi.com/wiki/JCG_JHR-N825R .
Signed-off-by: Reinhard Max <reinhard@m4x.de>
Reviewed-by: Torsten Duwe <duwe@lst.de>
SVN-Revision: 48903
Add a device tree for JCG JHR-N805R
This router is based on a RT3050 and has 4MB of SPI flash and 16MB of
SDRAM. For details, see https://wikidevi.com/wiki/JCG_JHR-N805R .
Signed-off-by: Reinhard Max <reinhard@m4x.de>
Reviewed-by: Torsten Duwe <duwe@lst.de>
SVN-Revision: 48902
