This solution is more upstream compatible as it only requires specifying
of_match_table in the parser code and doesn't depend on linux,part-probe
which is solution made generic by a LEDE downstream patch that can't be
upstreamed.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Tested-by: Stefan Lippers-Hollmann <s.l-h@gmx.de>
Acked-by: John Crispin <john@phrozen.org>
Hardware highlights:
- SoC: Qualcomm Atheros IPQ8064/5 ARM Dual Core CPU
- RAM: (512MB or 1GB) DDR3 System Memory
- Storage: 32MB NOR (Cypress S25FL256S1)
256MB NAND (Micron MT29F2G08ABBEAH4)
- Ethernet: 5 x 1G via QCA8337N
- USB: 1 x USB 2.0/3.0 + 1 x USB 2.0 on mini PCIe3 socket
- PCIe: 3x mini PCIe (third mini PCIE3 is PCIe/USB shared)
- SIM Card Slot: 2 x Slot
- Buttons: Reset Button
- LEDs: 18x, 8x GPIO controllable
- Buzzer
The correct amount of RAM will be passed by the bootloader.
In contrast to the documentation provided by Compex, the third PCIe
doesn't use GPIO16 for PERST. Instead, GPIO3 is shared and used as PERST
for PCIe0 and PCIe2.
So far, no one was able to get USB 3.0 working with the 1GB RAM version,
while it works fine for my 512MB version. Since USB 3.0 doesn't work with
the Compex firmware for the 1G variant either, it could be a hardware
issue with these boards.
OpenWrt will be installed to the NAND flash. Make sure to have a full
working image on the NOR flash. It will be the backup in case anything
goes wrong.
It has been observed that an image loaded via tftpboot might have
bitflips. Hence the extra step to create a crc32 checksum to allow to
compare the checksum with the one from the source file prior to flashing.
In all cases it is necessary to set the following u-boot parameter to an
empty (whitespace) value, to ensure that the chosen bootargs of the dts
isn't overwritten or set to bogus - not working - values:
(IPQ) # set bootargs " "
(IPQ) # set fsbootargs " "
(IPQ) # saveenv
The sysupgrade image can be installed directly on flash using u-boot (put
jumper in JP13 (leave JP9 open) to boot from nand):
(IPQ) # set serverip 192.168.1.20
(IPQ) # set ipaddr 192.168.1.1
(IPQ) # tftpboot 0x42000000 openwrt-ipq806x-compex_wpq864-squashfs-nand-factory.bin
(IPQ) # crc32 0x42000000 $filesize
(IPQ) # nand erase 0x1340000 0x4000000
(IPQ) # nand write 0x42000000 0x1340000 $filesize
The initramfs image can be started using:
(IPQ) # set fdt_high 0x48000000
(IPQ) # tftpboot 0x44000000 openwrt-ipq806x-compex_wpq864-initramfs-fit-uImage.itb
(IPQ) # bootm 0x44000000
Signed-off-by: Christian Mehlis <christian@m3hlis.de>
Signed-off-by: Mathias Kresin <dev@kresin.me>
This patch adds support for GL.iNet GL-B1300
Specification:
- SOC: IPQ4028 / QCA Dakota
- RAM: 256 MiB
- FLASH: 32 MiB
- ETH: Qualcomm Atheros QCA8075 Gigabit Switch (2 x LAN, 1 x WAN)
- USB: 1 x 3.0 (via Synopsys DesignWare DWC3 controller in the SoC)
- WLAN1: Qualcomm Atheros QCA4028 2.4GHz 802.11bgn 2:2x2
- WLAN2: Qualcomm Atheros QCA4028 5GHz 802.11a/n/ac 2:2x2
- INPUT: one reset and one WPS button
- LEDS: 3 leds: Power, WIFI(only for 2.4G currently), and one reserved
- UART: 1 x UART on PCB (3.3V, TX, RX, GND) - 115200 8N1
Installation:
Method 1:
- use serial port to stop uboot
- uboot command: run lf
Method 2:
- push down reset button and power on
- wait until three leds constantly on then release
- upgrade by uboot web at http://192.168.1.1
Note:
- the sysupgrade image need to be renamed to lede-gl-b1300.bin in both method.
- the sysupgrade image can be automatically downloaded if tftp server at
192.168.1.2 have that file.
- the wifi led will be flashing when writing image.
Signed-off-by: Dongming Han <handongming@gl-inet.com>
This patch aligns the device-tree file with the latest
guidelines.
- No longer include qcom-ipq4019-ap.dk01.1.dtsi. This
file is only partially upstream and therefore subjected
to changes that might not be compatible with the board.
As a result, the definitions from the file have been
copied into this dts.
- exclusively use decimal GPIO addresses.
- reorganize the reserved-memory layout to waste less
memory. There's no point in keeping the u-boot loader
around. This should also make it possible to create
an image that will boot with the original EVA/ADAM2 loader
without needing to install the modified u-boot loader.
And finally mark the "tz-apps" as reusable.
There isn't a way to upload apps to the trust-zone in OpenWrt
yet. But it might see some use in the future as a "secure"
key-store/TPM.
- sort the first-level nodes alphabetically.
- sort nodes with an address by the address.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Picking commit from QSDK
https://source.codeaurora.org/quic/qsdk/oss/kernel/linux-msm/commit/?h=eggplant&id=a86bda9f8a7965f0cedd347a9c04800eb9f41ea3
Commit message:
"During removal of the glue layer(dwc3-of-simple), USB master reset is set to active and during insertion it is de-activated."
Change-Id: I537dc810f6cb2a46664ee674840145066432b957
Signed-off-by: Vasudevan Murugesan <vmuruges@codeaurora.org>
(cherry picked from commit 4611e13580a216812f85f0801b95442d02eeb836)"
Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
According to QSDK and OEM tarballs (checked c2600, r7500v2, r7800) 2nd pci slot (pci1, 2,4 GHz card)) on ap148 based boards should operate in gen1 mode.
EA8500 is an exception and according to GPL pcie0 should operate in gen1 mode.
In previous commit we've added the support for this option, so enable it in DT for affected devices.
QSDK ref:
https://source.codeaurora.org/quic/qsdk/oss/kernel/linux-msm/commit/?h=release/endive_preview_cc&id=f3b07fe309027c52fc163149500cedddd707c506
While at it move the phy transmit termination offset value into dtsi file as it's platform specific.
Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
* QCA IPQ401x
* 256 MB of RAM
* 32 MB of SPI NOR flash (s25fl256s1)
- 2x 15 MB available; but one of the 15 MB regions is the recovery image
* 2T2R 2.4 GHz
- QCA4019 hw1.0 (SoC)
- requires special BDF in QCA4019/hw1.0/board-2.bin with
bus=ahb,bmi-chip-id=0,bmi-board-id=16,variant=OM-A42
* 2T2R 5 GHz
- QCA4019 hw1.0 (SoC)
- requires special BDF in QCA4019/hw1.0/board-2.bin with
bus=ahb,bmi-chip-id=0,bmi-board-id=17,variant=OM-A42
* multi-color LED (controlled via red/green/blue GPIOs)
* 1x button (reset; kmod-input-gpio-keys compatible)
* external watchdog
- triggered GPIO
* 1x USB (xHCI)
* TTL pins are on board (arrow points to VCC, then follows: GND, TX, RX)
* 2x gigabit ethernet
* powered only via POE
- 802.3af POE on Ethernet 1
- 18-24v passive POE (mode B) on Ethernet 2
The tool ap51-flash (https://github.com/ap51-flash/ap51-flash) should be
used to transfer the factory image to the u-boot when the device boots up.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
There are only artifacts for these boards in our tree and not even
partial support.
Drop teh stale files.
Signed-off-by: Mathias Kresin <dev@kresin.me>
This changes the cmdline from:
Kernel command line: root=/dev/mmcblk0p5 rootfstype=squashfs,ext4 rootwait noinitrd
Bootloader command line (ignored): board=NBG6817 root=/dev/mmcblk0p5 rootwait zld_ver=2.04 console=ttyHSL1,115200n8 mtdparts=m25p80:0xC0000(SBL)ro,0x40000(TZ)ro,0x40000(RPM)ro,0x80000(u-boot)ro,0x10000(env)ro,0x10000(ART)ro,0x10000(dualflag),0x210000(reserved)
to
Kernel command line: rootfstype=squashfs,ext4 rootwait noinitrd root=/dev/mmcblk0p5
Bootloader command line (ignored): board=NBG6817 root=/dev/mmcblk0p5 rootwait zld_ver=2.04 console=ttyHSL1,115200n8 mtdparts=m25p80:0xC0000(SBL)ro,0x40000(TZ)ro,0x40000(RPM)ro,0x80000(u-boot)ro,0x10000(env)ro,0x10000(ART)ro,0x10000(dualflag),0x210000(reserved)
As a consequence booting from the alternative dual-boot partition set
(root=/dev/mmcblk0p8) becomes possible.
Signed-off-by: Stefan Lippers-Hollmann <s.l-h@gmx.de>
Supported frequencies of all ipq40xx chips are 48, 200, 500 and 716.8 MHz.
Previous 666MHz setting was most likely related to instability of early
chips/boards made before mass production.
Signed-off-by: Roman Yeryomin <roman@advem.lv>
Zyxel NBG6817 features a WiFi button, which becomes functional by setting
correct GPIO. It is a switch-type button, so it emits KEY_RFKILL on each ON
and OFF state. This is achieved by setting input-type to EV_SW.
Signed-off-by: Tolga Cakir <tolga@cevel.net>
Without patch unloading the dwc3-of-simple module went stuck after
successfully removing hcd.1 during the hcd.0 removal:
root@LEDE:/# rmmod dwc3-of-simple
[ 21.391846] xhci-hcd xhci-hcd.1.auto: remove, state 1
[ 21.391931] usb usb4: USB disconnect, device number 1
[ 21.397038] xhci-hcd xhci-hcd.1.auto: USB bus 4 deregistered
[ 21.401111] xhci-hcd xhci-hcd.1.auto: remove, state 1
[ 21.406685] usb usb3: USB disconnect, device number 1
[ 21.412848] xhci-hcd xhci-hcd.1.auto: USB bus 3 deregistered
[ 21.417248] xhci-hcd xhci-hcd.0.auto: remove, state 1
[ 21.422521] usb usb2: USB disconnect, device number 1
followed by nothing.
Sometimes a stall CPU was detected, or a kernel panic,
or a reboot occurred after a couple of minutes.
At the same time unloading the dwc3 module followed by dwc3-of-simple
module was working repeatedly.
root@LEDE:/# rmmod dwc3
[ 53.827328] xhci-hcd xhci-hcd.1.auto: remove, state 1
[ 53.827412] usb usb4: USB disconnect, device number 1
[ 53.832630] xhci-hcd xhci-hcd.1.auto: USB bus 4 deregistered
[ 53.836452] xhci-hcd xhci-hcd.1.auto: remove, state 1
[ 53.842314] usb usb3: USB disconnect, device number 1
[ 53.848412] xhci-hcd xhci-hcd.1.auto: USB bus 3 deregistered
[ 53.852542] xhci-hcd xhci-hcd.0.auto: remove, state 1
[ 53.857882] usb usb2: USB disconnect, device number 1
[ 53.863956] xhci-hcd xhci-hcd.0.auto: USB bus 2 deregistered
[ 53.867875] xhci-hcd xhci-hcd.0.auto: remove, state 1
[ 53.873696] usb usb1: USB disconnect, device number 1
[ 53.879742] xhci-hcd xhci-hcd.0.auto: USB bus 1 deregistered
root@LEDE:/# rmmod dwc3-of-simple
root@LEDE:/#
For the non-working case, the code was stuck in a readl() in
http://lxr.free-electrons.com/source/drivers/usb/host/xhci.c#L91
because
http://lxr.free-electrons.com/source/drivers/usb/dwc3/dwc3-of-simple.c#L126
was disabling the wrong clocks when removing hcd.1 (it was disabling
the clock of hcd.0). That's why the readl() went stuck when removing
hcd.0
The patch however addresses the clock assignment from the Netgear R7500
dts file and backs off the previous attempt.
Now unloading and repeated module loading is working just fine.
root@LEDE:/# rmmod dwc3-of-simple
[ 24.089679] xhci-hcd xhci-hcd.1.auto: remove, state 1
[ 24.089765] usb usb4: USB disconnect, device number 1
[ 24.094856] xhci-hcd xhci-hcd.1.auto: USB bus 4 deregistered
[ 24.098963] xhci-hcd xhci-hcd.1.auto: remove, state 1
[ 24.104522] usb usb3: USB disconnect, device number 1
[ 24.111194] xhci-hcd xhci-hcd.1.auto: USB bus 3 deregistered
[ 24.115086] xhci-hcd xhci-hcd.0.auto: remove, state 1
[ 24.120396] usb usb2: USB disconnect, device number 1
[ 24.126503] xhci-hcd xhci-hcd.0.auto: USB bus 2 deregistered
[ 24.130347] xhci-hcd xhci-hcd.0.auto: remove, state 1
[ 24.135948] usb usb1: USB disconnect, device number 1
[ 24.142085] xhci-hcd xhci-hcd.0.auto: USB bus 1 deregistered
root@LEDE:/#
Fixes: dwc3-of-simple module unloading for Netgear R7500
Signed-off-by: Thomas Reifferscheid <thomas@reifferscheid.org>
Without patch unloading the dwc3-of-simple module went stuck after
successfully removing hcd.1 during the hcd.0 removal:
root@LEDE:/# rmmod dwc3-of-simple
[ 21.391846] xhci-hcd xhci-hcd.1.auto: remove, state 1
[ 21.391931] usb usb4: USB disconnect, device number 1
[ 21.397038] xhci-hcd xhci-hcd.1.auto: USB bus 4 deregistered
[ 21.401111] xhci-hcd xhci-hcd.1.auto: remove, state 1
[ 21.406685] usb usb3: USB disconnect, device number 1
[ 21.412848] xhci-hcd xhci-hcd.1.auto: USB bus 3 deregistered
[ 21.417248] xhci-hcd xhci-hcd.0.auto: remove, state 1
[ 21.422521] usb usb2: USB disconnect, device number 1
followed by nothing.
Sometimes a stall CPU was detected, or a kernel panic,
or a reboot occurred after a couple of minutes.
At the same time unloading the dwc3 module followed by dwc3-of-simple
module was working repeatedly.
root@LEDE:/# rmmod dwc3
[ 53.827328] xhci-hcd xhci-hcd.1.auto: remove, state 1
[ 53.827412] usb usb4: USB disconnect, device number 1
[ 53.832630] xhci-hcd xhci-hcd.1.auto: USB bus 4 deregistered
[ 53.836452] xhci-hcd xhci-hcd.1.auto: remove, state 1
[ 53.842314] usb usb3: USB disconnect, device number 1
[ 53.848412] xhci-hcd xhci-hcd.1.auto: USB bus 3 deregistered
[ 53.852542] xhci-hcd xhci-hcd.0.auto: remove, state 1
[ 53.857882] usb usb2: USB disconnect, device number 1
[ 53.863956] xhci-hcd xhci-hcd.0.auto: USB bus 2 deregistered
[ 53.867875] xhci-hcd xhci-hcd.0.auto: remove, state 1
[ 53.873696] usb usb1: USB disconnect, device number 1
[ 53.879742] xhci-hcd xhci-hcd.0.auto: USB bus 1 deregistered
root@LEDE:/# rmmod dwc3-of-simple
root@LEDE:/#
For the non-working case, the code was stuck in a readl() in
http://lxr.free-electrons.com/source/drivers/usb/host/xhci.c#L91
because
http://lxr.free-electrons.com/source/drivers/usb/dwc3/dwc3-of-simple.c#L126
was disabling the wrong clocks when removing hcd.1 (it was disabling
the clock of hcd.0). That's why the readl() went stuck when removing
hcd.0
The patch however addresses the clock assignment from the .dtsi
file. Most probably it went into openwrt here:
https://dev.openwrt.org/browser/trunk/target/linux/ipq806x/patches-3.18/101-ARM-qcom-add-USB-nodes-to-ipq806x-ap148.patch?rev=45261
copied from Qualcomms attempt here: https://lkml.org/lkml/2015/11/20/116
Now unloading and repeated module loading is working just fine,
no matter if you'd remove dwc3-of-simple or dwc3.
root@LEDE:/# rmmod dwc3-of-simple
[ 24.089679] xhci-hcd xhci-hcd.1.auto: remove, state 1
[ 24.089765] usb usb4: USB disconnect, device number 1
[ 24.094856] xhci-hcd xhci-hcd.1.auto: USB bus 4 deregistered
[ 24.098963] xhci-hcd xhci-hcd.1.auto: remove, state 1
[ 24.104522] usb usb3: USB disconnect, device number 1
[ 24.111194] xhci-hcd xhci-hcd.1.auto: USB bus 3 deregistered
[ 24.115086] xhci-hcd xhci-hcd.0.auto: remove, state 1
[ 24.120396] usb usb2: USB disconnect, device number 1
[ 24.126503] xhci-hcd xhci-hcd.0.auto: USB bus 2 deregistered
[ 24.130347] xhci-hcd xhci-hcd.0.auto: remove, state 1
[ 24.135948] usb usb1: USB disconnect, device number 1
[ 24.142085] xhci-hcd xhci-hcd.0.auto: USB bus 1 deregistered
root@LEDE:/#
Fixes: dwc3-of-simple module unloading
Signed-off-by: Thomas Reifferscheid <thomas@reifferscheid.org>
Makes use of the syscon tcsr and enables both USB ports. Cleans up
qcom-ipq8064.dtsi from previous attempts.
Fixes FS#497
Signed-off-by: Thomas Reifferscheid <thomas@reifferscheid.org>
Current driver shows temp in full degrees while other apps await it
to be in millidegrees.
Initially the driver represents termal data in millidegrees but then
it gets divided by TSENS_FACTOR. So lets just set it to '1'.
Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
This patch adds support for AVM FRITZ!Box 4040.
hardware highlights:
SOC: IPQ4018 / QCA Dakota
CPU: Quad-Core ARMv7 Processor rev 5 (v7l) Cortex-A7
DRAM: 256 MiB Nanya NT5CC128M16IP
FLASH: 32 MiB MXIC MX25L25635FMI
ETH: Qualcomm Atheros QCA8075 Gigabit Switch (4 x LAN, 1 x WAN)
USB: 1 x 3.0 (via Synopsys DesignWare DWC3 controller in the SoC)
1 x 2.0 (via Synopsys DesignWare DWC3 controller in the SoC)
WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11bgn 2:2x2
WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2
INPUT: one WLAN and one WPS button
LEDS: Power, WAN/Internet, WIFI, INFO (red and amber) and LAN.
Serial:
WARNING: The serial port needs a TTL/RS-232 v3.3 level converter!
The Serial setting is 115200-8-N-1. The SoC's serial port is right
next to the MXIC FLASH chip. The board has a unpopulated 1x4 0.1"
header for it. Use a multimeter to figure out the pinout!
This board currently needs an additional u-boot image in order to boot
properly. Booting with EVA isn't possible ATM.
Install Procedure:
0. It's highly recommended to connect to the serial port.
The serial settings are listed above.
1. install a u-boot image for AVM Fritz!Box 4040
(see <https://github.com/chunkeey/FritzBox-4040-UBOOT/releases> and
<https://github.com/chunkeey/FritzBox-4040-UBOOT/blob/master/upload-to-f4040.sh>)
2. upload the initramfs.itb image via tftp (u-boot listens to
192.168.1.1 - use binary transfer mode!)
3. connect to the FB4040 and use sysupgrade sysupgrade.bin
to install the image.
Works:
- Switch and Ethernet (99%)
- Buttons (WLAN, WPS)
- FLASH (1 x 32MiB NOR Chip)
- WLAN2G and WLAN5G
- CPUFREQ scaling
- PRNG
- serial
- Crypto Accelerator
- sysupgrade (Read the flash instructions to avoid bricking)
- full LEDE Install (Read the flash instructions to avoid bricking)
- LEDs (Power, WAN, Info (red and amber), LAN)
The LEDs are connected to the QCA8075 LED ports.
The AR40xx driver contains a gpio-controller to
handle these special "GPIOs".
- USB Both 3.0 and 2.0 ports
- many packages from other ARMv7 boards
(This does include the RaspberryPi Model 2!)
- ...
Not planned:
- WAN<->LAN short-cut
- Qualcomm Secure Execution Environment
- ...
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: John Crispin <john@phrozen.org>
At the moment as a workaround definition for scm firmware in DT is used as if it is
apq8064 board. This leads to incomplete scm firmware initialization and as a result
cpuidle driver fails to configure.
By design unlike other qcom boards ipq do not use clocks to connect to scm.
Considering this we're removing from DT and scm driver clocks for ipq boards.
As a result cpuidle does not produce errors about failed configuration anymore.
Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
Do not patch upstream files, overwrite them entirely. The upstream files
are buggy for a number of devices and this significantly simplifies the
patch structure
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
