This chipset has at least 8 usable ports, e.g. Netgear R8000 has ports
5, 7 and 8 connected to Ethernet interfaces:
vlan1ports=0 1 2 3 5 7 8*
vlan2ports=4 8u
Port 6 seems to be always disabled.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 45676
On BCM5301X there are two different cases to handle: CPU port 8 vs. any
other one. Support for CPU port 8 was already partially implemented but
it lacked setting some extra bit for 2G speed. It also will need to be
extended to implement "SMP dual core 3 GMAC setup". That's the reason
for handling it in separated code block.
This patch also adds overriding CPU port state for port other than 8. It
requires using recently defined GMII_PORT registers.
It was tested for regressions on BCM53011 revs 2 & 3. It was also
confirmed to fix switch on some internal Broadcom board.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 45402
* properly enclose macro arguments in paranthesis on use
* remove trailing white space
* convert C99 // comments
* add missing blank lines after declaration
* remove braces from single statement blocks
* split lines > 80 chars (except for one)
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 45356
It will now actually enable the mib counters instead of enabling rx/tx for
the first switch port.
Reported-by: Daniel Gonzalez <dgcbueu@gmail.com>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 44788
For bcm63xx integrated switches, broadcom changed the data endianess
to match the system endianess. But this only applies to within one word,
which causes 48/64 bit values to be still split into their "litte endian"
groups.
E.g. 48 bit values (with 5 being the most significant byte) aligned
0x00 ..01 or 0123
0x04 2345 45..
will become
0x00 ..10 resp. 3210
0x04 5432 54..
Likewise for 64 bit values.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 44568
drivers/net/phy/adm6996.c:881:5: warning: format '%lu' expects argument of type 'long unsigned int', but argument 5 has type 'u32' [-Wformat=]
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 44333
Add global read-only swconfig attribute "arl_table" to display the
address resolution table.
So far the chip-specific part is implemented for AR8327/AR8337 only
as I don't have the datasheets for the other AR8XXX chips.
Successfully tested on TL-WDR4300 (AR8327rev2)
and TL-WDR4900 (AR8327rev4).
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44104
Until a few years ago the page switch wait time was set to msleep(1)
what was changed to usleep_range(1000, 2000) later.
I can not imagine that a low-level operation like switching page
on register level takes so much time.
Most likely the value of 1ms was initially set to check whether
it fixes an issue and then remained w/o further checking whether
also a smaller value would be sufficient.
Now the wait time is set to 5us and I successfully tested this on
AR8327. IMHO 5us should be plenty of time for all supported chips.
However I couldn't test this due to missing hardware.
If other chips should need a longer wait time we can add the
wait time as a parameter to the ar8xxx_chip struct.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44103
Check for switch port link changes and
- flush ATU in case of a change
- report link change via syslog
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44102
The functionality to flush the address translation table contains two bugs
which luckily compensate each other.
1. Just setting the operation is not sufficient to perform the flushing.
The "active" bit needs to be set to actually trigger an action.
For the vtu operations this is implemented correctly.
2. ar8xxx_phy_read_status is called every 2s by the phy state machine
to check for link changes. This would have caused an ATU flush
every 2s.
Fix the chip-specific ATU flush functions and remove the ATU flush call
from ar8xxx_phy_read_status.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44101
The swconfig get_link attribute (at least) on AR8327/AR8337 doesn't
consider the autonegotiated flow control.
AR8327/AR8337 provide the info about autonegotiated rx/tx flow control
in bits 10 and 11 of the port status register.
Use these values to display info about autonegotiated rx/tx flow
control as part of the get_link attribute.
Successfully tested on TL-WDR4900 (AR8327 rev.4) and
TL-WDR4300 (AR8327 rev.2).
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44023
AR8327/AR8337 allow to read the result of EEE autonegotiation.
If EEE is autonegotiated between the link partners, display
this as part of the swconfig get_link attribute.
eee100: 100MBit EEE supported by both link partners
eee1000: 1GBit EEE supported by both link partners
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44022
Users reported network issues with AR8327 which turned out to be caused
by EEE not working correctly with certain link partners (ticket 14597).
The workaround was to disable EEE on all ports (changeset 41577).
The issue was with certain link partners only, therefore this patch
allows to control usage of EEE per port via swconfig.
Still the default is to initially disable EEE on all ports.
Successfully tested on a TL-WDR4900 (AR8327 rev.4)
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44021
Since the driver doesn't know anything about (M)STP
we just hard-set the ports to be enabled if they are
part of the VLAN.
Signed-off-by: Claudio Leite <leitec@staticky.com>
SVN-Revision: 43938
- eliminate MV_CPUPORT; not necessary since we define
the CPU port(s) via Device Tree
- add STU and expand VTU operations
- update register names to match those of 88E61xx rather than
mvswitch's 88E6060
- use more consistent formatting
Signed-off-by: Claudio Leite <leitec@staticky.com>
SVN-Revision: 43937
Move all AR8327/AR8337-specific driver code into a separate source file
ar8327.c and adjust patches so that ar8327.c is compiled if
CONFIG_AR8216_PHY is set.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43845
Move several structure definitions and #defines from ar8216.c
to ar8216.h and move AR8327/AR8337 header stuff into a new
header file ar8327.h.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43844
Remove read/write/rmw member functions from ar8xxx_priv
There seems to be no real benefit of the ar8xxx_priv member functions
read/write/rmw as one implementation exists for each of them only.
Especially ar8xxx_mii_rmw is assigned to priv->rmw first and then
mapped to ar8xxx_rmw.
Rename the ar8xxx_mii_.. functions to ar8xxx_.. and use them directly.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43742
Create helpers mii_read32 / mii_write32 for 32 bit MII ops.
Rename r3 variable to page in ar8xxx_mii_write to make it consistent
with the other ar8xxx_mii_xxxx functions.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43741
Factor out chip-specific parameters from ar8xxx_probe_switch.
Move the ar8xxx_chip definitions after the swops definitions.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43740
This is a swconfig driver for the Marvell 88E6171 switch,
which is a 7-port GigE switch with two CPU ports and 64
802.1q VLANs.
Signed-off-by: Claudio Leite <leitec@staticky.com>
SVN-Revision: 43486
Factor out set_mirror_regs to ar8xxx_chip.
Remove related chip_is_... checks.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43468
Factor out info whether switch should be configured at probe stage
to ar8xxx_chip. Remove related chip_is_... checks.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43466
Patch reverts 43332 which seems to cause issues with VLAN functionality.
Add a specific check to check whether ANEG is still enabled and re-enable
it if necessary. Disable generic phy soft reset for kernel >=3.16.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43356
We should make sure that also for ar8216 hw gets initialized.
For ar8216 hw_init is a dummy currently. The hw_init used for ar8236
should be generic enough to be usable with ar8216 too.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43334
Move the PHY fixup call to the PHY init loop.
Use ar8xxx_has_gige in the PHY init instead of passing the gigE
capability via function parameter.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43333
Kernel 3.14 introduced a switch reset in phy_init_hw in drivers/net/phy
causing BMCR_ANENABLE to get cleared.
Due to the fact that ar8xxx_phy_config_aneg does nothing for
PHY 0 autonegatiation support remains disabled.
This can cause ports to operate at 10MBit/half-duplex only.
Fix this by calling genphy_config_aneg for PHY 0 too as
genphy_config_aneg sets BMCR_ANENABLE if it's not yet set.
Fixes: ticket 17800
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43332
PHY init code in the switch-specific hw_init functions is mainly
identical. Factor it out into a generic ar8xxx_phy_init function.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 43331
Move phy fixup code from the chip-specific hw_init functions into a
fixup_phys callback.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43330
Currently there is a fixed 1000ms wait time after the switch was reset.
Most if not all switches need much less time to perform a reset.
Therefore replace the fixed wait time with polling for BMCR_RESET to
be cleared.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 43329
All supported switches have 5 PHYs. Currently partially 5 is hardcoded
and partially switch-specific constants exist.
Replace them with a global constant.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43328
Boards that have more than one swconfig enabled switch will show the devices in
reverse order when call swconfig list. Fix this by using list_add_tail().
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 43106
This allows tagged and untagged traffic together on the same port on ar8327
switch devices.
I looked at the first attempt to do this in r40777 (ar71xx: Fix tagged+untagged
operation on AR8327N (#12181)). I also set the vlan and port egress policies
like that change. But I change vlan_tagged in an less intrusive way. The
tagged/untagged decision is now based on the following rules:
- if vid != pvid then traffic is always tagged
- if vid == pvid then vlan_tagged stores if the traffic should be tagged
Tested on TP-Link WDR-3600 (ar8327N).
Signed-off-by: Valentin Spreckels <Valentin.Spreckels@Informatik.Uni-Oldenburg.DE>
SVN-Revision: 42653
This moves ingress, egress policy and pvid decisions to setup_port methods.
They arenow device type dependent.
This allows policy changes on only one device type which is needed to allow
tagged + untagged operation on ar8327.
Tested on TP-LINK WDR-3600 (ar8327N).
Signed-off-by: Valentin Spreckels <Valentin.Spreckels@Informatik.Uni-Oldenburg.DE>
SVN-Revision: 42652
According to the thread https://forum.openwrt.org/viewtopic.php?id=48281
b53 uses GPIO 7:
[ 4.470000] b53_common: [DBG] b53_switch_reset_gpio using 7
and causes device to self-reboot. GPIO 8 was found in CFE boot log:
"Reset switch via GPIO 8 ..."
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 41526
This patch deactivates the statistics, adds a missing lock
initialization and fixes a waring.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 41511
Revert the tagged + untagged rework for now due to regressions in
vlan setup on certain AR83xx switches.
Signed-off-by: Jo-Philipp Wich <jow@openwrt.org>
SVN-Revision: 40842
Replace the global "vlan_tagged" variable with an array storing the
tagging state per vlan.
The code was taken from #12181, tested and cleaned up by Saverio Proto
with additional bug fixes supplied by Álvaro Fernández.
Tested-by: Jo-Philipp Wich <jow@openwrt.org>
Signed-off-by: Saverio Proto <zioproto@gmail.com>
Signed-off-by: Álvaro Fernández <noltari@gmail.com>
SVN-Revision: 40777
This patch adds port status information and MIB counters to the ADM6996
switch driver.
The driver supports also the older ADM6996L-variant, but I'm not able to
test this patch on that chip. According to the datasheet the same
registers exist there as well, so I think it should work, but any
feedback is appreciated.
Signed-off-by: Matti Laakso <malaakso at elisanet.fi>
SVN-Revision: 40542
If the CPU port is not forced up, the link, at least on this board, is lost after
changes are applied. This makes sure that the link is restored. Regression tests
should confirm it doesn't break other boards.
Signed-off-by: Antonios Vamporakis <ant@area128.com>
SVN-Revision: 40305
- hide port pvid - vlan index relation
- switch initialises with vlans disabled so port isolation is not used
- remove special treatment of cpu port
Signed-off-by: Antonios Vamporakis <ant@area128.com>
SVN-Revision: 40304
Changes to:
- show the correct "enable_vlan" value under "Global attributes"
- show tagged ports under "Vlan: ports"
- use get_port_link method to report link status
Signed-off-by: Antonios Vamporakis <ant@area128.com>
SVN-Revision: 40303
Use the 'swconfig_trig_set_brightness' function to set
the brightness value of the LED when the link goes down.
This ensures that the last brighness value is saved into
a local variable which is used to track the actual LED
status.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 39402
This patch enables jumbo frames on AR8327 switch by default.
I have tested it on TP-Link TL-WDR3600.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 39076
This patch is needed to use the switch inside the Sitecom WLR-8100;
it was unusable and detected as Generic-Phy before.
since ar8337 is behaving like ar8327
generally do the same thing
see: https://forum.openwrt.org/viewtopic.php?pid=214218#p214218
forward-ported to trunk
Signed-off-by: Dirk Neukirchen <dirkneukirchen@web.de>
Patchwork: http://patchwork.openwrt.org/patch/4469/
[juhosg: merge chip_is_ar83[23]7 statements in ar8xxx_phy_config_init]
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 38952
The BCM5365 needs a shift of 7 bits and not 6 bits like the BCM5325 for
the untagged ports.
Thank you Russell for reporting this and testing the patch.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 38793
This patch makes it possible to use adm6996.c on first generation
BCM47XX devices with ADM switches.
The GPIO bit banging protocol implementation was copied from the old
switch driver and adapted to this driver and changed to the mainline
kernel GPIO interface.
The ADM6996L is different from the ADM6996M which is supported, for
both specs are available in the Internet.
This was tested on a WRT54GS version 1.0, thank you Dirk Neukirchen for
the device.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 38698
The revision is stored in a different register than it is in other
Broadcom switches.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 37995
These switches are integrated in some recent BCM53XX and BCM47XX SoCs
like the BCM53572.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 37994
The Linksys wrt310n v1 does not have a robo_reset config variable in
nvram, but GPIO Pin 8 is the pin needed for resetting the external
switch, Linksys hard coded it into their source code.
Thank you Devastator for testing.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 37988
BCM5365 (and probably other older variants) use a different phy id, so
the phy driver never attached for them.
Fix this by adding the appropriate phy id to the fixup and the phy
driver.
Reported-by: Russell Senior <russell@personaltelco.net>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 37906
b53_no_ops has no elements and b53_port_ops has one element, this makes
the code access some random memory when trying to access the mib
counter functions.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 37895
This is needed for some switches used on bcm47xx SoCs like the one on the Asus RT-N66U.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 37645
This makes it possible to use swconfig to controll the switch.
This was tested with devices using b43 and bgmac.
This was not tested on devices using tg3.
This does not support the adm switch used in some very old devices.
SVN-Revision: 37304
This patch adds swlib attributes to the RTL8366RB switch/PHY found in the
TL-WR1043ND router that allow to mirror ethernet packets to a monitor port.
Signed-off-by: Colin Leitner <colin.leitner@googlemail.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 36847
Tested on Buffalo WZR-600DHP with ar8316 switch. Commands used to mirror both
RX and TX traffic from LAN port 1 to LAN port 4:
$ swconfig dev switch0 set enable_mirror_rx 1
$ swconfig dev switch0 set enable_mirror_tx 1
$ swconfig dev switch0 set mirror_monitor_port 4
$ swconfig dev switch0 set mirror_source_port 1
Signed-off-by: Colin Leitner <colin.leitner@googlemail.com>
Tested-by: Luka Perkov <luka@openwrt.org>
SVN-Revision: 36713
drivers/net/phy/rtl8366_smi.c: In function 'rtl8366_sw_set_vlan_ports':
drivers/net/phy/rtl8366_smi.c:1125:6: warning: 'pvid' may be used uninitialized in this function [-Wuninitialized]
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 36442
* disable external interface if its property is not present
* show an error message if the extif property is not valid
* use proper error values intead of -1
* fix memory leak
* wrap long lines
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 36229
The AR8327 switch gets its configuration from platform
data or from the device-tree. This allows to start it
from the probe routine. Doing so makes it usable with
ethernet drivers which only connects to the PHY device
when the ethernet interface is opened.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 36050
Move switch starting code into a separate function.
This makes it usable from other places.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 36049
Move platform_data specific configuration code
into a separate routine. Do it in preparation
for the upcoming OF support.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 36046
Fetch the PORT_STATUS values in ar8327_hw_init and
store those in a private data stucture for later use.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 36045
Return with the PORT_STATUS register value instead of
writing that directly into the corresponding register.
Also rename the function to ar8327_get_port_init_status.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 36043
The presence of the platform data is already verified in
ar8327_hw_init, and the driver does not start without that
anyway.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 36042
Setting this bit stops BCM53125 (bgmac actually) from receiving any
packets. This bit is cleared conditionally in b53_switch_reset and it
seems the same is done in bcmrobo.c which never sets that bit again.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 35723
Currently the switch gets registered when an ethernet
driver connects to a PHY of the switch. This method does
not work with the ethernet drivers which are connecting
to the PHY from their ndo_open callback. With those
ethernet drivers, the driver tries to register the switch
each time when the etherned device is opened and this causes
a deadlock.
Move the switch registration into the probe routine to fix
this problem.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 35602
The switches are accessed via an MDIO bus. Set the alias
to the name of the MDIO bus, and show that in the message
along with the name of the switch switch device.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 35560
The private data of the switch is already
allocated in ar8216_priv, assign that to
each PHY on the same MDIO bus. Also remove
the redundant code from ar8216_config_init.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 35559
Sujith says:
This commit breaks the WAN port on my AP96 - DHCP fails.
Reverting it fixes the issue.
commit b67cc3a0cdd02973610d4d5a63226d1c44841e94
Author: juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Date: Fri Feb 8 09:13:18 2013 +0000
generic: ar8216: simplify phy features setup
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@355183c298f89-4303-0410-b956-a3cf2f4a3e73
This change restores the previous behaviour and moves
the code into the ar8216_probe function.
Reported-by: Sujith Manoharan <sujith@msujith.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Tested-by: Sujith Manoharan <sujith@msujith.org>
SVN-Revision: 35549
b53_switch_detect returns value returned by b53_read8, which is 0 for
success. So fail (and return error) only if b53_switch_detect returned
something else than 0. This fixes supported and advertising being zeros
for MDIO access.
Cc: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 35534
It is enough to sleep once after ANEG is enabled on
all PHYs. This reduces boot time on boards with
AR8316 switch.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 35532
