Felix Fietkau
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8067f3f3cc
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ar71xx: work around a PCI controller bug which causes reads to the PCI_COMMAND register to return bogus values - properly fixes ath9k module reload issues
SVN-Revision: 24236
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2010-12-04 01:32:15 +00:00 |
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Gabor Juhos
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f4d5c885e4
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ar71xx: return statements does not need parenthesis
Signed-off-by: Arnaud Lacombe <lacombar@gmail.com>
SVN-Revision: 23979
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2010-11-12 18:51:38 +00:00 |
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Gabor Juhos
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18aa68d368
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ar71xx: check returned value of ioremap in ar71xx_pcibios_setup
SVN-Revision: 20288
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2010-03-18 19:19:19 +00:00 |
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Gabor Juhos
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73f7a1c224
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ar71xx: optimize register access in ar71xx_pci.c
SVN-Revision: 20287
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2010-03-18 19:19:16 +00:00 |
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Gabor Juhos
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5f109ef2f3
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ar71xx: move PCI intterupt handling code to pci-ar7{1xx,24x}.c
SVN-Revision: 20281
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2010-03-18 19:18:54 +00:00 |
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Gabor Juhos
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0757fee42d
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ar71xx: use ar71xx_pci_fixup on ar71xx SoCs only
SVN-Revision: 17807
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2009-10-01 19:40:57 +00:00 |
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Gabor Juhos
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089b5ccb47
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reorganize PCI code
SVN-Revision: 16672
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2009-07-05 07:53:07 +00:00 |
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Gabor Juhos
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9f93bd51cf
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rename DDR registers
SVN-Revision: 13363
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2008-11-26 17:17:13 +00:00 |
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Gabor Juhos
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a43e2d5ac6
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fix the PCI byte lane enable generation code, based on a patch by Chris Dearman
SVN-Revision: 12617
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2008-09-17 13:29:47 +00:00 |
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Gabor Juhos
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f529a37420
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surprise :p
SVN-Revision: 11894
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2008-07-21 17:08:14 +00:00 |
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