The APPSBL and anything after that it not allowed to touch some of the
memory regions which are used by other components. Still trying to write to
the memory can lead to sudden device restarts
(IPQ40xx) # mw 87e80000 0
data abort
pc : [<873149f8>] lr : [<87308578>]
sp : 86edfc28 ip : 86ef4412 fp : 00000000
r10: 00000000 r9 : 00000000 r8 : 86edff68
r7 : 00000003 r6 : 8737e624 r5 : 86ef4420 r4 : 8736c154
r3 : 00000000 r2 : 00000010 r1 : 00000000 r0 : 00000000
Flags: nZCv IRQs off FIQs off Mode SVC_32
Resetting CPU ...
The device manufacturer only provided a very rough list of regions:
* rsvd1: 0x87000000 0x500000
* wifi_dump: 0x87500000 0x600000
* rsvd2: 0x87b00000 0x500000
A more detailed list for devices using the AP.DK reference design memory
maps was provided by Roman Yeryomin <roman@advem.lv> in commit 56f2df879fd
("ipq806x: ipq4019: add ap-dk01.1-c1 board support"):
* apps_bl: 0x87000000 0x400000
* sbl: 0x87400000 0x100000
* cnss_debug: 0x87500000 0x600000
* cpu_context_dump: 0x87b00000 0x080000
* tz_apps: 0x87b80000 0x280000
* smem: 0x87e00000 0x080000
* tz: 0x87e80000 0x180000
The u-boot function ipq_fdt_mem_rsvd_fixup seems to suggest that only the
rsvd2 (tz_apps, smem, tz) should be protected. All other regions would have
been removed by it when CONFIG_QCA_APPSBL_DLOAD is not enabled. This allows
to reduce the 16MB reserved memory region to only 4.5MB.
Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
The GPIO configuration in the DTS have as third parameter the active
low/high configuration. This parameter is not easy to parse by humans when
it is only set to 0/1. It is better to use the predefined constants
GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW.
Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
* QCA IPQ4028
* 256 MB of RAM
* 32 MB of SPI NOR flash (mx25l25635e)
* 128 MB of SPI NAND flash (gd5f1gq4ucy1g)
* 2T2R 2.4 GHz
- QCA4019 hw1.0 (SoC)
- uses AP-DK03 BDF from QCA4019/hw1.0/board-2.bin
* 2T2R 5 GHz
- QCA4019 hw1.0 (SoC)
- uses AP-DK03 BDF from QCA4019/hw1.0/board-2.bin
* 2 fully software controllable GPIO-LEDs
* 2 additional GPIO-LEDs which also affect the SIM card detection
* 1x button (reset)
* 1x GPIO buzzer
* 1x USB (xHCI)
* 1x NGFF (USB-only with Dual-SIM support, untested)
* TTL pins are on board (R124 is next to GND, then follows: RX, TX, VCC)
* 2x gigabit ethernet
- phy@mdio4:
+ Manual: Ethernet port 0
+ gmac0 (ethaddr) in original firmware
+ 802.3af POE (HV version)
+ 24v passive POE (LV version)
- phy@mdio3:
+ Manual: Ethernet port 1
+ gmac1 (eth1addr) in original firmware
* DC Jack connector
+ 24-56V (HV version)
+ 12-24V (LV version)
The SPI NAND flash isn't supported at the moment.
The bootloader has to be updated before OpenWrt is installed to fix a
reboot problem. The nor-ipq40xx-single.img from
https://downloads.compex.com.sg/?dir=uploads/QSDK/QCA-Reference/WPJ428/b170123-IPQ40xx-Reference-Firmware
has to be downloaded and the transfered in u-boot via TFTP
set ipaddr 192.168.1.11
set serverip 192.168.1.10
ping ${serverip}
tftpboot 0x84000000 nor-ipq40xx-single.img
imgaddr=0x84000000 && source $imgaddr:script
The sysupgrade image can be installed directly on flash using u-boot:
sf probe
tftpboot 0x84000000 openwrt-ipq40xx-compex_wpj428-squashfs-sysupgrade.bin
sf erase 0x00180000 +$filesize
sf write 0x84000000 0x00180000 $filesize
bootipq
The initramfs image can be started using
tftpboot 0x82000000 openwrt-ipq40xx-compex_wpj428-initramfs-fit-uImage.itb
set fdt_high 0x83000000
bootm 0x82000000
The used SIM card slot can be changed using
# slot 1 (also enables orange LED)
echo 1 > /sys/class/gpio/gpio3/value
# slot 2
echo 0 > /sys/class/gpio/gpio3/value
It can be checked whether a SIM card is inserted in the current slot and
the red LED is subsequently on via:
echo 2 > /sys/class/gpio/export
cat /sys/class/gpio/gpio2/value
Signed-off-by: Sven Eckelmann <sven@narfation.org>
