atheros: fix ar5312 support
SVN-Revision: 14983
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parent
107f6ea323
commit
fd11bfec64
1 changed files with 15 additions and 9 deletions
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@ -1803,7 +1803,6 @@
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+ .name = "leds-gpio",
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+ .id = -1,
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+ .dev.platform_data = (void *) &ar5312_led_data,
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+ .num_resources = 1,
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+};
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+#endif
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+
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@ -1993,7 +1992,7 @@
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+ if ((result = ar231x_read_reg(AR5312_SCRATCH)))
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+ return result;
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+
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+ devid = ar231x_board.devid;
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+ devid = ar231x_read_reg(AR531X_REV);
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+ devid &= AR531X_REV_MAJ;
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+ devid >>= AR531X_REV_MAJ_S;
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+ if (devid == AR531X_REV_MAJ_AR2313) {
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@ -2064,9 +2063,6 @@
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+ if (!IS_5312())
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+ return;
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+
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+ devid = ar231x_read_reg(AR531X_REV);
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+ devid &= AR531X_REV_MAJ | AR531X_REV_MIN;
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+
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+ /* Detect memory size */
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+ memcfg = ar231x_read_reg(AR531X_MEM_CFG1);
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+ bank0AC = (memcfg & MEM_CFG1_AC0) >> MEM_CFG1_AC0_S;
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@ -2075,8 +2071,12 @@
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+ + (bank1AC ? (1 << (bank1AC+1)) : 0);
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+ memsize <<= 20;
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+ add_memory_region(0, memsize, BOOT_MEM_RAM);
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+ ar231x_gpiodev = &ar5312_gpiodev;
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+
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+ devid = ar231x_read_reg(AR531X_REV);
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+ devid >>= AR531X_REV_WMAC_MIN_S;
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+ devid &= AR531X_REV_CHIP;
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+ ar231x_board.devid = (u16) devid;
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+ ar231x_gpiodev = &ar5312_gpiodev;
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+}
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+
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+void __init
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@ -2096,7 +2096,7 @@
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+
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--- /dev/null
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+++ b/arch/mips/ar231x/ar2315.c
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@@ -0,0 +1,673 @@
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@@ -0,0 +1,679 @@
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+/*
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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@ -2371,6 +2371,9 @@
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+{
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+ int i;
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+
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+ if (!IS_2315())
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+ return;
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+
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+ ar231x_irq_dispatch = ar2315_irq_dispatch;
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+ gpiointval = ar231x_read_reg(AR2315_GPIO_DI);
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+ for (i = 0; i < AR531X_MISC_IRQ_COUNT; i++) {
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@ -2719,6 +2722,9 @@
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+void __init
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+ar2315_time_init(void)
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+{
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+ if (!IS_2315())
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+ return;
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+
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+ mips_hpt_frequency = ar2315_cpu_frequency() / 2;
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+}
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+
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@ -2885,13 +2891,13 @@
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+static inline u32
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+ar231x_read_reg(u32 reg)
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+{
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+ return __raw_readl((u32 *) reg);
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+ return __raw_readl((u32 *) KSEG1ADDR(reg));
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+}
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+
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+static inline void
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+ar231x_write_reg(u32 reg, u32 val)
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+{
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+ __raw_writel(val, (u32 *)reg);
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+ __raw_writel(val, (u32 *) KSEG1ADDR(reg));
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+}
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+
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+static inline u32
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