ipq806x: update Netgear R7800 device tree
-add spi pins -move mdio and rgmii pinctrl from gmac and mdio into pinmux node -add i2c4 pinctrl into rpm node -add pin details into several nodes -update gmac1 and gmac2 parameters -update mdio phy0 and phy4 registers by ddwrt devs findings -fix i2c4 pin drive-strengh -remove pcie pins as it's already present in ipq8065 DT Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
This commit is contained in:
dissent1
John Crispin
parent
71370d2c55
commit
eb7307cb94
4 changed files with 309 additions and 182 deletions
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@ -301,6 +301,7 @@ CONFIG_NO_HZ=y
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CONFIG_NO_HZ_COMMON=y
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CONFIG_NO_HZ_IDLE=y
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CONFIG_NR_CPUS=4
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CONFIG_NVMEM=y
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CONFIG_OF=y
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CONFIG_OF_ADDRESS=y
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CONFIG_OF_ADDRESS_PCI=y
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@ -372,6 +373,7 @@ CONFIG_QCOM_GDSC=y
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CONFIG_QCOM_GSBI=y
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CONFIG_QCOM_HFPLL=y
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# CONFIG_QCOM_PM is not set
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CONFIG_QCOM_QFPROM=y
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CONFIG_QCOM_SCM=y
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CONFIG_QCOM_SCM_32=y
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# CONFIG_QCOM_SMD is not set
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@ -33,25 +33,13 @@
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soc {
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pinmux@800000 {
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pinctrl-0 = <&mdio0_pins &rgmii2_pins>;
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pinctrl-names = "default";
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i2c4_pins: i2c4_pinmux {
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mux {
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pins = "gpio12", "gpio13";
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function = "gsbi4";
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bias-disable;
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};
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pcie0_pins: pcie0_pinmux {
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mux {
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pins = "gpio3";
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function = "pcie1_rst";
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drive-strength = <12>;
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bias-disable;
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};
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};
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pcie1_pins: pcie1_pinmux {
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mux {
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pins = "gpio48";
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function = "pcie2_rst";
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drive-strength = <12>;
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bias-disable;
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};
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@ -87,6 +75,11 @@
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drive-strength = <8>;
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bias-disable;
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};
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clk {
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pins = "gpio1";
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input-disable;
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};
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};
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rgmii2_pins: rgmii2_pins {
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@ -97,6 +90,25 @@
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drive-strength = <8>;
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bias-disable;
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};
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tx {
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pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ;
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input-disable;
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};
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};
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spi_pins: spi_pins {
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mux {
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pins = "gpio18", "gpio19", "gpio21";
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function = "gsbi5";
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drive-strength = <10>;
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bias-none;
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};
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cs {
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pins = "gpio20";
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drive-strength = <12>;
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};
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};
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};
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@ -114,6 +126,30 @@
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*/
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};
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gsbi5: gsbi@1a200000 {
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qcom,mode = <GSBI_PROT_SPI>;
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status = "ok";
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spi4: spi@1a280000 {
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status = "ok";
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spi-max-frequency = <50000000>;
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pinctrl-0 = <&spi_pins>;
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pinctrl-names = "default";
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cs-gpios = <&qcom_pinmux 20 0>;
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flash: m25p80@0 {
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compatible = "s25fl512s";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <51200000>;
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reg = <0>;
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linux,part-probe = "qcom-smem";
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};
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};
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};
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sata-phy@1b400000 {
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status = "ok";
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};
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@ -236,8 +272,6 @@
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#address-cells = <1>;
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#size-cells = <0>;
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gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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phy0: ethernet-phy@0 {
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device_type = "ethernet-phy";
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@ -246,16 +280,34 @@
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0x00004 0x7600000 /* PAD0_MODE */
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0x00008 0x1000000 /* PAD5_MODE */
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0x0000c 0x80 /* PAD6_MODE */
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0x000e4 0x6a545 /* MAC_POWER_SEL */
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0x000e4 0xaa545 /* MAC_POWER_SEL */
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0x000e0 0xc74164de /* SGMII_CTRL */
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0x0007c 0x4e /* PORT0_STATUS */
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0x00094 0x4e /* PORT6_STATUS */
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0x00970 0x1e864443 /* QM_PORT0_CTRL0 */
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0x00974 0x000001c6 /* QM_PORT0_CTRL1 */
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0x00978 0x19008643 /* QM_PORT1_CTRL0 */
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0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */
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0x00980 0x19008643 /* QM_PORT2_CTRL0 */
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0x00984 0x000001c6 /* QM_PORT2_CTRL1 */
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0x00988 0x19008643 /* QM_PORT3_CTRL0 */
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0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */
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0x00990 0x19008643 /* QM_PORT4_CTRL0 */
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0x00994 0x000001c6 /* QM_PORT4_CTRL1 */
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0x00998 0x1e864443 /* QM_PORT5_CTRL0 */
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0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */
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0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */
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0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */
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>;
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};
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phy4: ethernet-phy@4 {
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device_type = "ethernet-phy";
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reg = <4>;
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qca,ar8327-initvals = <
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0x000e4 0x6a545 /* MAC_POWER_SEL */
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0x0000c 0x80 /* PAD6_MODE */
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>;
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};
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};
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@ -263,9 +315,13 @@
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status = "ok";
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phy-mode = "rgmii";
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qcom,id = <1>;
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pinctrl-0 = <&rgmii2_pins>;
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pinctrl-names = "default";
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qcom,phy_mdio_addr = <4>;
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qcom,poll_required = <0>;
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qcom,rgmii_delay = <1>;
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qcom,phy_mii_type = <0>;
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qcom,emulation = <0>;
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qcom,irq = <255>;
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mdiobus = <&mdio0>;
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mtd-mac-address = <&art 6>;
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@ -279,6 +335,13 @@
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status = "ok";
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phy-mode = "sgmii";
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qcom,id = <2>;
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qcom,phy_mdio_addr = <0>; /* none */
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qcom,poll_required = <0>; /* no polling */
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qcom,rgmii_delay = <0>;
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qcom,phy_mii_type = <1>;
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qcom,emulation = <0>;
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qcom,irq = <258>;
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mdiobus = <&mdio0>;
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mtd-mac-address = <&art 0>;
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@ -287,6 +350,11 @@
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full-duplex;
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};
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};
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rpm@108000 {
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pinctrl-0 = <&i2c4_pins>;
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pinctrl-names = "default";
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};
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};
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gpio-keys {
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@ -2,6 +2,7 @@
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#include "skeleton.dtsi"
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#include <dt-bindings/clock/qcom,gcc-ipq806x.h>
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#include <dt-bindings/clock/qcom,lcc-ipq806x.h>
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#include <dt-bindings/mfd/qcom-rpm.h>
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#include <dt-bindings/soc/qcom,gsbi.h>
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#include <dt-bindings/reset/qcom,gcc-ipq806x.h>
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@ -27,6 +28,7 @@
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qcom,saw = <&saw0>;
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clocks = <&kraitcc 0>;
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clock-names = "cpu";
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qcom,imem = <&imem>;
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clock-latency = <100000>;
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core-supply = <&smb208_s2a>;
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voltage-tolerance = <5>;
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@ -109,8 +111,12 @@
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qcom,saw = <&saw1>;
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clocks = <&kraitcc 1>;
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clock-names = "cpu";
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qcom,imem = <&imem>;
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clock-latency = <100000>;
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core-supply = <&smb208_s2b>;
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cooling-min-state = <0>;
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cooling-max-state = <10>;
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#cooling-cells = <2>;
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operating-points-0-0 = <
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/* kHz uV */
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@ -175,9 +181,6 @@
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600000 800000
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384000 775000
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>;
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cooling-min-state = <0>;
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cooling-max-state = <10>;
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#cooling-cells = <2>;
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};
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L2: l2-cache {
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@ -288,11 +291,27 @@
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ranges;
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compatible = "simple-bus";
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lpass@28100000 {
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compatible = "qcom,lpass-cpu";
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status = "disabled";
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clocks = <&lcc AHBIX_CLK>,
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<&lcc MI2S_OSR_CLK>,
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<&lcc MI2S_BIT_CLK>;
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clock-names = "ahbix-clk",
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"mi2s-osr-clk",
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"mi2s-bit-clk";
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interrupts = <0 85 1>;
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interrupt-names = "lpass-irq-lpaif";
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reg = <0x28100000 0x10000>;
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reg-names = "lpass-lpaif";
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};
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imem: memory@700000 {
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compatible = "qcom,imem-ipq8064", "syscon";
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compatible = "qcom,qfprom", "syscon";
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reg = <0x00700000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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stride = <1>;
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ranges = <0x0 0x00700000 0x1000>;
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};
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@ -311,99 +330,74 @@
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#address-cells = <1>;
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#size-cells = <0>;
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smb208_s1a: smb208-s1a {
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compatible = "qcom,rpm-smb208";
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reg = <QCOM_RPM_SMB208_S1a>;
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smb208_regulators {
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compatible = "qcom,rpm-smb208-regulators";
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smb208_s1a: s1a {
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regulator-min-microvolt = <1050000>;
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regulator-max-microvolt = <1150000>;
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qcom,switch-mode-frequency = <1200000>;
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};
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smb208_s1b: smb208-s1b {
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compatible = "qcom,rpm-smb208";
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reg = <QCOM_RPM_SMB208_S1b>;
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regulator-min-microvolt = <1050000>;
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regulator-max-microvolt = <1150000>;
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qcom,switch-mode-frequency = <1200000>;
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};
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smb208_s2a: smb208-s2a {
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compatible = "qcom,rpm-smb208";
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reg = <QCOM_RPM_SMB208_S2a>;
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regulator-min-microvolt = < 800000>;
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regulator-max-microvolt = <1275000>;
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qcom,switch-mode-frequency = <1400000>;
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smb208_s1b: s1b {
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regulator-min-microvolt = <1050000>;
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regulator-max-microvolt = <1150000>;
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qcom,switch-mode-frequency = <1200000>;
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};
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smb208_s2b: smb208-s2b {
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compatible = "qcom,rpm-smb208";
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reg = <QCOM_RPM_SMB208_S2b>;
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smb208_s2a: s2a {
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regulator-min-microvolt = < 800000>;
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regulator-max-microvolt = <1275000>;
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qcom,switch-mode-frequency = <1400000>;
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qcom,switch-mode-frequency = <1200000>;
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};
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cxo_clk: cxo-clk {
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smb208_s2b: s2b {
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regulator-min-microvolt = < 800000>;
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regulator-max-microvolt = <1275000>;
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qcom,switch-mode-frequency = <1200000>;
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};
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};
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rpm_clocks {
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#clock-cells = <0>;
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compatible = "qcom,rpm-clk";
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qcom,rpm-clk-active-only;
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cxo_clk: cxo {
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reg = <QCOM_RPM_CXO_CLK>;
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qcom,rpm-clk-name = "cxo";
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qcom,rpm-clk-freq = <25000000>;
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qcom,rpm-clk-active-only;
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};
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pxo_clk: pxo-clk {
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#clock-cells = <0>;
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compatible = "qcom,rpm-clk";
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pxo_clk: pxo {
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reg = <QCOM_RPM_PXO_CLK>;
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qcom,rpm-clk-name = "pxo";
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qcom,rpm-clk-freq = <25000000>;
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qcom,rpm-clk-active-only;
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};
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ebi1_clk: ebi1-clk {
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#clock-cells = <0>;
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compatible = "qcom,rpm-clk";
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ebi1_clk: ebi1 {
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reg = <QCOM_RPM_EBI1_CLK>;
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qcom,rpm-clk-name = "ebi1";
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qcom,rpm-clk-freq = <533000000>;
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qcom,rpm-clk-active-only;
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};
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apps_fabric_clk: apps-fabric-clk {
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#clock-cells = <0>;
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compatible = "qcom,rpm-clk";
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apps_fabric_clk: apps-fabric {
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reg = <QCOM_RPM_APPS_FABRIC_CLK>;
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qcom,rpm-clk-name = "apps-fabric";
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qcom,rpm-clk-freq = <533000000>;
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qcom,rpm-clk-active-only;
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};
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nss_fabric0_clk: nss-fabric0-clk {
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#clock-cells = <0>;
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compatible = "qcom,rpm-clk";
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nss_fabric0_clk: nss-fabric0 {
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reg = <QCOM_RPM_NSS_FABRIC_0_CLK>;
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qcom,rpm-clk-name = "nss-fabric0";
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qcom,rpm-clk-freq = <533000000>;
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qcom,rpm-clk-active-only;
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};
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nss_fabric1_clk: nss-fabric1-clk {
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#clock-cells = <0>;
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compatible = "qcom,rpm-clk";
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nss_fabric1_clk: nss-fabric1 {
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reg = <QCOM_RPM_NSS_FABRIC_1_CLK>;
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qcom,rpm-clk-name = "nss-fabric1";
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qcom,rpm-clk-freq = <266000000>;
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qcom,rpm-clk-active-only;
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};
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};
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};
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@ -445,7 +439,7 @@
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <0 32 0x4>;
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interrupts = <0 16 0x4>;
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pcie0_pins: pcie0_pinmux {
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mux {
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@ -528,6 +522,44 @@
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regulator;
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};
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gsbi1: gsbi@12440000 {
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compatible = "qcom,gsbi-v1.0.0";
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cell-index = <1>;
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reg = <0x12440000 0x100>;
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clocks = <&gcc GSBI1_H_CLK>;
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clock-names = "iface";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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status = "disabled";
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syscon-tcsr = <&tcsr>;
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uart1: serial@12450000 {
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compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
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reg = <0x12450000 0x1000>,
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<0x12440000 0x1000>;
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interrupts = <0 193 0x0>;
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clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>;
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clock-names = "core", "iface";
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status = "disabled";
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};
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i2c@12460000 {
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compatible = "qcom,i2c-qup-v1.1.1";
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reg = <0x12460000 0x1000>;
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interrupts = <0 194 0>;
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clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
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clock-names = "core", "iface";
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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gsbi2: gsbi@12480000 {
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compatible = "qcom,gsbi-v1.0.0";
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cell-index = <2>;
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@ -653,6 +685,94 @@
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};
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};
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gsbi6: gsbi@16500000 {
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compatible = "qcom,gsbi-v1.0.0";
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cell-index = <6>;
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reg = <0x16500000 0x100>;
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||||
clocks = <&gcc GSBI6_H_CLK>;
|
||||
clock-names = "iface";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
status = "disabled";
|
||||
|
||||
syscon-tcsr = <&tcsr>;
|
||||
|
||||
uart6: serial@16540000 {
|
||||
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
|
||||
reg = <0x16540000 0x1000>,
|
||||
<0x16500000 0x1000>;
|
||||
interrupts = <0 156 0x0>;
|
||||
clocks = <&gcc GSBI6_UART_CLK>, <&gcc GSBI6_H_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@16580000 {
|
||||
compatible = "qcom,i2c-qup-v1.1.1";
|
||||
reg = <0x16580000 0x1000>;
|
||||
interrupts = <0 157 0>;
|
||||
|
||||
clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
status = "disabled";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
spi@16580000 {
|
||||
compatible = "qcom,spi-qup-v1.1.1";
|
||||
reg = <0x16580000 0x1000>;
|
||||
interrupts = <0 157 0>;
|
||||
|
||||
clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
status = "disabled";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
gsbi7: gsbi@16600000 {
|
||||
compatible = "qcom,gsbi-v1.0.0";
|
||||
cell-index = <7>;
|
||||
reg = <0x16600000 0x100>;
|
||||
clocks = <&gcc GSBI7_H_CLK>;
|
||||
clock-names = "iface";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
status = "disabled";
|
||||
|
||||
syscon-tcsr = <&tcsr>;
|
||||
|
||||
uart7: serial@16640000 {
|
||||
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
|
||||
reg = <0x16640000 0x1000>,
|
||||
<0x16600000 0x1000>;
|
||||
interrupts = <0 158 0x0>;
|
||||
clocks = <&gcc GSBI7_UART_CLK>, <&gcc GSBI7_H_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@16680000 {
|
||||
compatible = "qcom,i2c-qup-v1.1.1";
|
||||
reg = <0x16680000 0x1000>;
|
||||
interrupts = <0 159 0>;
|
||||
|
||||
clocks = <&gcc GSBI7_QUP_CLK>, <&gcc GSBI7_H_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
status = "disabled";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
sata_phy: sata-phy@1b400000 {
|
||||
compatible = "qcom,ipq806x-sata-phy";
|
||||
reg = <0x1b400000 0x200>;
|
||||
|
|
@ -699,6 +819,13 @@
|
|||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
lcc: clock-controller@28000000 {
|
||||
compatible = "qcom,lcc-ipq8064";
|
||||
reg = <0x28000000 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
tcsr: syscon@1a400000 {
|
||||
compatible = "qcom,tcsr-ipq8064", "syscon";
|
||||
reg = <0x1a400000 0x100>;
|
||||
|
|
@ -1021,7 +1148,7 @@
|
|||
|
||||
gmac0: ethernet@37000000 {
|
||||
device_type = "network";
|
||||
compatible = "qcom,ipq806x-gmac";
|
||||
compatible = "qcom,ipq806x-gmac", "snps,dwmac";
|
||||
reg = <0x37000000 0x200000>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq";
|
||||
|
|
@ -1040,7 +1167,7 @@
|
|||
|
||||
gmac1: ethernet@37200000 {
|
||||
device_type = "network";
|
||||
compatible = "qcom,ipq806x-gmac";
|
||||
compatible = "qcom,ipq806x-gmac", "snps,dwmac";
|
||||
reg = <0x37200000 0x200000>;
|
||||
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq";
|
||||
|
|
@ -1059,7 +1186,7 @@
|
|||
|
||||
gmac2: ethernet@37400000 {
|
||||
device_type = "network";
|
||||
compatible = "qcom,ipq806x-gmac";
|
||||
compatible = "qcom,ipq806x-gmac", "snps,dwmac";
|
||||
reg = <0x37400000 0x200000>;
|
||||
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq";
|
||||
|
|
@ -1078,7 +1205,7 @@
|
|||
|
||||
gmac3: ethernet@37600000 {
|
||||
device_type = "network";
|
||||
compatible = "qcom,ipq806x-gmac";
|
||||
compatible = "qcom,ipq806x-gmac", "snps,dwmac";
|
||||
reg = <0x37600000 0x200000>;
|
||||
interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq";
|
||||
|
|
|
|||
|
|
@ -72,73 +72,3 @@ Signed-off-by: Adrian Panella <ianchi74@outlook.com>
|
|||
};
|
||||
};
|
||||
|
||||
--- a/arch/arm/boot/dts/qcom-ipq8065.dtsi
|
||||
+++ b/arch/arm/boot/dts/qcom-ipq8065.dtsi
|
||||
@@ -311,45 +311,37 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
- smb208_s1a: smb208-s1a {
|
||||
- compatible = "qcom,rpm-smb208";
|
||||
- reg = <QCOM_RPM_SMB208_S1a>;
|
||||
+ regulators {
|
||||
+ compatible = "qcom,rpm-smb208-regulators";
|
||||
|
||||
- regulator-min-microvolt = <1050000>;
|
||||
- regulator-max-microvolt = <1150000>;
|
||||
+ smb208_s1a: s1a {
|
||||
+ regulator-min-microvolt = <1050000>;
|
||||
+ regulator-max-microvolt = <1150000>;
|
||||
|
||||
- qcom,switch-mode-frequency = <1200000>;
|
||||
+ qcom,switch-mode-frequency = <1200000>;
|
||||
|
||||
- };
|
||||
-
|
||||
- smb208_s1b: smb208-s1b {
|
||||
- compatible = "qcom,rpm-smb208";
|
||||
- reg = <QCOM_RPM_SMB208_S1b>;
|
||||
-
|
||||
- regulator-min-microvolt = <1050000>;
|
||||
- regulator-max-microvolt = <1150000>;
|
||||
+ };
|
||||
|
||||
- qcom,switch-mode-frequency = <1200000>;
|
||||
- };
|
||||
-
|
||||
- smb208_s2a: smb208-s2a {
|
||||
- compatible = "qcom,rpm-smb208";
|
||||
- reg = <QCOM_RPM_SMB208_S2a>;
|
||||
+ smb208_s1b: s1b {
|
||||
+ regulator-min-microvolt = <1050000>;
|
||||
+ regulator-max-microvolt = <1150000>;
|
||||
|
||||
- regulator-min-microvolt = < 800000>;
|
||||
- regulator-max-microvolt = <1275000>;
|
||||
+ qcom,switch-mode-frequency = <1200000>;
|
||||
+ };
|
||||
|
||||
- qcom,switch-mode-frequency = <1400000>;
|
||||
- };
|
||||
+ smb208_s2a: s2a {
|
||||
+ regulator-min-microvolt = < 800000>;
|
||||
+ regulator-max-microvolt = <1275000>;
|
||||
|
||||
- smb208_s2b: smb208-s2b {
|
||||
- compatible = "qcom,rpm-smb208";
|
||||
- reg = <QCOM_RPM_SMB208_S2b>;
|
||||
+ qcom,switch-mode-frequency = <1200000>;
|
||||
+ };
|
||||
|
||||
- regulator-min-microvolt = < 800000>;
|
||||
- regulator-max-microvolt = <1275000>;
|
||||
+ smb208_s2b: s2b {
|
||||
+ regulator-min-microvolt = < 800000>;
|
||||
+ regulator-max-microvolt = <1275000>;
|
||||
|
||||
- qcom,switch-mode-frequency = <1400000>;
|
||||
+ qcom,switch-mode-frequency = <1200000>;
|
||||
+ };
|
||||
};
|
||||
|
||||
cxo_clk: cxo-clk {
|
||||
|
|
|
|||
Loading…
Reference in a new issue