ipq806x: Add support for IPQ8064 AP161 board

Specification:
   - SoC: Qualcomm Atheros IPQ8064 ARM-v7 Dual Core SMP CPU
   - RAM: 512MB DDR3 System Memory
   - NOR Flash: 32MB SPI NOR
   - NAND Flash: 256MB NAND
   - Ethernet: 5 x 1G via QCA8337N
   - USB: 2 x USB 3.0 SuperSpeed
   - PCIe: 3x Mini PCIe 2.0 Slots
	   Three PCIE2.0 connectors can connect two or three radio cards
           such as the CUS260 for 2.4 GHz WLAN and the CUS239 for 802.11ac WLAN

 How to flash via u-boot console:
   tftpboot 0x44000000 openwrt-ipq806x-qcom_ipq8064-ap161-squashfs-nand-factory.bin
   nand erase  0x1340000 0x4000000
   nand write  0x44000000 0x1340000 $filesize
   setenv bootargs ‘console=ttyMSM0,115200 ubi.mtd=ubi root=/dev/ubiblock0_1’
   saveenv
   bootm

 Further upgrades via sysupgrade.

 Tested on IPQ8064 AP161 Board:
   1) NAND boot
   2) Tested USB and PCIe interfaces
   3) WDOG test
   4) cpu frequency scaling
   5) ethernet, 2G and 5G WiFi
   6) ubi sysupgrade

Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
This commit is contained in:
Ram Chandra Jangir 2018-10-19 16:47:42 +05:30 committed by John Crispin
parent 1ade96def7
commit dc6af37544
5 changed files with 295 additions and 1 deletions

View file

@ -21,6 +21,11 @@ tplink,vr2600v)
ucidef_add_switch "switch0" \ ucidef_add_switch "switch0" \
"1:lan" "2:lan" "3:lan" "4:lan" "6@eth1" "5:wan" "0@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "6@eth1" "5:wan" "0@eth0"
;; ;;
qcom,ipq8064-ap161)
ucidef_set_interface_lan "eth1 eth2"
ucidef_add_switch "switch0" \
"0:lan" "1:lan" "2:lan" "3u@eth1" "6:wan" "4u@eth0"
;;
linksys,ea8500) linksys,ea8500)
hw_mac_addr=$(mtd_get_mac_ascii devinfo hw_mac_addr) hw_mac_addr=$(mtd_get_mac_ascii devinfo hw_mac_addr)
ucidef_add_switch "switch0" \ ucidef_add_switch "switch0" \

View file

@ -16,6 +16,7 @@ platform_do_upgrade() {
netgear,r7500v2 |\ netgear,r7500v2 |\
netgear,r7800 |\ netgear,r7800 |\
qcom,ipq8064-ap148 |\ qcom,ipq8064-ap148 |\
qcom,ipq8064-ap161 |\
zyxel,nbg6817) zyxel,nbg6817)
nand_do_upgrade "$ARGV" nand_do_upgrade "$ARGV"
;; ;;

View file

@ -0,0 +1,274 @@
#include "qcom-ipq8064-v1.0.dtsi"
/ {
model = "Qualcomm IPQ8064/AP161";
compatible = "qcom,ipq8064-ap161", "qcom,ipq8064";
memory@0 {
reg = <0x42000000 0x1e000000>;
device_type = "memory";
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
rsvd@41200000 {
reg = <0x41200000 0x300000>;
no-map;
};
};
aliases {
serial0 = &gsbi4_serial;
mdio-gpio0 = &mdio0;
};
chosen {
linux,stdout-path = "serial0:115200n8";
};
soc {
pinmux@800000 {
i2c4_pins: i2c4_pinmux {
pins = "gpio12", "gpio13";
function = "gsbi4";
bias-disable;
};
spi_pins: spi_pins {
mux {
pins = "gpio18", "gpio19", "gpio21";
function = "gsbi5";
drive-strength = <10>;
bias-none;
};
};
nand_pins: nand_pins {
mux {
pins = "gpio34", "gpio35", "gpio36",
"gpio37", "gpio38", "gpio39",
"gpio40", "gpio41", "gpio42",
"gpio43", "gpio44", "gpio45",
"gpio46", "gpio47";
function = "nand";
drive-strength = <10>;
bias-disable;
};
pullups {
pins = "gpio39";
bias-pull-up;
};
hold {
pins = "gpio40", "gpio41", "gpio42",
"gpio43", "gpio44", "gpio45",
"gpio46", "gpio47";
bias-bus-hold;
};
};
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
};
rgmii2_pins: rgmii2_pins {
mux {
pins = "gpio2", "gpio27", "gpio28",
"gpio29", "gpio30", "gpio31",
"gpio32", "gpio51", "gpio52",
"gpio59", "gpio60", "gpio61",
"gpio62" , "gpio66";
function = "rgmii2";
drive-strength = <8>;
bias-disable;
};
};
};
gsbi@16300000 {
qcom,mode = <GSBI_PROT_I2C_UART>;
status = "ok";
serial@16340000 {
status = "ok";
};
/*
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
};
gsbi5: gsbi@1a200000 {
qcom,mode = <GSBI_PROT_SPI>;
status = "ok";
spi4: spi@1a280000 {
status = "ok";
spi-max-frequency = <50000000>;
pinctrl-0 = <&spi_pins>;
pinctrl-names = "default";
cs-gpios = <&qcom_pinmux 20 0>;
flash: m25p80@0 {
compatible = "s25fl256s1";
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <50000000>;
reg = <0>;
partitions {
compatible = "qcom,smem";
};
};
};
};
sata-phy@1b400000 {
status = "ok";
};
sata@29000000 {
status = "ok";
};
phy@100f8800 { /* USB3 port 1 HS phy */
status = "ok";
};
phy@100f8830 { /* USB3 port 1 SS phy */
status = "ok";
};
phy@110f8800 { /* USB3 port 0 HS phy */
status = "ok";
};
phy@110f8830 { /* USB3 port 0 SS phy */
status = "ok";
};
usb30@0 {
status = "ok";
};
usb30@1 {
status = "ok";
};
pcie0: pci@1b500000 {
status = "ok";
};
pcie1: pci@1b700000 {
status = "ok";
force_gen1 = <1>;
};
pcie2: pci@1b900000 {
status = "ok";
};
nand@1ac00000 {
status = "ok";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
cs0 {
reg = <0>;
compatible = "qcom,nandcs";
nand-ecc-strength = <4>;
nand-bus-width = <8>;
nand-ecc-step-size = <512>;
partitions {
compatible = "qcom,smem";
};
};
};
mdio0: mdio {
compatible = "virtual,mdio-gpio";
#address-cells = <1>;
#size-cells = <0>;
gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x20080 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
phy3: ethernet-phy@3 {
device_type = "ethernet-phy";
reg = <3>;
};
};
gmac0: ethernet@37000000 {
status = "ok";
phy-mode = "rgmii";
qcom,id = <0>;
pinctrl-0 = <&rgmii2_pins>;
pinctrl-names = "default";
mdiobus = <&mdio0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
gmac1: ethernet@37200000 {
status = "ok";
phy-mode = "rgmii";
qcom,id = <1>;
mdiobus = <&mdio0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
gmac2: ethernet@37400000 {
status = "ok";
phy-mode = "sgmii";
qcom,id = <2>;
mdiobus = <&mdio0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
&adm_dma {
status = "ok";
};

View file

@ -201,6 +201,19 @@ define Device/qcom_ipq8064-ap148-legacy
endef endef
TARGET_DEVICES += qcom_ipq8064-ap148-legacy TARGET_DEVICES += qcom_ipq8064-ap148-legacy
define Device/qcom_ipq8064-ap161
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_DTS := qcom-ipq8064-ap161
KERNEL_INSTALL := 1
BLOCKSIZE := 128k
PAGESIZE := 2048
BOARD_NAME := ap161
DEVICE_TITLE := Qualcomm AP161
DEVICE_PACKAGES := ath10k-firmware-qca99x0-ct
endef
TARGET_DEVICES += qcom_ipq8064-ap161
define Device/qcom_ipq8064-db149 define Device/qcom_ipq8064-db149
$(call Device/FitImage) $(call Device/FitImage)
DEVICE_DTS := qcom-ipq8064-db149 DEVICE_DTS := qcom-ipq8064-db149

View file

@ -10,13 +10,14 @@ Signed-off-by: John Crispin <john@phrozen.org>
--- a/arch/arm/boot/dts/Makefile --- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile
@@ -699,6 +699,16 @@ dtb-$(CONFIG_ARCH_QCOM) += \ @@ -699,6 +699,17 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-apq8084-mtp.dtb \ qcom-apq8084-mtp.dtb \
qcom-ipq4019-ap.dk01.1-c1.dtb \ qcom-ipq4019-ap.dk01.1-c1.dtb \
qcom-ipq8064-ap148.dtb \ qcom-ipq8064-ap148.dtb \
+ qcom-ipq8064-c2600.dtb \ + qcom-ipq8064-c2600.dtb \
+ qcom-ipq8064-d7800.dtb \ + qcom-ipq8064-d7800.dtb \
+ qcom-ipq8064-db149.dtb \ + qcom-ipq8064-db149.dtb \
+ qcom-ipq8064-ap161.dtb \
+ qcom-ipq8064-ea8500.dtb \ + qcom-ipq8064-ea8500.dtb \
+ qcom-ipq8064-r7500.dtb \ + qcom-ipq8064-r7500.dtb \
+ qcom-ipq8064-r7500v2.dtb \ + qcom-ipq8064-r7500v2.dtb \