bcm53xx: switch to standalone USB 2.0 PHY driver
This drops built-in support for USB 2.0 PHY and starts using separated driver that was upstreamed & backported some time ago. Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
This commit is contained in:
Rafał Miłecki
parent
7120a43013
commit
d7e41df24a
4 changed files with 142 additions and 128 deletions
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@ -72,8 +72,8 @@ DEVICE_VARS += PRODUCTID SIGNATURE NETGEAR_BOARD_ID NETGEAR_REGION
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BRCMFMAC_43602A1 := kmod-brcmfmac brcmfmac-firmware-43602a1-pcie
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BRCMFMAC_4366B1 := kmod-brcmfmac brcmfmac-firmware-4366b1-pcie
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USB2_PACKAGES := kmod-usb-ohci kmod-usb2
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USB3_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3
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USB2_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-phy-bcm-ns-usb2
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USB3_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-phy-bcm-ns-usb2
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define Device/Default
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# .dtb files are prefixed by SoC type, e.g. bcm4708- which is not included in device/image names
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@ -0,0 +1,136 @@
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From e8624859dde2ad07633dac7ec86629a516411ea1 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Wed, 21 Sep 2016 18:01:43 +0200
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Subject: [PATCH] USB: bcma: drop Northstar PHY 2.0 initialization code
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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This driver should initialize controller only, PHY initialization should
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be handled by separated PHY driver. We already have phy-bcm-ns-usb2 in
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place so let it makes its duty.
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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---
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drivers/usb/host/bcma-hcd.c | 80 ++++++++++++++-------------------------------
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1 file changed, 25 insertions(+), 55 deletions(-)
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--- a/drivers/usb/host/bcma-hcd.c
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+++ b/drivers/usb/host/bcma-hcd.c
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@@ -239,44 +239,10 @@ static int bcma_hcd_usb20_old_arm_init(s
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return 0;
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}
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-static void bcma_hcd_init_chip_arm_phy(struct bcma_device *dev)
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-{
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- struct bcma_device *arm_core;
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- void __iomem *dmu;
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-
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- arm_core = bcma_find_core(dev->bus, BCMA_CORE_ARMCA9);
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- if (!arm_core) {
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- dev_err(&dev->dev, "can not find ARM Cortex A9 ihost core\n");
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- return;
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- }
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-
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- dmu = ioremap_nocache(arm_core->addr_s[0], 0x1000);
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- if (!dmu) {
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- dev_err(&dev->dev, "can not map ARM Cortex A9 ihost core\n");
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- return;
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- }
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-
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- /* Unlock DMU PLL settings */
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- iowrite32(0x0000ea68, dmu + 0x180);
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-
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- /* Write USB 2.0 PLL control setting */
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- iowrite32(0x00dd10c3, dmu + 0x164);
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-
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- /* Lock DMU PLL settings */
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- iowrite32(0x00000000, dmu + 0x180);
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-
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- iounmap(dmu);
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-}
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-
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-static void bcma_hcd_init_chip_arm_hc(struct bcma_device *dev)
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+static void bcma_hcd_usb20_ns_init_hc(struct bcma_device *dev)
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{
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u32 val;
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- /*
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- * Delay after PHY initialized to ensure HC is ready to be configured
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- */
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- usleep_range(1000, 2000);
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-
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/* Set packet buffer OUT threshold */
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val = bcma_read32(dev, 0x94);
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val &= 0xffff;
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@@ -287,20 +253,33 @@ static void bcma_hcd_init_chip_arm_hc(st
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val = bcma_read32(dev, 0x9c);
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val |= 1;
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bcma_write32(dev, 0x9c, val);
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+
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+ /*
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+ * Broadcom initializes PHY and then waits to ensure HC is ready to be
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+ * configured. In our case the order is reversed. We just initialized
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+ * controller and we let HCD initialize PHY, so let's wait (sleep) now.
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+ */
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+ usleep_range(1000, 2000);
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}
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-static void bcma_hcd_init_chip_arm(struct bcma_device *dev)
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+/**
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+ * bcma_hcd_usb20_ns_init - Initialize Northstar USB 2.0 controller
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+ */
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+static int bcma_hcd_usb20_ns_init(struct bcma_hcd_device *bcma_hcd)
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{
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- bcma_core_enable(dev, 0);
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+ struct bcma_device *core = bcma_hcd->core;
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+ struct bcma_chipinfo *ci = &core->bus->chipinfo;
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+ struct device *dev = &core->dev;
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+
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+ bcma_core_enable(core, 0);
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- if (dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM4707 ||
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- dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM53018) {
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- if (dev->bus->chipinfo.pkg == BCMA_PKG_ID_BCM4707 ||
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- dev->bus->chipinfo.pkg == BCMA_PKG_ID_BCM4708)
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- bcma_hcd_init_chip_arm_phy(dev);
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+ if (ci->id == BCMA_CHIP_ID_BCM4707 ||
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+ ci->id == BCMA_CHIP_ID_BCM53018)
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+ bcma_hcd_usb20_ns_init_hc(core);
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- bcma_hcd_init_chip_arm_hc(dev);
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- }
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+ of_platform_default_populate(dev->of_node, NULL, dev);
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+
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+ return 0;
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}
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static void bcma_hci_platform_power_gpio(struct bcma_device *dev, bool val)
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@@ -373,16 +352,7 @@ static int bcma_hcd_usb20_init(struct bc
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if (dma_set_mask_and_coherent(dev->dma_dev, DMA_BIT_MASK(32)))
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return -EOPNOTSUPP;
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- switch (dev->id.id) {
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- case BCMA_CORE_NS_USB20:
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- bcma_hcd_init_chip_arm(dev);
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- break;
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- case BCMA_CORE_USB20_HOST:
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- bcma_hcd_init_chip_mips(dev);
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- break;
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- default:
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- return -ENODEV;
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- }
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+ bcma_hcd_init_chip_mips(dev);
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/* In AI chips EHCI is addrspace 0, OHCI is 1 */
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ohci_addr = dev->addr_s[0];
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@@ -451,7 +421,7 @@ static int bcma_hcd_probe(struct bcma_de
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err = -ENOTSUPP;
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break;
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case BCMA_CORE_NS_USB20:
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- err = bcma_hcd_usb20_init(usb_dev);
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+ err = bcma_hcd_usb20_ns_init(usb_dev);
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break;
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case BCMA_CORE_NS_USB30:
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err = bcma_hcd_usb30_init(usb_dev);
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@ -30,7 +30,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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struct gpio_desc *gpio_desc;
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};
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@@ -319,6 +321,10 @@ static const struct usb_ehci_pdata ehci_
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@@ -298,6 +300,10 @@ static const struct usb_ehci_pdata ehci_
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static const struct usb_ohci_pdata ohci_pdata = {
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};
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@ -41,7 +41,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev,
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const char *name, u32 addr,
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const void *data,
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@@ -412,6 +418,150 @@ err_unregister_ohci_dev:
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@@ -382,6 +388,150 @@ err_unregister_ohci_dev:
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return err;
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}
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@ -192,7 +192,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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static int bcma_hcd_usb30_init(struct bcma_hcd_device *bcma_hcd)
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{
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struct bcma_device *core = bcma_hcd->core;
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@@ -419,7 +569,13 @@ static int bcma_hcd_usb30_init(struct bc
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@@ -389,7 +539,13 @@ static int bcma_hcd_usb30_init(struct bc
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bcma_core_enable(core, 0);
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@ -207,7 +207,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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return 0;
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}
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@@ -471,11 +627,14 @@ static void bcma_hcd_remove(struct bcma_
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@@ -441,11 +597,14 @@ static void bcma_hcd_remove(struct bcma_
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struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
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struct platform_device *ohci_dev = usb_dev->ohci_dev;
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struct platform_device *ehci_dev = usb_dev->ehci_dev;
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@ -1,122 +0,0 @@
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
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Subject: [PATCH] USB: bcma: improve USB 2.0 PHY support for BCM4709 and
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BCM47094
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
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---
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--- a/drivers/usb/host/bcma-hcd.c
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+++ b/drivers/usb/host/bcma-hcd.c
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@@ -32,6 +32,17 @@
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#include <linux/usb/ohci_pdriver.h>
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#include <linux/usb/xhci_pdriver.h>
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+/* DMU (Device Management Unit) */
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+#define BCMA_DMU_CRU_USB2_CONTROL 0x0164
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+#define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_MASK 0x00000FFC
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+#define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_SHIFT 2
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+#define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK 0x00007000
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+#define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_SHIFT 12
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+#define BCMA_DMU_CRU_CLKSET_KEY 0x0180
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+#define BCMA_DMU_CRU_STRAPS_CTRL 0x02A0
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+#define BCMA_DMU_CRU_STRAPS_CTRL_USB3 0x00000010
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+#define BCMA_DMU_CRU_STRAPS_CTRL_4BYTE 0x00008000
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+
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MODULE_AUTHOR("Hauke Mehrtens");
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MODULE_DESCRIPTION("Common USB driver for BCMA Bus");
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MODULE_LICENSE("GPL");
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@@ -241,10 +252,35 @@ static int bcma_hcd_usb20_old_arm_init(s
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return 0;
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}
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+static u32 bcma_hcd_usb_ref_clk_get_rate(void __iomem *dmu)
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+{
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+ u32 val, ndiv, pdiv, ch2_mdiv, ch2_freq;
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+
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+ /* get divider integer from the cru_genpll_control5 */
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+ val = ioread32(dmu + 0x154);
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+ ndiv = (val >> 20) & 0x3ff;
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+ if (ndiv == 0)
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+ ndiv = 1 << 10;
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+
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+ /* get pdiv and ch2_mdiv from the cru_genpll_control6 */
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+ val = ioread32(dmu + 0x158);
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+ pdiv = (val >> 24) & 0x7;
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+ pdiv = (pdiv == 0) ? (1 << 3) : pdiv;
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+
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+ ch2_mdiv = val & 0xff;
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+ ch2_mdiv = (ch2_mdiv == 0) ? (1 << 8) : ch2_mdiv;
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+
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+ /* calculate ch2_freq based on 25MHz reference clock */
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+ ch2_freq = (25000000 / (pdiv * ch2_mdiv)) * ndiv;
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+
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+ return ch2_freq;
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+}
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+
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static void bcma_hcd_init_chip_arm_phy(struct bcma_device *dev)
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{
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struct bcma_device *arm_core;
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void __iomem *dmu;
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+ u32 ref_clk_rate, usb2ctl, usb_pll_ndiv, usb_pll_pdiv;
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arm_core = bcma_find_core(dev->bus, BCMA_CORE_ARMCA9);
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if (!arm_core) {
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@@ -258,14 +294,29 @@ static void bcma_hcd_init_chip_arm_phy(s
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return;
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}
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+ ref_clk_rate = bcma_hcd_usb_ref_clk_get_rate(dmu);
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+
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+ usb2ctl = ioread32(dmu + BCMA_DMU_CRU_USB2_CONTROL);
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+
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+ usb_pll_pdiv = usb2ctl;
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+ usb_pll_pdiv &= BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK;
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+ usb_pll_pdiv >>= BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_SHIFT;
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+ if (!usb_pll_pdiv)
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+ usb_pll_pdiv = 1 << 3;
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+
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+ /* Calculate ndiv based on a solid 1920 MHz that is for USB2 PHY */
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+ usb_pll_ndiv = (1920000000 * usb_pll_pdiv) / ref_clk_rate;
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+
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/* Unlock DMU PLL settings */
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- iowrite32(0x0000ea68, dmu + 0x180);
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+ iowrite32(0x0000ea68, dmu + BCMA_DMU_CRU_CLKSET_KEY);
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/* Write USB 2.0 PLL control setting */
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- iowrite32(0x00dd10c3, dmu + 0x164);
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+ usb2ctl &= ~BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_MASK;
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+ usb2ctl |= usb_pll_ndiv << BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_SHIFT;
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+ iowrite32(usb2ctl, dmu + BCMA_DMU_CRU_USB2_CONTROL);
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/* Lock DMU PLL settings */
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- iowrite32(0x00000000, dmu + 0x180);
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+ iowrite32(0x00000000, dmu + BCMA_DMU_CRU_CLKSET_KEY);
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iounmap(dmu);
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}
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@@ -293,15 +344,17 @@ static void bcma_hcd_init_chip_arm_hc(st
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static void bcma_hcd_init_chip_arm(struct bcma_device *dev)
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{
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+ struct bcma_chipinfo *chipinfo = &dev->bus->chipinfo;
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+
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bcma_core_enable(dev, 0);
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- if (dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM4707 ||
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- dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM53018) {
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- if (dev->bus->chipinfo.pkg == BCMA_PKG_ID_BCM4707 ||
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- dev->bus->chipinfo.pkg == BCMA_PKG_ID_BCM4708)
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- bcma_hcd_init_chip_arm_phy(dev);
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+ if (chipinfo->id == BCMA_CHIP_ID_BCM4707 ||
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+ chipinfo->id == BCMA_CHIP_ID_BCM47094 ||
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+ chipinfo->id == BCMA_CHIP_ID_BCM53018) {
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+ bcma_hcd_init_chip_arm_phy(dev);
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- bcma_hcd_init_chip_arm_hc(dev);
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+ if (1) /* TODO: Exclude BCM53573 */
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+ bcma_hcd_init_chip_arm_hc(dev);
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}
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}
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