ramips: modify {read,write}_config helpers
SVN-Revision: 18141
This commit is contained in:
parent
ebde2e4c90
commit
d681005ce3
1 changed files with 15 additions and 17 deletions
|
@ -146,29 +146,28 @@ static struct pci_controller rt2880_pci_controller = {
|
||||||
.io_resource = &rt2880_pci_mem_resource,
|
.io_resource = &rt2880_pci_mem_resource,
|
||||||
};
|
};
|
||||||
|
|
||||||
static inline void read_config(unsigned long bus, unsigned long dev,
|
static inline u32 rt2880_pci_read_u32(unsigned long reg)
|
||||||
unsigned long func, unsigned long reg,
|
|
||||||
unsigned long *val)
|
|
||||||
{
|
{
|
||||||
unsigned long address;
|
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
u32 address;
|
||||||
|
u32 ret;
|
||||||
|
|
||||||
address = rt2880_pci_get_cfgaddr(bus, dev, func, reg);
|
address = rt2880_pci_get_cfgaddr(0, 0, 0, reg);
|
||||||
|
|
||||||
spin_lock_irqsave(&rt2880_pci_lock, flags);
|
spin_lock_irqsave(&rt2880_pci_lock, flags);
|
||||||
rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
|
rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
|
||||||
*val = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
|
ret = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
|
||||||
spin_unlock_irqrestore(&rt2880_pci_lock, flags);
|
spin_unlock_irqrestore(&rt2880_pci_lock, flags);
|
||||||
|
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void write_config(unsigned long bus, unsigned long dev,
|
static inline void rt2880_pci_write_u32(unsigned long reg, u32 val)
|
||||||
unsigned long func, unsigned long reg,
|
|
||||||
unsigned long val)
|
|
||||||
{
|
{
|
||||||
unsigned long address;
|
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
u32 address;
|
||||||
|
|
||||||
address = rt2880_pci_get_cfgaddr(bus, dev, func, reg);
|
address = rt2880_pci_get_cfgaddr(0, 0, 0, reg);
|
||||||
|
|
||||||
spin_lock_irqsave(&rt2880_pci_lock, flags);
|
spin_lock_irqsave(&rt2880_pci_lock, flags);
|
||||||
rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
|
rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
|
||||||
|
@ -179,7 +178,6 @@ static inline void write_config(unsigned long bus, unsigned long dev,
|
||||||
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||||
{
|
{
|
||||||
u16 cmd;
|
u16 cmd;
|
||||||
unsigned long val;
|
|
||||||
int irq = -1;
|
int irq = -1;
|
||||||
|
|
||||||
if (dev->bus->number != 0)
|
if (dev->bus->number != 0)
|
||||||
|
@ -187,8 +185,8 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||||
|
|
||||||
switch (PCI_SLOT(dev->devfn)) {
|
switch (PCI_SLOT(dev->devfn)) {
|
||||||
case 0x00:
|
case 0x00:
|
||||||
write_config(0, 0, 0, PCI_BASE_ADDRESS_0, 0x08000000);
|
rt2880_pci_write_u32(PCI_BASE_ADDRESS_0, 0x08000000);
|
||||||
read_config(0, 0, 0, PCI_BASE_ADDRESS_0, &val);
|
(void) rt2880_pci_read_u32(PCI_BASE_ADDRESS_0);
|
||||||
break;
|
break;
|
||||||
case 0x11:
|
case 0x11:
|
||||||
irq = RT288X_CPU_IRQ_PCI;
|
irq = RT288X_CPU_IRQ_PCI;
|
||||||
|
@ -214,7 +212,6 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||||
|
|
||||||
static int __init rt2880_pci_init(void)
|
static int __init rt2880_pci_init(void)
|
||||||
{
|
{
|
||||||
unsigned long val = 0;
|
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
rt2880_pci_base = ioremap_nocache(RT2880_PCI_BASE, PAGE_SIZE);
|
rt2880_pci_base = ioremap_nocache(RT2880_PCI_BASE, PAGE_SIZE);
|
||||||
|
@ -231,8 +228,9 @@ static int __init rt2880_pci_init(void)
|
||||||
rt2880_pci_reg_write(0x00800001, RT2880_PCI_REG_CLASS);
|
rt2880_pci_reg_write(0x00800001, RT2880_PCI_REG_CLASS);
|
||||||
rt2880_pci_reg_write(0x28801814, RT2880_PCI_REG_SUBID);
|
rt2880_pci_reg_write(0x28801814, RT2880_PCI_REG_SUBID);
|
||||||
rt2880_pci_reg_write(0x000c0000, RT2880_PCI_REG_PCIMSK_ADDR);
|
rt2880_pci_reg_write(0x000c0000, RT2880_PCI_REG_PCIMSK_ADDR);
|
||||||
write_config(0, 0, 0, PCI_BASE_ADDRESS_0, 0x08000000);
|
|
||||||
read_config(0, 0, 0, PCI_BASE_ADDRESS_0, &val);
|
rt2880_pci_write_u32(PCI_BASE_ADDRESS_0, 0x08000000);
|
||||||
|
(void) rt2880_pci_read_u32(PCI_BASE_ADDRESS_0);
|
||||||
|
|
||||||
register_pci_controller(&rt2880_pci_controller);
|
register_pci_controller(&rt2880_pci_controller);
|
||||||
return 0;
|
return 0;
|
||||||
|
|
Loading…
Reference in a new issue