correct the MDIO base address and reset sequence for Titan (#6573)
SVN-Revision: 20037
This commit is contained in:
parent
30ce77d30a
commit
d238ba2541
2 changed files with 85 additions and 27 deletions
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@ -1,5 +1,5 @@
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--- a/arch/mips/ar7/platform.c 2009-11-18 15:47:42.000000000 +0800
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+++ b/arch/mips/ar7/platform.c 2009-11-19 00:56:05.000000000 +0800
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--- a/arch/mips/ar7/platform.c 2010-01-25 16:11:24.000000000 +0800
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+++ b/arch/mips/ar7/platform.c 2010-01-13 14:46:16.000000000 +0800
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@@ -677,24 +677,32 @@
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}
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@ -41,26 +41,36 @@
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if (res)
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return res;
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--- a/drivers/net/cpmac.c 2009-11-18 15:47:42.000000000 +0800
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+++ b/drivers/net/cpmac.c 2009-11-19 00:58:25.000000000 +0800
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@@ -1236,6 +1236,10 @@
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ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
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ar7_device_reset(AR7_RESET_BIT_EPHY);
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--- a/drivers/net/cpmac.c 2010-01-25 16:11:24.000000000 +0800
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+++ b/drivers/net/cpmac.c 2010-01-25 16:48:02.000000000 +0800
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@@ -1141,6 +1141,8 @@
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goto fail;
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}
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+ ar7_device_reset(pdata->reset_bit);
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+
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dev->irq = platform_get_irq_byname(pdev, "irq");
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dev->open = cpmac_open;
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@@ -1221,7 +1223,7 @@
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cpmac_mii->reset = cpmac_mdio_reset;
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cpmac_mii->irq = mii_irqs;
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- cpmac_mii->priv = ioremap(AR7_REGS_MDIO, 256);
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+ cpmac_mii->priv = ioremap(ar7_is_titan()?TITAN_REGS_MDIO:AR7_REGS_MDIO, 256);
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if (!cpmac_mii->priv) {
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printk(KERN_ERR "Can't ioremap mdio registers\n");
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@@ -1232,9 +1234,10 @@
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#warning FIXME: unhardcode gpio&reset bits
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ar7_gpio_disable(26);
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ar7_gpio_disable(27);
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- ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
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- ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
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ar7_device_reset(AR7_RESET_BIT_EPHY);
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+ if (ar7_is_titan()) {
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+ ar7_device_reset(TITAN_RESET_BIT_EPHY1);
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+ }
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+
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cpmac_mii->reset(cpmac_mii);
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for (i = 0; i < 300; i++)
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@@ -1250,7 +1254,8 @@
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mask = 0;
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}
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- cpmac_mii->phy_mask = ~(mask | 0x80000000);
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+ cpmac_mii->phy_mask = ar7_is_titan()? ~(mask | 0x80000000 | 0x40000000):
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+ ~(mask | 0x80000000);
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snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "1");
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res = mdiobus_register(cpmac_mii);
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@ -1,6 +1,8 @@
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--- a/arch/mips/ar7/platform.c
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+++ b/arch/mips/ar7/platform.c
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@@ -716,23 +716,35 @@ static int __init ar7_register_devices(v
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Index: linux-2.6.32.9/arch/mips/ar7/platform.c
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===================================================================
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--- linux-2.6.32.9.orig/arch/mips/ar7/platform.c 2010-03-07 13:09:00.000000000 +0100
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+++ linux-2.6.32.9/arch/mips/ar7/platform.c 2010-03-07 13:09:00.000000000 +0100
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@@ -716,23 +716,35 @@
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}
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if (ar7_has_high_cpmac()) {
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@ -43,10 +45,39 @@
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if (res)
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return res;
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--- a/drivers/net/cpmac.c
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+++ b/drivers/net/cpmac.c
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@@ -1243,6 +1243,10 @@ int __devinit cpmac_init(void)
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ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
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Index: linux-2.6.32.9/drivers/net/cpmac.c
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===================================================================
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--- linux-2.6.32.9.orig/drivers/net/cpmac.c 2010-02-23 16:38:51.000000000 +0100
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+++ linux-2.6.32.9/drivers/net/cpmac.c 2010-03-07 13:24:56.000000000 +0100
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@@ -1153,6 +1153,8 @@
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goto fail;
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}
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+ ar7_device_reset(pdata->reset_bit);
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+
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dev->irq = platform_get_irq_byname(pdev, "irq");
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dev->netdev_ops = &cpmac_netdev_ops;
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@@ -1228,7 +1230,7 @@
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cpmac_mii->reset = cpmac_mdio_reset;
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cpmac_mii->irq = mii_irqs;
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- cpmac_mii->priv = ioremap(AR7_REGS_MDIO, 256);
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+ cpmac_mii->priv = ioremap(ar7_is_titan() ? TITAN_REGS_MDIO : AR7_REGS_MDIO, 256);
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if (!cpmac_mii->priv) {
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printk(KERN_ERR "Can't ioremap mdio registers\n");
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@@ -1239,10 +1241,17 @@
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#warning FIXME: unhardcode gpio&reset bits
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ar7_gpio_disable(26);
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ar7_gpio_disable(27);
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- ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
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- ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
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+
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+ if (!ar7_is_titan()) {
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+ ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
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+ ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
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+ }
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ar7_device_reset(AR7_RESET_BIT_EPHY);
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+ if (ar7_is_titan()) {
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@ -56,7 +87,7 @@
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cpmac_mii->reset(cpmac_mii);
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for (i = 0; i < 300; i++)
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@@ -1257,7 +1261,8 @@ int __devinit cpmac_init(void)
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@@ -1257,7 +1266,8 @@
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mask = 0;
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}
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@ -66,3 +97,20 @@
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snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "1");
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res = mdiobus_register(cpmac_mii);
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Index: a/arch/mips/include/asm/mach-ar7/ar7.h
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===================================================================
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--- a/arch/mips/include/asm/mach-ar7/ar7.h (revision 19112)
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+++ b/arch/mips/include/asm/mach-ar7/ar7.h (working copy)
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@@ -44,8 +44,10 @@
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#define UR8_REGS_WDT (AR7_REGS_BASE + 0x0b00)
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#define UR8_REGS_UART1 (AR7_REGS_BASE + 0x0f00)
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-#define TITAN_REGS_MAC0 (0x08640000)
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-#define TITAN_REGS_MAC1 (TITAN_REGS_MAC0 + 0x0800)
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+#define TITAN_REGS_ESWITCH_BASE (0x08640000)
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+#define TITAN_REGS_MAC0 (TITAN_REGS_ESWITCH_BASE + 0)
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+#define TITAN_REGS_MAC1 (TITAN_REGS_ESWITCH_BASE + 0x0800)
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+#define TITAN_REGS_MDIO (TITAN_REGS_ESWITCH_BASE + 0x02000)
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#define TITAN_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1c00)
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#define TITAN_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1300)
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