imx6: update gw5400-a dts cleanup
- remove dead code - alphabatize Signed-off-by: Tim Harvey <tharvey@gateworks.com> SVN-Revision: 38184
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1 changed files with 92 additions and 196 deletions
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@ -20,44 +20,38 @@
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aliases {
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ethernet0 = &fec;
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ethernet1 = ð1;
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sky2 = ð1;
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ssi0 = &ssi1;
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ssi1 = &ssi2;
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ipu0 = &ipu1;
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ipu1 = &ipu2;
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usdhc0 = &usdhc1;
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usdhc1 = &usdhc2;
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usdhc2 = &usdhc3;
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usdhc3 = &usdhc4;
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i2c0 = &i2c1;
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i2c1 = &i2c2;
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i2c2 = &i2c3;
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usb0 = &usbh3;
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usb1 = &usbotg;
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ipu0 = &ipu1;
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ipu1 = &ipu2;
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led0 = &led0;
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led1 = &led1;
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led2 = &led2;
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pwm0 = &pwm1;
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pwm1 = &pwm2;
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pwm2 = &pwm3;
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pwm3 = &pwm4;
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sky2 = ð1;
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ssi0 = &ssi1;
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ssi1 = &ssi2;
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spi0 = &ecspi1;
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spi1 = &ecspi2;
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spi2 = &ecspi3;
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spi3 = &ecspi4;
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spi4 = &ecspi5;
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pwm0 = &pwm1;
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pwm1 = &pwm2;
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pwm2 = &pwm3;
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pwm3 = &pwm4;
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can0 = &can1;
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led0 = &led0;
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led1 = &led1;
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led2 = &led2;
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usb0 = &usbh3;
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usb1 = &usbotg;
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usdhc0 = &usdhc1;
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usdhc1 = &usdhc2;
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usdhc2 = &usdhc3;
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usdhc3 = &usdhc4;
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};
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/* SDRAM addressing */
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memory {
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reg = <0x10000000 0x40000000>;
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};
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chosen {
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bootargs = "console=ttymxc1,115200";
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};
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leds {
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compatible = "gpio-leds";
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@ -125,109 +119,10 @@
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};
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};
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&iomuxc {
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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hog {
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX6Q_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
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MX6Q_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */
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MX6Q_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user0 led */
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MX6Q_PAD_KEY_COL2__GPIO4_IO10 0x80000000 /* user1 led */
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MX6Q_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user2 led */
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/* let bootloader choose these based on hwconfig */
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#if 0
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MX6Q_PAD_GPIO_9__GPIO1_IO09 0x80000000 /* MX6_DIO0 (or PWM1_PWM0) */
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MX6Q_PAD_SD1_DAT2__GPIO1_IO19 0x80000000 /* MX6_DIO1 (or PWM2_PWM0) */
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MX6Q_PAD_SD4_DAT1__GPIO2_IO09 0x80000000 /* MX6_DIO2 (or PWM3_PWM0) */
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MX6Q_PAD_SD4_DAT2__GPIO2_IO10 0x80000000 /* MX6_DIO3 (or PWM3_PWM0) */
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#endif
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MX6Q_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */
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MX6Q_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
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MX6Q_PAD_ENET_TXD1__GPIO1_IO29 0x08000000 /* PCIE RST */
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MX6Q_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */
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MX6Q_PAD_GPIO_0__CCM_CLKO1 0x80000000 /* AUD4_MCK */
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>;
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};
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};
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#if 0
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/* ipu1: IPU1_CSI0: HDMI reciver (Digital Video In) */
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ipu1 {
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pinctrl_ipu1_1: ipu1grp-5 {
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fsl,pins = <
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MX6Q_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC
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MX6Q_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN
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MX6Q_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK
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MX6Q_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC
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MX6Q_PAD_CSI0_DAT4__IPU1_CSI0_DATA04
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MX6Q_PAD_CSI0_DAT5__IPU1_CSI0_DATA05
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MX6Q_PAD_CSI0_DAT6__IPU1_CSI0_DATA06
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MX6Q_PAD_CSI0_DAT7__IPU1_CSI0_DATA07
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MX6Q_PAD_CSI0_DAT8__IPU1_CSI0_DATA08
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MX6Q_PAD_CSI0_DAT9__IPU1_CSI0_DATA09
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MX6Q_PAD_CSI0_DAT10__IPU1_CSI0_DATA10
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MX6Q_PAD_CSI0_DAT11__IPU1_CSI0_DATA11
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MX6Q_PAD_CSI0_DAT12__IPU1_CSI0_DATA12
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MX6Q_PAD_CSI0_DAT13__IPU1_CSI0_DATA13
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MX6Q_PAD_CSI0_DAT14__IPU1_CSI0_DATA14
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MX6Q_PAD_CSI0_DAT15__IPU1_CSI0_DATA15
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MX6Q_PAD_CSI0_DAT16__IPU1_CSI0_DATA16
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MX6Q_PAD_CSI0_DAT17__IPU1_CSI0_DATA17
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MX6Q_PAD_CSI0_DAT18__IPU1_CSI0_DATA18
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MX6Q_PAD_CSI0_DAT19__IPU1_CSI0_DATA19
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>;
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};
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};
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/* ipu2: IPU1_CSI1: Analog Video Decoder (Analog Video In) */
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/* IPU2_CSI1: Analog Video Decoder (Analog Video In) */
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ipu2 {
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pinctrl_ipu2_1: ipu2grp-1 {
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fsl,pins = <
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MX6Q_PAD_EIM_A17__IPU2_CSI1_DATA12
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MX6Q_PAD_EIM_D27__IPU2_CSI1_DATA13
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MX6Q_PAD_EIM_D26__IPU2_CSI1_DATA14
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MX6Q_PAD_EIM_D20__IPU2_CSI1_DATA15
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MX6Q_PAD_EIM_D19__IPU2_CSI1_DATA16
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MX6Q_PAD_EIM_D18__IPU2_CSI1_DATA17
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MX6Q_PAD_EIM_D16__IPU2_CSI1_DATA18
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MX6Q_PAD_EIM_EB2__IPU2_CSI1_DATA19
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MX6Q_PAD_EIM_D29__IPU2_CSI1_VSYNC
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MX6Q_PAD_EIM_EB3__IPU2_CSI1_HSYNC
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// not sure why this causes kernel to crash in early init
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// MX6Q_PAD_EIM_A16__IPU2_CSI1_PIXCLK
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>;
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};
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};
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/* ipu3: IPU2_DISP0: Analog Video Encoder (Analog Video Out) */
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ipu3 {
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pinctrl_ipu3_1: ipu3grp-5 {
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fsl,pins = <
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MX6Q_PAD_DISP0_DAT0__IPU2_DISP0_DATA00
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MX6Q_PAD_DISP0_DAT1__IPU2_DISP0_DATA01
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MX6Q_PAD_DISP0_DAT2__IPU2_DISP0_DATA02
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MX6Q_PAD_DISP0_DAT3__IPU2_DISP0_DATA03
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MX6Q_PAD_DISP0_DAT4__IPU2_DISP0_DATA04
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MX6Q_PAD_DISP0_DAT5__IPU2_DISP0_DATA05
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MX6Q_PAD_DISP0_DAT6__IPU2_DISP0_DATA06
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MX6Q_PAD_DISP0_DAT7__IPU2_DISP0_DATA07
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MX6Q_PAD_DISP0_DAT8__IPU2_DISP0_DATA08
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MX6Q_PAD_DISP0_DAT9__IPU2_DISP0_DATA09
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MX6Q_PAD_DISP0_DAT10__IPU2_DISP0_DATA10
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MX6Q_PAD_DISP0_DAT11__IPU2_DISP0_DATA11
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MX6Q_PAD_DISP0_DAT12__IPU2_DISP0_DATA12
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MX6Q_PAD_DISP0_DAT13__IPU2_DISP0_DATA13
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MX6Q_PAD_DISP0_DAT14__IPU2_DISP0_DATA14
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MX6Q_PAD_DISP0_DAT15__IPU2_DISP0_DATA15
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>;
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};
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};
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#endif
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pinctrl-0 = <&pinctrl_audmux_3>;
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status = "okay";
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};
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&ecspi1 {
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@ -244,61 +139,6 @@
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};
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1_2>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2_2>;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3_1>;
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status = "okay";
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};
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&uart5 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart5_1>;
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};
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&ssi1 {
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fsl,mode = "i2s-slave";
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status = "okay";
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};
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&ssi2 {
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fsl,mode = "i2s-slave";
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status = "okay";
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};
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&can1 {
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reg = <0x02090000 0x4000>;
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interrupts = <0 110 0x04>;
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status = "okay";
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};
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&usbh1 {
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status = "okay";
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};
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&pcie {
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reset-gpio = <&gpio1 29 0>;
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status = "okay";
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eth1: sky2@8 { /* MAC/PHY on bus 8 */
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compatible = "marvell,sky2";
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/* Filled in by U-Boot */
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mac-address = [ 00 00 00 00 00 00 ];
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet_1>;
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@ -307,20 +147,6 @@
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3_2>;
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cd-gpios = <&gpio7 0 0>;
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vmmc-supply = <®_3p3v>;
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status = "okay";
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux_3>;
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status = "okay";
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};
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&i2c1 {
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status = "okay";
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clock-frequency = <100000>;
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@ -438,6 +264,28 @@
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};
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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hog {
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX6Q_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
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MX6Q_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */
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MX6Q_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
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MX6Q_PAD_KEY_COL2__GPIO4_IO10 0x80000000 /* user2 led */
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MX6Q_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
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MX6Q_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */
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MX6Q_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
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MX6Q_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
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MX6Q_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */
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MX6Q_PAD_GPIO_0__CCM_CLKO1 0x80000000 /* AUD4_MCK */
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>;
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};
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};
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};
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&ldb {
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status = "okay";
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lvds-channel@0 {
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@ -445,6 +293,54 @@
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};
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};
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&sata {
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&pcie {
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reset-gpio = <&gpio1 29 0>;
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status = "okay";
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eth1: sky2@8 { /* MAC/PHY on bus 8 */
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compatible = "marvell,sky2";
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/* Filled in by U-Boot */
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mac-address = [ 00 00 00 00 00 00 ];
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};
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};
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&ssi1 {
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fsl,mode = "i2s-slave";
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1_2>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2_2>;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3_1>;
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status = "okay";
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};
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&uart5 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart5_1>;
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};
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&usbh1 {
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3_2>;
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cd-gpios = <&gpio7 0 0>;
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vmmc-supply = <®_3p3v>;
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status = "okay";
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};
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