ipq806x: add support for non-dt enabled ap148 bootloader
Certain AP148 platforms (and derivative) use bootloaders which did not have DT enabled. In order to support these old platforms, we'll now make the following modifications: *explicitely add the memory node in the AP148 DT: this used to be added by new u-boot through a run-time patch mechanism. We'll now add it explicitely so it works on boots which don't support that feature. New boots will have the node twice, the second one will be ignored. *add the zImage generation next to the FIT image for AP148. Other platforms using non-DT enabled bootloaders may want to leverage this zImage code to generate their own firmare as well. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 46555
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4d1656e813
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c4c986e419
7 changed files with 47 additions and 9 deletions
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@ -8,6 +8,15 @@ UBINIZE_OPTS = -m 2048 -p 128KiB
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E2SIZE=$(shell echo $$(($(CONFIG_TARGET_ROOTFS_PARTSIZE)*1024)))
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define Image/BuildKernel/zImage
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cat $(KDIR)/zImage $(LINUX_DIR)/arch/arm/boot/dts/$(1).dtb > $(KDIR)/zImage-$(1)
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$(CP) $(KDIR)/zImage-$(1) $(BIN_DIR)/$(IMG_PREFIX)-$(1)-zImage
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ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
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cat $(KDIR)/zImage-initramfs $(LINUX_DIR)/arch/arm/boot/dts/$(1).dtb > $(KDIR)/zImage-initramfs-$(1)
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$(CP) $(KDIR)/zImage-initramfs-$(1) $(BIN_DIR)/$(IMG_PREFIX)-$(1)-zImage-initramfs
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endif
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endef
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define Image/BuildKernel/FIT
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gzip -9n -c $(KDIR)/Image > $(KDIR)/Image.gz
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$(call CompressLzma,$(KDIR)/Image,$(KDIR)/Image.gz)
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@ -26,6 +35,7 @@ endef
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define Image/BuildKernel
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$(CP) $(KDIR)/$(IMG_PREFIX)-vmlinux.elf $(BIN_DIR)
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$(call Image/BuildKernel/FIT,qcom-ipq8064-ap148)
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$(call Image/BuildKernel/zImage,qcom-ipq8064-ap148)
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$(call Image/BuildKernel/FIT,qcom-ipq8064-db149)
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endef
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@ -0,0 +1,14 @@
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--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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@@ -4,6 +4,11 @@
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model = "Qualcomm IPQ8064/AP148";
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compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
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+ memory@0 {
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+ reg = <0x42000000 0x1e000000>;
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+ device_type = "memory";
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+ };
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+
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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@ -0,0 +1,14 @@
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--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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@@ -4,6 +4,11 @@
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model = "Qualcomm IPQ8064/AP148";
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compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
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+ memory@0 {
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+ reg = <0x42000000 0x1e000000>;
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+ device_type = "memory";
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+ };
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+
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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@ -15,7 +15,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
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--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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@@ -30,6 +30,22 @@
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@@ -35,6 +35,22 @@
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bias-disable;
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};
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@ -38,7 +38,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
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spi_pins: spi_pins {
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mux {
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pins = "gpio18", "gpio19", "gpio21";
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@@ -109,5 +125,19 @@
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@@ -114,5 +130,19 @@
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sata@29000000 {
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status = "ok";
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};
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@ -37,7 +37,7 @@
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};
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};
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@@ -195,6 +213,46 @@
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@@ -72,6 +90,46 @@
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};
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};
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@ -84,7 +84,7 @@
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soc: soc {
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#address-cells = <1>;
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#size-cells = <1>;
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@@ -310,11 +368,13 @@
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@@ -187,11 +245,13 @@
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acc0: clock-controller@2088000 {
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compatible = "qcom,kpss-acc-v1";
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reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
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@ -11,7 +11,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
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--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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@@ -14,8 +14,9 @@
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@@ -19,8 +19,9 @@
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};
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};
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@ -22,7 +22,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
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};
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chosen {
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@@ -54,6 +55,15 @@
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@@ -59,6 +60,15 @@
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bias-none;
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};
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};
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@ -38,7 +38,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
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};
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gsbi@16300000 {
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@@ -139,5 +149,33 @@
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@@ -144,5 +154,33 @@
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pinctrl-0 = <&pcie2_pins>;
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pinctrl-names = "default";
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};
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@ -12,7 +12,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
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--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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@@ -64,6 +64,16 @@
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@@ -69,6 +69,16 @@
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bias-disable;
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};
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};
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@ -29,7 +29,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
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};
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gsbi@16300000 {
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@@ -177,5 +187,26 @@
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@@ -182,5 +192,26 @@
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reg = <4>;
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};
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};
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