ipq806x: add support for non-dt enabled ap148 bootloader

Certain AP148 platforms (and derivative) use bootloaders which did not
have DT enabled.
In order to support these old platforms, we'll now make the following
modifications:
*explicitely add the memory node in the AP148 DT: this used to be added
 by new u-boot through a run-time patch mechanism. We'll now add it
 explicitely so it works on boots which don't support that feature. New
 boots will have the node twice, the second one will be ignored.
*add the zImage generation next to the FIT image for AP148.

Other platforms using non-DT enabled bootloaders may want to leverage
this zImage code to generate their own firmare as well.

Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>

SVN-Revision: 46555
This commit is contained in:
Felix Fietkau 2015-08-04 23:09:43 +00:00
parent 4d1656e813
commit c4c986e419
7 changed files with 47 additions and 9 deletions

View file

@ -8,6 +8,15 @@ UBINIZE_OPTS = -m 2048 -p 128KiB
E2SIZE=$(shell echo $$(($(CONFIG_TARGET_ROOTFS_PARTSIZE)*1024)))
define Image/BuildKernel/zImage
cat $(KDIR)/zImage $(LINUX_DIR)/arch/arm/boot/dts/$(1).dtb > $(KDIR)/zImage-$(1)
$(CP) $(KDIR)/zImage-$(1) $(BIN_DIR)/$(IMG_PREFIX)-$(1)-zImage
ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
cat $(KDIR)/zImage-initramfs $(LINUX_DIR)/arch/arm/boot/dts/$(1).dtb > $(KDIR)/zImage-initramfs-$(1)
$(CP) $(KDIR)/zImage-initramfs-$(1) $(BIN_DIR)/$(IMG_PREFIX)-$(1)-zImage-initramfs
endif
endef
define Image/BuildKernel/FIT
gzip -9n -c $(KDIR)/Image > $(KDIR)/Image.gz
$(call CompressLzma,$(KDIR)/Image,$(KDIR)/Image.gz)
@ -26,6 +35,7 @@ endef
define Image/BuildKernel
$(CP) $(KDIR)/$(IMG_PREFIX)-vmlinux.elf $(BIN_DIR)
$(call Image/BuildKernel/FIT,qcom-ipq8064-ap148)
$(call Image/BuildKernel/zImage,qcom-ipq8064-ap148)
$(call Image/BuildKernel/FIT,qcom-ipq8064-db149)
endef

View file

@ -0,0 +1,14 @@
--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
@@ -4,6 +4,11 @@
model = "Qualcomm IPQ8064/AP148";
compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
+ memory@0 {
+ reg = <0x42000000 0x1e000000>;
+ device_type = "memory";
+ };
+
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;

View file

@ -0,0 +1,14 @@
--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
@@ -4,6 +4,11 @@
model = "Qualcomm IPQ8064/AP148";
compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
+ memory@0 {
+ reg = <0x42000000 0x1e000000>;
+ device_type = "memory";
+ };
+
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;

View file

@ -15,7 +15,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
@@ -30,6 +30,22 @@
@@ -35,6 +35,22 @@
bias-disable;
};
@ -38,7 +38,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
spi_pins: spi_pins {
mux {
pins = "gpio18", "gpio19", "gpio21";
@@ -109,5 +125,19 @@
@@ -114,5 +130,19 @@
sata@29000000 {
status = "ok";
};

View file

@ -37,7 +37,7 @@
};
};
@@ -195,6 +213,46 @@
@@ -72,6 +90,46 @@
};
};
@ -84,7 +84,7 @@
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -310,11 +368,13 @@
@@ -187,11 +245,13 @@
acc0: clock-controller@2088000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x02088000 0x1000>, <0x02008000 0x1000>;

View file

@ -11,7 +11,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
@@ -14,8 +14,9 @@
@@ -19,8 +19,9 @@
};
};
@ -22,7 +22,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
};
chosen {
@@ -54,6 +55,15 @@
@@ -59,6 +60,15 @@
bias-none;
};
};
@ -38,7 +38,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
};
gsbi@16300000 {
@@ -139,5 +149,33 @@
@@ -144,5 +154,33 @@
pinctrl-0 = <&pcie2_pins>;
pinctrl-names = "default";
};

View file

@ -12,7 +12,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
@@ -64,6 +64,16 @@
@@ -69,6 +69,16 @@
bias-disable;
};
};
@ -29,7 +29,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
};
gsbi@16300000 {
@@ -177,5 +187,26 @@
@@ -182,5 +192,26 @@
reg = <4>;
};
};