brcm47xx: backport 3.14 patch for nvram GPIO pin read
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 40346
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From 4fe2169acecb6e62821dfe14bc5c5852870b516f Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
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Date: Thu, 13 Feb 2014 17:48:12 +0100
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Subject: MIPS: BCM47XX: Check all (32) GPIOs when looking for a pin
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Broadcom boards support 32 GPIOs and NVRAM may have entires for higher
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ones too. Example:
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gpio23=wombo_reset
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Signed-off-by: Rafa? Mi?ecki <zajec5@gmail.com>
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Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
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Cc: linux-mips@linux-mips.org
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Cc: Rafał Miłecki <zajec5@gmail.com>
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Patchwork: https://patchwork.linux-mips.org/patch/6547/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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--- a/arch/mips/bcm47xx/nvram.c
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+++ b/arch/mips/bcm47xx/nvram.c
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@@ -197,7 +197,7 @@ int bcm47xx_nvram_gpio_pin(const char *n
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char nvram_var[10];
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char buf[30];
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- for (i = 0; i < 16; i++) {
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+ for (i = 0; i < 32; i++) {
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err = snprintf(nvram_var, sizeof(nvram_var), "gpio%i", i);
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if (err <= 0)
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continue;
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