ar71xx: ethernet: reduce tx dma ring size further to improve cache footprint
Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 37765
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1 changed files with 2 additions and 2 deletions
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@ -55,10 +55,10 @@
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(ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN)
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(ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN)
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#define AG71XX_RX_BUF_SIZE (AG71XX_RX_PKT_SIZE + NET_SKB_PAD + NET_IP_ALIGN)
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#define AG71XX_RX_BUF_SIZE (AG71XX_RX_PKT_SIZE + NET_SKB_PAD + NET_IP_ALIGN)
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#define AG71XX_TX_RING_SIZE_DEFAULT 64
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#define AG71XX_TX_RING_SIZE_DEFAULT 32
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#define AG71XX_RX_RING_SIZE_DEFAULT 128
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#define AG71XX_RX_RING_SIZE_DEFAULT 128
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#define AG71XX_TX_RING_SIZE_MAX 128
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#define AG71XX_TX_RING_SIZE_MAX 32
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#define AG71XX_RX_RING_SIZE_MAX 128
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#define AG71XX_RX_RING_SIZE_MAX 128
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#ifdef CONFIG_AG71XX_DEBUG
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#ifdef CONFIG_AG71XX_DEBUG
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