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ipq806x: fix pci pins

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Fix pci pins drive-strength according to oem sources.

Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
This commit is contained in:
Pavel Kubelun 2016-11-08 15:52:46 +03:00 committed by John Crispin
parent 84781cb6dc
commit bb8f5162fd
2 changed files with 9 additions and 7 deletions
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7
target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065.dtsi
View file

@ -305,7 +305,7 @@
mux {
pins = "gpio3";
function = "pcie1_rst";
drive-strength = <12>;
drive-strength = <2>;
bias-disable;
};
};
@ -314,7 +314,7 @@
mux {
pins = "gpio48";
function = "pcie2_rst";
drive-strength = <12>;
drive-strength = <2>;
bias-disable;
};
};
@ -323,8 +323,9 @@
mux {
pins = "gpio63";
function = "pcie3_rst";
drive-strength = <12>;
drive-strength = <2>;
bias-disable;
output-low;
};
};
};

9
target/linux/ipq806x/patches-4.4/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch
View file

@ -63,7 +63,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
/ {
model = "Qualcomm IPQ8064";
@@ -99,6 +102,33 @@
@@ -99,6 +102,34 @@
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <0 16 0x4>;
@ -72,7 +72,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
+ mux {
+ pins = "gpio3";
+ function = "pcie1_rst";
+ drive-strength = <12>;
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
@ -81,7 +81,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
+ mux {
+ pins = "gpio48";
+ function = "pcie2_rst";
+ drive-strength = <12>;
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
@ -90,8 +90,9 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
+ mux {
+ pins = "gpio63";
+ function = "pcie3_rst";
+ drive-strength = <12>;
+ drive-strength = <2>;
+ bias-disable;
+ output-low;
+ };
+ };
};