bcm53xx: use the latest submitted version of ILP clock driver
It switched to syscon to better describe PMU block. Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
This commit is contained in:
parent
e70e3c544a
commit
b964196c68
3 changed files with 52 additions and 63 deletions
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@ -209,6 +209,7 @@ CONFIG_LZO_COMPRESS=y
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CONFIG_LZO_DECOMPRESS=y
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# CONFIG_MDIO_BCM_IPROC is not set
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CONFIG_MDIO_BOARDINFO=y
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CONFIG_MFD_SYSCON=y
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CONFIG_MIGHT_HAVE_CACHE_L2X0=y
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CONFIG_MIGHT_HAVE_PCI=y
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CONFIG_MODULES_USE_ELF_REL=y
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@ -270,6 +271,8 @@ CONFIG_PINCTRL=y
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# CONFIG_PL310_ERRATA_769419 is not set
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CONFIG_RATIONAL=y
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CONFIG_RCU_STALL_COMMON=y
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CONFIG_REGMAP=y
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CONFIG_REGMAP_MMIO=y
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CONFIG_RFS_ACCEL=y
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CONFIG_RPS=y
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CONFIG_RWSEM_SPIN_ON_OWNER=y
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@ -1,20 +1,14 @@
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From 1909c8bf322e0bbb068d57c370c5b64906a8c5a7 Mon Sep 17 00:00:00 2001
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From 205fc550ceb74f7e8bfcba5c5c7329aa1b34d4ee Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Fri, 29 Jul 2016 14:48:19 +0200
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Subject: [PATCH V6] clk: bcm: Add driver for BCM53573 ILP clock
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Subject: [PATCH V8] clk: bcm: Add driver for BCM53573 ILP clock
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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This clock is present on BCM53573 devices (including BCM47189) that use
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Cortex-A7. ILP is a part of PMU (Power Management Unit) and so it should
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be defined as one of its subnodes (subdevices). For more details see
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Documentation entry.
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Unfortunately there isn't a set of registers related to ILP clock only.
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We use registers 0x66c, 0x674 and 0x6dc and between them there are e.g.
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"retention*" and "control_ext" regs. This is why this driver maps all
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0x1000 B of space.
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Cortex-A7. ILP is a part of PMU (Power Management Unit) multi-function
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device so we use syscon (and regmap) for it.
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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---
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@ -38,17 +32,19 @@ V6: Drop #include <linux/clk.h>
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Use _hw_ functions for registering struct clk_hw (new API)
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Thanks a lot Stephen!
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V7: Use syscon and regmap (thanks Rob!)
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V8: Update Documentation (drop unused "reg", unit address)
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---
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.../bindings/clock/brcm,bcm53573-ilp.txt | 40 ++++++
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.../bindings/clock/brcm,bcm53573-ilp.txt | 36 +++++
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drivers/clk/bcm/Makefile | 1 +
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drivers/clk/bcm/clk-bcm53573-ilp.c | 157 +++++++++++++++++++++
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3 files changed, 198 insertions(+)
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drivers/clk/bcm/clk-bcm53573-ilp.c | 148 +++++++++++++++++++++
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3 files changed, 185 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
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create mode 100644 drivers/clk/bcm/clk-bcm53573-ilp.c
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
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@@ -0,0 +1,40 @@
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@@ -0,0 +1,36 @@
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+Broadcom BCM53573 ILP clock
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+===========================
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+
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@ -58,32 +54,28 @@ V6: Drop #include <linux/clk.h>
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+This binding is used for ILP clock (sometimes referred as "slow clock")
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+on Broadcom BCM53573 devices using Cortex-A7 CPU.
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+
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+This clock is part of PMU (Power Management Unit), a Broadcom's device
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+handing power-related aspects. Please note PMU contains more subdevices,
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+ILP is only one of them.
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+
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+ILP's rate has to be calculated on runtime and it depends on ALP clock
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+which has to be referenced.
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+
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+This clock is part of PMU (Power Management Unit), a Broadcom's device
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+handing power-related aspects. Its node must be sub-node of the PMU
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+device.
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+
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+Required properties:
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+- compatible: "brcm,bcm53573-ilp"
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+- reg: iomem address range of PMU (Power Management Unit)
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+- reg-names: "pmu", the only needed & supported reg right now
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+- clocks: has to reference an ALP clock
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+- #clock-cells: should be <0>
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+- clock-output-names: from common clock bindings, should contain clock
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+ name
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+
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+Example:
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+
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+pmu@18012000 {
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+ compatible = "simple-bus";
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+ ranges = <0x00000000 0x18012000 0x00001000>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "simple-mfd", "syscon";
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+ reg = <0x18012000 0x00001000>;
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+
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+ ilp: ilp@0 {
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+ ilp {
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+ compatible = "brcm,bcm53573-ilp";
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+ reg = <0 0x1000>;
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+ reg-names = "pmu";
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+ clocks = <&alp>;
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+ #clock-cells = <0>;
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+ clock-output-names = "ilp";
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@ -98,7 +90,7 @@ V6: Drop #include <linux/clk.h>
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+obj-$(CONFIG_ARCH_BCM_53573) += clk-bcm53573-ilp.o
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--- /dev/null
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+++ b/drivers/clk/bcm/clk-bcm53573-ilp.c
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@@ -0,0 +1,157 @@
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@@ -0,0 +1,148 @@
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+/*
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+ * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
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+ *
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@ -110,8 +102,10 @@ V6: Drop #include <linux/clk.h>
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+#include <linux/clk-provider.h>
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+#include <linux/err.h>
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+#include <linux/io.h>
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+#include <linux/mfd/syscon.h>
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+#include <linux/of.h>
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+#include <linux/of_address.h>
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+#include <linux/regmap.h>
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+#include <linux/slab.h>
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+
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+#define PMU_XTAL_FREQ_RATIO 0x66c
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@ -121,15 +115,15 @@ V6: Drop #include <linux/clk.h>
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+
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+struct bcm53573_ilp {
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+ struct clk_hw hw;
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+ void __iomem *pmu;
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+ struct regmap *regmap;
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+};
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+
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+static int bcm53573_ilp_enable(struct clk_hw *hw)
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+{
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+ struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
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+
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+ writel(0x10199, ilp->pmu + PMU_SLOW_CLK_PERIOD);
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+ writel(0x10000, ilp->pmu + 0x674);
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+ regmap_write(ilp->regmap, PMU_SLOW_CLK_PERIOD, 0x10199);
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+ regmap_write(ilp->regmap, 0x674, 0x10000);
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+
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+ return 0;
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+}
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@ -138,24 +132,25 @@ V6: Drop #include <linux/clk.h>
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+{
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+ struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
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+
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+ writel(0, ilp->pmu + PMU_SLOW_CLK_PERIOD);
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+ writel(0, ilp->pmu + 0x674);
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+ regmap_write(ilp->regmap, PMU_SLOW_CLK_PERIOD, 0);
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+ regmap_write(ilp->regmap, 0x674, 0);
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+}
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+
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+static unsigned long bcm53573_ilp_recalc_rate(struct clk_hw *hw,
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+ unsigned long parent_rate)
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+{
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+ struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
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+ void __iomem *pmu = ilp->pmu;
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+ struct regmap *regmap = ilp->regmap;
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+ u32 last_val, cur_val;
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+ int sum = 0, num = 0, loop_num = 0;
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+ int avg;
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+
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+ /* Enable measurement */
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+ writel(XTAL_CTL_EN, pmu + PMU_XTAL_FREQ_RATIO);
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+ regmap_write(regmap, PMU_XTAL_FREQ_RATIO, XTAL_CTL_EN);
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+
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+ /* Read initial value */
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+ last_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP;
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+ regmap_read(regmap, PMU_XTAL_FREQ_RATIO, &last_val);
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+ last_val &= XTAL_ALP_PER_4ILP;
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+
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+ /*
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+ * At minimum we should loop for a bit to let hardware do the
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+ * precision lets try getting 20 different values for and use average.
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+ */
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+ while (num < 20) {
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+ cur_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP;
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+ regmap_read(regmap, PMU_XTAL_FREQ_RATIO, &cur_val);
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+ cur_val &= XTAL_ALP_PER_4ILP;
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+
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+ if (cur_val != last_val) {
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+ /* Got different value, use it */
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+ }
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+
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+ /* Disable measurement to save power */
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+ writel(0x0, pmu + PMU_XTAL_FREQ_RATIO);
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+ regmap_write(regmap, PMU_XTAL_FREQ_RATIO, 0x0);
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+
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+ avg = sum / num;
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+
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@ -198,10 +194,8 @@ V6: Drop #include <linux/clk.h>
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+static void bcm53573_ilp_init(struct device_node *np)
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+{
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+ struct bcm53573_ilp *ilp;
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+ struct resource res;
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+ struct clk_init_data init = { 0 };
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+ const char *parent_name;
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+ int index;
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+ int err;
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+
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+ ilp = kzalloc(sizeof(*ilp), GFP_KERNEL);
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+ goto err_free_ilp;
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+ }
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+
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+ /* TODO: This looks generic, try making it OF helper. */
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+ index = of_property_match_string(np, "reg-names", "pmu");
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+ if (index < 0) {
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+ err = index;
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+ goto err_free_ilp;
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+ }
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+ err = of_address_to_resource(np, index, &res);
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+ if (err)
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+ goto err_free_ilp;
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+ ilp->pmu = ioremap(res.start, resource_size(&res));
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+ if (IS_ERR(ilp->pmu)) {
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+ err = PTR_ERR(ilp->pmu);
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+ ilp->regmap = syscon_node_to_regmap(of_get_parent(np));
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+ if (IS_ERR(ilp->regmap)) {
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+ err = PTR_ERR(ilp->regmap);
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+ goto err_free_ilp;
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+ }
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+
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+ ilp->hw.init = &init;
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+ err = clk_hw_register(NULL, &ilp->hw);
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+ if (err)
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+ goto err_unmap_pmu;
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+ goto err_free_ilp;
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+
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+ err = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &ilp->hw);
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+ if (err)
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+
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+err_clk_hw_unregister:
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+ clk_hw_unregister(&ilp->hw);
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+err_unmap_pmu:
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+ iounmap(ilp->pmu);
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+err_free_ilp:
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+ kfree(ilp);
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+ pr_err("Failed to init ILP clock: %d\n", err);
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@ -11,17 +11,20 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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--- a/arch/arm/boot/dts/bcm53573.dtsi
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+++ b/arch/arm/boot/dts/bcm53573.dtsi
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@@ -44,6 +44,24 @@
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@@ -44,6 +44,27 @@
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};
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};
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+ ilp: ilp@0 {
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+ compatible = "brcm,bcm53573-ilp";
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+ reg = <0x18012000 0x1000>;
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+ reg-names = "pmu";
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+ clocks = <&alp>;
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+ #clock-cells = <0>;
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+ clock-output-names = "ilp";
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+ pmu@18012000 {
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+ compatible = "simple-mfd", "syscon";
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+ reg = <0x18012000 0x00001000>;
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+
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+ ilp: ilp {
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+ compatible = "brcm,bcm53573-ilp";
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+ clocks = <&alp>;
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+ #clock-cells = <0>;
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+ clock-output-names = "ilp";
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+ };
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+ };
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+
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+ timer {
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