add definitions for AR91xx specific DDR registers

SVN-Revision: 13364
This commit is contained in:
Gabor Juhos 2008-11-26 17:34:08 +00:00
parent 9f93bd51cf
commit b571504967

View file

@ -207,19 +207,24 @@ extern void ar71xx_gpio_function_disable(u32 mask);
/*
* DDR_CTRL block
*/
#define AR71XX_DDR_REG_PCI_WIN0 0x7c
#define AR71XX_DDR_REG_PCI_WIN1 0x80
#define AR71XX_DDR_REG_PCI_WIN2 0x84
#define AR71XX_DDR_REG_PCI_WIN3 0x88
#define AR71XX_DDR_REG_PCI_WIN4 0x8c
#define AR71XX_DDR_REG_PCI_WIN5 0x90
#define AR71XX_DDR_REG_PCI_WIN6 0x94
#define AR71XX_DDR_REG_PCI_WIN7 0x98
#define AR71XX_DDR_REG_PCI_WIN0 0x7c
#define AR71XX_DDR_REG_PCI_WIN1 0x80
#define AR71XX_DDR_REG_PCI_WIN2 0x84
#define AR71XX_DDR_REG_PCI_WIN3 0x88
#define AR71XX_DDR_REG_PCI_WIN4 0x8c
#define AR71XX_DDR_REG_PCI_WIN5 0x90
#define AR71XX_DDR_REG_PCI_WIN6 0x94
#define AR71XX_DDR_REG_PCI_WIN7 0x98
#define AR71XX_DDR_REG_FLUSH_GE0 0x9c
#define AR71XX_DDR_REG_FLUSH_GE1 0xa0
#define AR71XX_DDR_REG_FLUSH_USB 0xa4
#define AR71XX_DDR_REG_FLUSH_PCI 0xa8
#define AR91XX_DDR_REG_FLUSH_GE0 0x7c
#define AR91XX_DDR_REG_FLUSH_GE1 0x80
#define AR91XX_DDR_REG_FLUSH_USB 0x84
#define AR91XX_DDR_REG_FLUSH_WMAC 0x88
#define PCI_WIN0_OFFS 0x10000000
#define PCI_WIN1_OFFS 0x11000000
#define PCI_WIN2_OFFS 0x12000000