ipq806x: switch AP148 to using SMEM based MTD parser
*Enable SMEM MTD parser and its dependencies (SMEM & HW spinlocks) in the kernel config *Replaces the MTD layout in DT by the dynamic layout provided by the SMEM parser for AP148 Using the OF based parser is still possible on platforms which have a fixed MTD partition layout. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 46658
This commit is contained in:
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commit
b0b59a8e75
13 changed files with 35 additions and 63 deletions
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@ -206,6 +206,8 @@ CONFIG_HIGHMEM=y
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CONFIG_HIGHPTE=y
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CONFIG_HIGHPTE=y
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CONFIG_HOTPLUG_CPU=y
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CONFIG_HOTPLUG_CPU=y
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CONFIG_HWMON=y
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CONFIG_HWMON=y
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CONFIG_HWSPINLOCK=y
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CONFIG_HWSPINLOCK_QCOM=y
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CONFIG_HW_RANDOM=y
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CONFIG_HW_RANDOM=y
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CONFIG_HW_RANDOM_MSM=y
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CONFIG_HW_RANDOM_MSM=y
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CONFIG_HZ_FIXED=0
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CONFIG_HZ_FIXED=0
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@ -259,6 +261,7 @@ CONFIG_MTD_M25P80=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_ECC=y
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CONFIG_MTD_NAND_ECC=y
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CONFIG_MTD_NAND_QCOM=y
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CONFIG_MTD_NAND_QCOM=y
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CONFIG_MTD_QCOM_SMEM_PARTS=y
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CONFIG_MTD_SPI_NOR=y
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CONFIG_MTD_SPI_NOR=y
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CONFIG_MTD_SPLIT_FIRMWARE=y
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CONFIG_MTD_SPLIT_FIRMWARE=y
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CONFIG_MTD_SPLIT_FIT_FW=y
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CONFIG_MTD_SPLIT_FIT_FW=y
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@ -345,6 +348,7 @@ CONFIG_QCOM_BAM_DMA=y
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CONFIG_QCOM_GSBI=y
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CONFIG_QCOM_GSBI=y
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CONFIG_QCOM_HFPLL=y
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CONFIG_QCOM_HFPLL=y
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CONFIG_QCOM_SCM=y
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CONFIG_QCOM_SCM=y
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CONFIG_QCOM_SMEM=y
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CONFIG_QCOM_WDT=y
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CONFIG_QCOM_WDT=y
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CONFIG_RAS=y
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CONFIG_RAS=y
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# CONFIG_RCU_BOOST is not set
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# CONFIG_RCU_BOOST is not set
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@ -45,7 +45,6 @@ CONFIG_ARM_CCI400_PMU=y
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CONFIG_ARM_CPU_SUSPEND=y
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CONFIG_ARM_CPU_SUSPEND=y
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CONFIG_ARM_GIC=y
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CONFIG_ARM_GIC=y
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CONFIG_ARM_HAS_SG_CHAIN=y
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CONFIG_ARM_HAS_SG_CHAIN=y
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# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set
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CONFIG_ARM_L1_CACHE_SHIFT=6
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CONFIG_ARM_L1_CACHE_SHIFT=6
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CONFIG_ARM_L1_CACHE_SHIFT_6=y
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CONFIG_ARM_L1_CACHE_SHIFT_6=y
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# CONFIG_ARM_LPAE is not set
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# CONFIG_ARM_LPAE is not set
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@ -214,6 +213,8 @@ CONFIG_HIGHPTE=y
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CONFIG_HOTPLUG_CPU=y
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CONFIG_HOTPLUG_CPU=y
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# CONFIG_HSU_DMA_PCI is not set
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# CONFIG_HSU_DMA_PCI is not set
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CONFIG_HWMON=y
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CONFIG_HWMON=y
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CONFIG_HWSPINLOCK=y
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CONFIG_HWSPINLOCK_QCOM=y
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CONFIG_HW_RANDOM=y
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CONFIG_HW_RANDOM=y
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CONFIG_HW_RANDOM_MSM=y
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CONFIG_HW_RANDOM_MSM=y
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CONFIG_HZ_FIXED=0
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CONFIG_HZ_FIXED=0
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@ -240,7 +241,6 @@ CONFIG_KPSS_XCC=y
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CONFIG_KRAITCC=y
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CONFIG_KRAITCC=y
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CONFIG_KRAIT_CLOCKS=y
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CONFIG_KRAIT_CLOCKS=y
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CONFIG_KRAIT_L2_ACCESSORS=y
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CONFIG_KRAIT_L2_ACCESSORS=y
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# CONFIG_LEDS_REGULATOR is not set
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CONFIG_LIBFDT=y
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CONFIG_LIBFDT=y
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CONFIG_LOCKUP_DETECTOR=y
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CONFIG_LOCKUP_DETECTOR=y
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CONFIG_LOCK_SPIN_ON_OWNER=y
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CONFIG_LOCK_SPIN_ON_OWNER=y
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@ -268,6 +268,7 @@ CONFIG_MTD_M25P80=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_ECC=y
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CONFIG_MTD_NAND_ECC=y
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CONFIG_MTD_NAND_QCOM=y
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CONFIG_MTD_NAND_QCOM=y
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CONFIG_MTD_QCOM_SMEM_PARTS=y
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CONFIG_MTD_SPI_NOR=y
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CONFIG_MTD_SPI_NOR=y
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CONFIG_MTD_SPLIT_FIRMWARE=y
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CONFIG_MTD_SPLIT_FIRMWARE=y
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CONFIG_MTD_SPLIT_FIT_FW=y
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CONFIG_MTD_SPLIT_FIT_FW=y
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@ -357,6 +358,7 @@ CONFIG_QCOM_BAM_DMA=y
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CONFIG_QCOM_GSBI=y
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CONFIG_QCOM_GSBI=y
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CONFIG_QCOM_HFPLL=y
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CONFIG_QCOM_HFPLL=y
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CONFIG_QCOM_SCM=y
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CONFIG_QCOM_SCM=y
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CONFIG_QCOM_SMEM=y
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CONFIG_QCOM_WDT=y
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CONFIG_QCOM_WDT=y
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CONFIG_RAS=y
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CONFIG_RAS=y
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# CONFIG_RCU_BOOST is not set
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# CONFIG_RCU_BOOST is not set
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@ -366,9 +368,7 @@ CONFIG_RD_GZIP=y
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CONFIG_REGMAP=y
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CONFIG_REGMAP=y
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CONFIG_REGMAP_MMIO=y
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CONFIG_REGMAP_MMIO=y
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CONFIG_REGULATOR=y
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CONFIG_REGULATOR=y
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# CONFIG_REGULATOR_DEBUG is not set
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CONFIG_REGULATOR_QCOM_RPM=y
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CONFIG_REGULATOR_QCOM_RPM=y
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# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
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CONFIG_RESET_CONTROLLER=y
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CONFIG_RESET_CONTROLLER=y
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CONFIG_RFS_ACCEL=y
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CONFIG_RFS_ACCEL=y
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CONFIG_RPS=y
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CONFIG_RPS=y
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@ -1,35 +1,19 @@
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--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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@@ -78,13 +78,28 @@
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@@ -77,15 +77,7 @@
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spi-max-frequency = <50000000>;
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reg = <0>;
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reg = <0>;
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partition@0 {
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- partition@0 {
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- label = "rootfs";
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- label = "rootfs";
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- reg = <0x0 0x1000000>;
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- reg = <0x0 0x1000000>;
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+ label = "lowlevel_init";
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- };
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+ reg = <0x0 0x1b0000>;
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-
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};
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- partition@1 {
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partition@1 {
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- label = "scratch";
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- label = "scratch";
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- reg = <0x1000000 0x1000000>;
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- reg = <0x1000000 0x1000000>;
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+ label = "u-boot";
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- };
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+ reg = <0x1b0000 0x80000>;
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+ linux,part-probe = "qcom-smem";
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+ };
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+
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+ partition@2 {
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+ label = "u-boot-env";
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+ reg = <0x230000 0x40000>;
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+ };
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+
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+ partition@3 {
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+ label = "caldata";
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+ reg = <0x270000 0x40000>;
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+ };
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+
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+ partition@4 {
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+ label = "firmware";
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+ reg = <0x2b0000 0x1d50000>;
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};
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};
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};
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};
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};
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};
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@ -1,6 +1,6 @@
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--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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@@ -114,5 +114,29 @@
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@@ -91,5 +91,29 @@
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sata@29000000 {
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sata@29000000 {
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status = "ok";
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status = "ok";
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};
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};
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@ -40,7 +40,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
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spi_pins: spi_pins {
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spi_pins: spi_pins {
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mux {
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mux {
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pins = "gpio18", "gpio19", "gpio21";
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pins = "gpio18", "gpio19", "gpio21";
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@@ -138,5 +156,19 @@
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@@ -115,5 +133,19 @@
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usb30@1 {
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usb30@1 {
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status = "ok";
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status = "ok";
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};
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};
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@ -57,7 +57,7 @@ arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 36 ++++++++++++++++++++++++++++++++
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};
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};
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gsbi@16300000 {
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gsbi@16300000 {
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@@ -170,5 +195,19 @@
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@@ -147,5 +172,19 @@
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pinctrl-0 = <&pcie1_pins>;
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pinctrl-0 = <&pcie1_pins>;
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pinctrl-names = "default";
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pinctrl-names = "default";
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};
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};
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@ -38,7 +38,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
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};
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};
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gsbi@16300000 {
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gsbi@16300000 {
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@@ -205,6 +215,34 @@
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@@ -182,6 +192,34 @@
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nand-ecc-strength = <4>;
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nand-ecc-strength = <4>;
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nand-bus-width = <8>;
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nand-bus-width = <8>;
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};
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};
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@ -29,7 +29,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
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};
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};
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gsbi@16300000 {
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gsbi@16300000 {
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@@ -243,6 +253,27 @@
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@@ -220,6 +230,27 @@
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reg = <4>;
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reg = <4>;
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};
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};
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};
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};
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@ -1,35 +1,19 @@
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--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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@@ -78,13 +78,28 @@
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@@ -77,15 +77,7 @@
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spi-max-frequency = <50000000>;
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reg = <0>;
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reg = <0>;
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partition@0 {
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- partition@0 {
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- label = "rootfs";
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- label = "rootfs";
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- reg = <0x0 0x1000000>;
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- reg = <0x0 0x1000000>;
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+ label = "lowlevel_init";
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- };
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+ reg = <0x0 0x1b0000>;
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-
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};
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- partition@1 {
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partition@1 {
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- label = "scratch";
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- label = "scratch";
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- reg = <0x1000000 0x1000000>;
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- reg = <0x1000000 0x1000000>;
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+ label = "u-boot";
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- };
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+ reg = <0x1b0000 0x80000>;
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+ linux,part-probe = "qcom-smem";
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+ };
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+
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+ partition@2 {
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+ label = "u-boot-env";
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+ reg = <0x230000 0x40000>;
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+ };
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+
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+ partition@3 {
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+ label = "caldata";
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+ reg = <0x270000 0x40000>;
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+ };
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+
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+ partition@4 {
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+ label = "firmware";
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+ reg = <0x2b0000 0x1d50000>;
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};
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};
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};
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};
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};
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};
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@ -40,7 +40,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
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spi_pins: spi_pins {
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spi_pins: spi_pins {
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mux {
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mux {
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pins = "gpio18", "gpio19", "gpio21";
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pins = "gpio18", "gpio19", "gpio21";
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@@ -114,5 +132,19 @@
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@@ -91,5 +109,19 @@
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sata@29000000 {
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sata@29000000 {
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status = "ok";
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status = "ok";
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};
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};
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};
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};
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gsbi@16300000 {
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gsbi@16300000 {
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@@ -146,5 +168,19 @@
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@@ -123,5 +145,19 @@
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pinctrl-0 = <&pcie1_pins>;
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pinctrl-0 = <&pcie1_pins>;
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pinctrl-names = "default";
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pinctrl-names = "default";
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};
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};
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};
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};
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gsbi@16300000 {
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gsbi@16300000 {
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@@ -178,6 +188,34 @@
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@@ -155,6 +165,34 @@
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nand-ecc-strength = <4>;
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nand-ecc-strength = <4>;
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nand-bus-width = <8>;
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nand-bus-width = <8>;
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};
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};
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@ -29,7 +29,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
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};
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};
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gsbi@16300000 {
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gsbi@16300000 {
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@@ -216,6 +226,27 @@
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@@ -193,6 +203,27 @@
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reg = <4>;
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reg = <4>;
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};
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};
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};
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};
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