ar71xx: fix incorrect speed setting on QCA9556

The QCA9556 only has a SGMII interface. However the speed on the
ethernet link is set for the non-existant xMII interface.

This commit fixes this behavior.

Signed-off-by: David Bauer <mail@david-bauer.net>
This commit is contained in:
David Bauer 2018-05-08 20:59:05 +02:00 committed by John Crispin
parent d661a5d754
commit abb4ab076f

View file

@ -383,16 +383,26 @@ static void qca955x_set_speed_xmii(int speed)
iounmap(base); iounmap(base);
} }
static void qca955x_set_speed_sgmii(int speed) static void qca955x_set_speed_sgmii(int id, int speed)
{ {
void __iomem *base; void __iomem *base;
u32 val = ath79_get_eth_pll(1, speed); u32 val = ath79_get_eth_pll(id, speed);
base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE);
__raw_writel(val, base + QCA955X_PLL_ETH_SGMII_CONTROL_REG); __raw_writel(val, base + QCA955X_PLL_ETH_SGMII_CONTROL_REG);
iounmap(base); iounmap(base);
} }
static void qca9556_set_speed_sgmii(int speed)
{
qca955x_set_speed_sgmii(0, speed);
}
static void qca9558_set_speed_sgmii(int speed)
{
qca955x_set_speed_sgmii(1, speed);
}
static void qca956x_set_speed_sgmii(int speed) static void qca956x_set_speed_sgmii(int speed)
{ {
void __iomem *base; void __iomem *base;
@ -1028,10 +1038,14 @@ void __init ath79_register_eth(unsigned int id)
pdata->reset_bit = QCA955X_RESET_GE0_MAC | pdata->reset_bit = QCA955X_RESET_GE0_MAC |
QCA955X_RESET_GE0_MDIO; QCA955X_RESET_GE0_MDIO;
pdata->set_speed = qca955x_set_speed_xmii; pdata->set_speed = qca955x_set_speed_xmii;
/* QCA9556 only has SGMII interface */
if (ath79_soc == ATH79_SOC_QCA9556)
pdata->set_speed = qca9556_set_speed_sgmii;
} else { } else {
pdata->reset_bit = QCA955X_RESET_GE1_MAC | pdata->reset_bit = QCA955X_RESET_GE1_MAC |
QCA955X_RESET_GE1_MDIO; QCA955X_RESET_GE1_MDIO;
pdata->set_speed = qca955x_set_speed_sgmii; pdata->set_speed = qca9558_set_speed_sgmii;
} }
pdata->has_gbit = 1; pdata->has_gbit = 1;