ar71xx: remove PB92 reference design board support
Due to flash size limitations, support for this board has not been functional for years Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
parent
30285facbe
commit
a5923cd549
10 changed files with 0 additions and 89 deletions
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@ -146,7 +146,6 @@ ar71xx_setup_interfaces()
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ubnt-unifi-outdoor)
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ubnt-unifi-outdoor)
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ucidef_set_interface_lan "eth0 eth1"
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ucidef_set_interface_lan "eth0 eth1"
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;;
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;;
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pb92|\
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wzr-hp-g300nh2)
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wzr-hp-g300nh2)
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ucidef_add_switch "switch0" \
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ucidef_add_switch "switch0" \
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"0@eth0" "1:lan:1" "3:lan:2" "4:lan:3" "5:lan:4" "2:wan"
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"0@eth0" "1:lan:1" "3:lan:2" "4:lan:3" "5:lan:4" "2:wan"
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@ -47,7 +47,6 @@ board=$(ar71xx_board_name)
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case "$board" in
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case "$board" in
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dir-825-c1|\
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dir-825-c1|\
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wzr-hp-g300nh2|\
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wzr-hp-g300nh2|\
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pb92|\
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tl-wdr4300|\
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tl-wdr4300|\
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tl-wr1041n-v2|\
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tl-wr1041n-v2|\
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wrt160nl|\
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wrt160nl|\
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@ -778,9 +778,6 @@ ar71xx_board_detect() {
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*"PB44 reference board")
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*"PB44 reference board")
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name="pb44"
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name="pb44"
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;;
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;;
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*PB92)
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name="pb92"
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;;
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*"Qihoo 360 C301")
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*"Qihoo 360 C301")
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name="qihoo-c301"
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name="qihoo-c301"
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;;
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;;
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@ -135,7 +135,6 @@ CONFIG_ATH79_MACH_OMY_X1=y
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CONFIG_ATH79_MACH_ONION_OMEGA=y
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CONFIG_ATH79_MACH_ONION_OMEGA=y
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CONFIG_ATH79_MACH_PB42=y
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CONFIG_ATH79_MACH_PB42=y
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CONFIG_ATH79_MACH_PB44=y
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CONFIG_ATH79_MACH_PB44=y
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CONFIG_ATH79_MACH_PB92=y
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CONFIG_ATH79_MACH_QIHOO_C301=y
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CONFIG_ATH79_MACH_QIHOO_C301=y
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CONFIG_ATH79_MACH_R6100=y
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CONFIG_ATH79_MACH_R6100=y
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# CONFIG_ATH79_MACH_RB2011 is not set
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# CONFIG_ATH79_MACH_RB2011 is not set
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@ -182,15 +182,6 @@ config ATH79_MACH_PB42
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select ATH79_DEV_GPIO_BUTTONS
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select ATH79_DEV_GPIO_BUTTONS
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select ATH79_DEV_M25P80
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select ATH79_DEV_M25P80
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config ATH79_MACH_PB92
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bool "Atheros PB92 board support"
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select SOC_AR724X
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select ATH79_DEV_ETH
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select ATH79_DEV_GPIO_BUTTONS
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select ATH79_DEV_LEDS_GPIO
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select ATH79_DEV_PB9X_PCI if PCI
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select ATH79_DEV_USB
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config ATH79_MACH_C55
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config ATH79_MACH_C55
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bool "AirTight Networks C-55 support"
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bool "AirTight Networks C-55 support"
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select SOC_AR934X
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select SOC_AR934X
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@ -140,7 +140,6 @@ obj-$(CONFIG_ATH79_MACH_OMY_X1) += mach-omy-x1.o
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obj-$(CONFIG_ATH79_MACH_ONION_OMEGA) += mach-onion-omega.o
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obj-$(CONFIG_ATH79_MACH_ONION_OMEGA) += mach-onion-omega.o
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obj-$(CONFIG_ATH79_MACH_PB42) += mach-pb42.o
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obj-$(CONFIG_ATH79_MACH_PB42) += mach-pb42.o
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obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o
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obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o
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obj-$(CONFIG_ATH79_MACH_PB92) += mach-pb92.o
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obj-$(CONFIG_ATH79_MACH_QIHOO_C301) += mach-qihoo-c301.o
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obj-$(CONFIG_ATH79_MACH_QIHOO_C301) += mach-qihoo-c301.o
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obj-$(CONFIG_ATH79_MACH_R6100) += mach-r6100.o
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obj-$(CONFIG_ATH79_MACH_R6100) += mach-r6100.o
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obj-$(CONFIG_ATH79_MACH_RB2011) += mach-rb2011.o
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obj-$(CONFIG_ATH79_MACH_RB2011) += mach-rb2011.o
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@ -1,70 +0,0 @@
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/*
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* Atheros PB92 board support
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*
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* Copyright (C) 2010 Felix Fietkau <nbd@nbd.name>
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* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <asm/mach-ath79/ath79.h>
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-m25p80.h"
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#include "dev-usb.h"
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#include "machtypes.h"
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#include "pci.h"
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#define PB92_KEYS_POLL_INTERVAL 20 /* msecs */
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#define PB92_KEYS_DEBOUNCE_INTERVAL (3 * PB92_KEYS_POLL_INTERVAL)
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#define PB92_GPIO_BTN_SW4 8
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#define PB92_GPIO_BTN_SW5 3
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static struct gpio_keys_button pb92_gpio_keys[] __initdata = {
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{
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.desc = "sw4",
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.type = EV_KEY,
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.code = BTN_0,
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.debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL,
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.gpio = PB92_GPIO_BTN_SW4,
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.active_low = 1,
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}, {
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.desc = "sw5",
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.type = EV_KEY,
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.code = BTN_1,
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.debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL,
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.gpio = PB92_GPIO_BTN_SW5,
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.active_low = 1,
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}
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};
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static void __init pb92_init(void)
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{
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u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
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ath79_register_m25p80(NULL);
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ath79_register_mdio(0, ~BIT(0));
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ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.speed = SPEED_1000;
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ath79_eth0_data.duplex = DUPLEX_FULL;
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ath79_eth0_data.phy_mask = BIT(0);
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ath79_register_eth(0);
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ath79_register_gpio_keys_polled(-1, PB92_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(pb92_gpio_keys),
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pb92_gpio_keys);
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ath79_register_usb();
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ath79_register_pci();
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}
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MIPS_MACHINE(ATH79_MACH_PB92, "PB92", "Atheros PB92", pb92_init);
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@ -141,7 +141,6 @@ enum ath79_mach_type {
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ATH79_MACH_ONION_OMEGA, /* ONION OMEGA */
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ATH79_MACH_ONION_OMEGA, /* ONION OMEGA */
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ATH79_MACH_PB42, /* Atheros PB42 */
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ATH79_MACH_PB42, /* Atheros PB42 */
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ATH79_MACH_PB44, /* Atheros PB44 reference board */
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ATH79_MACH_PB44, /* Atheros PB44 reference board */
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ATH79_MACH_PB92, /* Atheros PB92 */
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ATH79_MACH_QIHOO_C301, /* Qihoo 360 C301 */
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ATH79_MACH_QIHOO_C301, /* Qihoo 360 C301 */
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ATH79_MACH_R6100, /* NETGEAR R6100 */
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ATH79_MACH_R6100, /* NETGEAR R6100 */
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ATH79_MACH_RB_2011G, /* Mikrotik RouterBOARD 2011UAS-2HnD */
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ATH79_MACH_RB_2011G, /* Mikrotik RouterBOARD 2011UAS-2HnD */
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@ -59,7 +59,6 @@
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# CONFIG_ATH79_MACH_OM5P is not set
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# CONFIG_ATH79_MACH_OM5P is not set
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# CONFIG_ATH79_MACH_PB42 is not set
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# CONFIG_ATH79_MACH_PB42 is not set
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# CONFIG_ATH79_MACH_PB44 is not set
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# CONFIG_ATH79_MACH_PB44 is not set
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# CONFIG_ATH79_MACH_PB92 is not set
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# CONFIG_ATH79_MACH_QIHOO_C301 is not set
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# CONFIG_ATH79_MACH_QIHOO_C301 is not set
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# CONFIG_ATH79_MACH_R6100 is not set
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# CONFIG_ATH79_MACH_R6100 is not set
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CONFIG_ATH79_MACH_RB2011=y
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CONFIG_ATH79_MACH_RB2011=y
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@ -35,7 +35,6 @@
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# CONFIG_ATH79_MACH_OM2P is not set
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# CONFIG_ATH79_MACH_OM2P is not set
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# CONFIG_ATH79_MACH_PB42 is not set
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# CONFIG_ATH79_MACH_PB42 is not set
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# CONFIG_ATH79_MACH_PB44 is not set
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# CONFIG_ATH79_MACH_PB44 is not set
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# CONFIG_ATH79_MACH_PB92 is not set
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# CONFIG_ATH79_MACH_RW2458N is not set
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# CONFIG_ATH79_MACH_RW2458N is not set
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# CONFIG_ATH79_MACH_TEW_632BRP is not set
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# CONFIG_ATH79_MACH_TEW_632BRP is not set
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# CONFIG_ATH79_MACH_TEW_673GRU is not set
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# CONFIG_ATH79_MACH_TEW_673GRU is not set
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