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upgrade ppc44x to 2.6.30.3, enable MSI and USB support, move some patches around

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SVN-Revision: 17034
This commit is contained in:
Imre Kaloz 2009-07-28 06:57:50 +00:00
parent 3c806e767e
commit a215fb64a8
7 changed files with 30 additions and 137 deletions
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2
target/linux/ppc44x/Makefile
View file

@ -11,7 +11,7 @@ BOARD:=ppc44x
BOARDNAME:=AMCC/IBM PPC44x
FEATURES:=squashfs
LINUX_VERSION:=2.6.28.10
LINUX_VERSION:=2.6.30.3
LINUX_KARCH:=powerpc
include $(INCLUDE_DIR)/target.mk

3
target/linux/ppc44x/config-default
View file

@ -110,7 +110,6 @@ CONFIG_LOWMEM_SIZE=0x30000000
# CONFIG_MPIC_WEIRD is not set
CONFIG_MTD_CFI_ADV_OPTIONS=y
# CONFIG_MTD_CFI_GEOMETRY is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_OF_PARTS=y
CONFIG_MTD_PHYSMAP_OF=y
# CONFIG_NATSEMI is not set
@ -127,6 +126,7 @@ CONFIG_PCIEAER=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_MSI=y
CONFIG_PCI_SYSCALL=y
CONFIG_PHYSICAL_START=0x00000000
CONFIG_PHYS_64BIT=y
@ -177,6 +177,7 @@ CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_TAISHAN=y
CONFIG_TASK_SIZE=0xc0000000
CONFIG_TICK_ONESHOT=y
CONFIG_USB_SUPPORT=y
# CONFIG_VGASTATE is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_WARP is not set

25
target/linux/ppc44x/patches/001-taishan_openwrt_flashmap.patch
View file

@ -1,25 +0,0 @@
--- a/arch/powerpc/boot/dts/taishan.dts
+++ b/arch/powerpc/boot/dts/taishan.dts
@@ -195,15 +195,15 @@
#size-cells = <1>;
partition@0 {
label = "kernel";
- reg = <0x0 0x180000>;
+ reg = <0x0 0x200000>;
};
- partition@180000 {
- label = "root";
- reg = <0x180000 0x200000>;
+ partition@200000 {
+ label = "rootfs";
+ reg = <0x200000 0x3c00000>;
};
- partition@380000 {
- label = "user";
- reg = <0x380000 0x3bc0000>;
+ partition@3e00000 {
+ label = "diagnostics";
+ reg = <0x3e00000 0x140000>;
};
partition@3f40000 {
label = "env";

108
target/linux/ppc44x/patches/004-canyonlands_dts_sync.patch
View file

@ -1,108 +0,0 @@
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -40,6 +40,7 @@
d-cache-size = <32768>;
dcr-controller;
dcr-access-method = "native";
+ next-level-cache = <&L2C0>;
};
};
@@ -104,6 +105,16 @@
dcr-reg = <0x00c 0x002>;
};
+ L2C0: l2c {
+ compatible = "ibm,l2-cache-460ex", "ibm,l2-cache";
+ dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
+ 0x030 0x008>; /* L2 cache DCR's */
+ cache-line-size = <32>; /* 32 bytes */
+ cache-size = <262144>; /* L2, 256K */
+ interrupt-parent = <&UIC1>;
+ interrupts = <11 1>;
+ };
+
plb {
compatible = "ibm,plb-460ex", "ibm,plb4";
#address-cells = <2>;
@@ -131,6 +142,43 @@
/*RXDE*/ 0x5 0x4>;
};
+ USB0: ehci@bffd0400 {
+ compatible = "ibm,usb-ehci-460ex", "usb-ehci";
+ interrupt-parent = <&UIC2>;
+ interrupts = <0x1d 4>;
+ reg = <4 0xbffd0400 0x90 4 0xbffd0490 0x70>;
+ };
+
+ USB1: usb@bffd0000 {
+ compatible = "ohci-le";
+ reg = <4 0xbffd0000 0x60>;
+ interrupt-parent = <&UIC2>;
+ interrupts = <0x1e 4>;
+ };
+
+ USBOTG0: usbotg@bff80000 {
+ compatible = "amcc,usb-otg-460ex";
+ reg = <4 0xbff80000 0x10000>;
+ interrupt-parent = <&USBOTG0>;
+ interrupts = <0 1 2>;
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ interrupt-map = </* USB-OTG */ 0 &UIC2 0x1c 4
+ /* HIGH-POWER */ 1 &UIC1 0x1a 8
+ /* DMA */ 2 &UIC0 0xc 4>;
+ interrupt-map-mask = <0xffffffff>;
+ };
+
+ SATA0: sata@bffd1000 {
+ compatible = "amcc,sata-460ex";
+ reg = <4 0xbffd1000 0x800 /* SATA */
+ 4 0xbffd0800 0x400>; /* AHBDMA */
+ interrupt-parent = <&UIC3>;
+ interrupts = <0 4 /* SATA */
+ 5 4>; /* AHBDMA */
+ };
+
POB0: opb {
compatible = "ibm,opb-460ex", "ibm,opb";
#address-cells = <1>;
@@ -222,6 +270,12 @@
reg = <0xef600700 0x00000014>;
interrupt-parent = <&UIC0>;
interrupts = <0x2 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ rtc@68 {
+ compatible = "stm,m41t80";
+ reg = <68>;
+ };
};
IIC1: i2c@ef600800 {
@@ -331,6 +385,7 @@
* later cannot be changed
*/
ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
+ 0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000
0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
@@ -361,6 +416,7 @@
* later cannot be changed
*/
ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
+ 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
@@ -402,6 +458,7 @@
* later cannot be changed
*/
ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
+ 0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000
0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */

2
target/linux/ppc44x/patches/005-canyonlands_remove_nonexisting_uarts.patch
View file

@ -1,6 +1,6 @@
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -243,28 +243,6 @@
@@ -247,28 +247,6 @@
interrupts = <0x1 0x4>;
};

27
target/linux/ppc44x/patches/003-canyonlands_openwrt_flashmap.patch → target/linux/ppc44x/patches/100-openwrt_flashmap.patch
View file

@ -1,6 +1,31 @@
--- a/arch/powerpc/boot/dts/taishan.dts
+++ b/arch/powerpc/boot/dts/taishan.dts
@@ -195,15 +195,15 @@
#size-cells = <1>;
partition@0 {
label = "kernel";
- reg = <0x0 0x180000>;
+ reg = <0x0 0x200000>;
};
- partition@180000 {
- label = "root";
- reg = <0x180000 0x200000>;
+ partition@200000 {
+ label = "rootfs";
+ reg = <0x200000 0x3c00000>;
};
- partition@380000 {
- label = "user";
- reg = <0x380000 0x3bc0000>;
+ partition@3e00000 {
+ label = "diagnostics";
+ reg = <0x3e00000 0x140000>;
};
partition@3f40000 {
label = "env";
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -155,24 +155,12 @@
@@ -209,24 +209,12 @@
#address-cells = <1>;
#size-cells = <1>;
partition@0 {

0
target/linux/ppc44x/patches/100-openwrt_dts_cmdline.patch → target/linux/ppc44x/patches/110-openwrt_dts_cmdline.patch
View file