ipq806x: refresh patches
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
parent
b6e3b70790
commit
9f09bd6606
7 changed files with 80 additions and 86 deletions
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@ -49,11 +49,11 @@ Signed-off-by: Andy Gross <andy.gross@linaro.org>
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- int idx, shift, w_size;
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-
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- w_size = controller->w_size;
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-
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- while (controller->rx_bytes < xfer->len) {
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+ int i, shift, num_bytes;
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+ u32 word;
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- while (controller->rx_bytes < xfer->len) {
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-
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- state = readl_relaxed(controller->base + QUP_OPERATIONAL);
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- if (0 == (state & QUP_OP_IN_FIFO_NOT_EMPTY))
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- break;
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@ -95,16 +95,20 @@ Signed-off-by: Andy Gross <andy.gross@linaro.org>
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- int idx, w_size;
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+ u32 remainder, words_per_block, num_words;
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+ bool is_block_mode = controller->mode == QUP_IO_M_MODE_BLOCK;
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+
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- w_size = controller->w_size;
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+ remainder = DIV_ROUND_UP(xfer->len - controller->rx_bytes,
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+ controller->w_size);
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+ words_per_block = controller->in_blk_sz >> 2;
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+
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- while (controller->tx_bytes < xfer->len) {
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+ do {
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+ /* ACK by clearing service flag */
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+ writel_relaxed(QUP_OP_IN_SERVICE_FLAG,
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+ controller->base + QUP_OPERATIONAL);
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+
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- state = readl_relaxed(controller->base + QUP_OPERATIONAL);
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- if (state & QUP_OP_OUT_FIFO_FULL)
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+ if (is_block_mode) {
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+ num_words = (remainder > words_per_block) ?
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+ words_per_block : remainder;
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@ -112,19 +116,15 @@ Signed-off-by: Andy Gross <andy.gross@linaro.org>
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+ if (!spi_qup_is_flag_set(controller,
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+ QUP_OP_IN_FIFO_NOT_EMPTY))
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+ break;
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- w_size = controller->w_size;
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+
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+ num_words = 1;
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+ }
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+
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+ /* read up to the maximum transfer size available */
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+ spi_qup_read_from_fifo(controller, xfer, num_words);
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- while (controller->tx_bytes < xfer->len) {
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+
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+ remainder -= num_words;
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- state = readl_relaxed(controller->base + QUP_OPERATIONAL);
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- if (state & QUP_OP_OUT_FIFO_FULL)
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+
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+ /* if block mode, check to see if next block is available */
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+ if (is_block_mode && !spi_qup_is_flag_set(controller,
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+ QUP_OP_IN_BLOCK_READ_REQ))
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@ -67,10 +67,14 @@ Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
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- /* must be zero for BLOCK and BAM */
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- writel_relaxed(0, controller->base + QUP_MX_READ_CNT);
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- writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT);
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-
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+ else
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+ controller->mode = QUP_IO_M_MODE_BLOCK;
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- if (!controller->qup_v1) {
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- void __iomem *input_cnt;
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-
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+ return 0;
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+}
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- input_cnt = controller->base + QUP_MX_INPUT_CNT;
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- /*
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- * for DMA transfers, both QUP_MX_INPUT_CNT and
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@ -82,19 +86,13 @@ Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
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- writel_relaxed(0, input_cnt);
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- else
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- writel_relaxed(n_words, input_cnt);
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+ else
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+ controller->mode = QUP_IO_M_MODE_BLOCK;
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+
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+ return 0;
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+}
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+/* prep qup for another spi transaction of specific type */
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+static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer)
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+{
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+ struct spi_qup *controller = spi_master_get_devdata(spi->master);
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+ u32 config, iomode, control;
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+ unsigned long flags;
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+
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+ reinit_completion(&controller->done);
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+ reinit_completion(&controller->dma_tx_done);
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+
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@ -173,37 +173,37 @@ Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
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+ qup->n_words = SPI_MAX_XFER;
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+ else
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+ qup->n_words = n_words % SPI_MAX_XFER;
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+
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+ if (qup->tx_buf && offset)
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+ qup->tx_buf = xfer->tx_buf + offset * SPI_MAX_XFER;
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+
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+ if (qup->rx_buf && offset)
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+ qup->rx_buf = xfer->rx_buf + offset * SPI_MAX_XFER;
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+
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+ /* if the transaction is small enough, we need
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+ * to fallback to FIFO mode */
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+ if (qup->n_words <= (qup->in_fifo_sz / sizeof(u32)))
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+ qup->mode = QUP_IO_M_MODE_FIFO;
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- if (qup->mode == QUP_IO_M_MODE_FIFO)
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- spi_qup_write(qup, xfer);
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+ ret = spi_qup_io_config(spi, xfer);
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+ if (ret)
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+ return ret;
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+ if (qup->tx_buf && offset)
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+ qup->tx_buf = xfer->tx_buf + offset * SPI_MAX_XFER;
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- ret = spi_qup_set_state(qup, QUP_STATE_RUN);
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- if (ret) {
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- dev_warn(qup->dev, "cannot set RUN state\n");
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- return ret;
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- }
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+ if (qup->rx_buf && offset)
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+ qup->rx_buf = xfer->rx_buf + offset * SPI_MAX_XFER;
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- if (!wait_for_completion_timeout(&qup->done, timeout))
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- return -ETIMEDOUT;
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+ /* if the transaction is small enough, we need
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+ * to fallback to FIFO mode */
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+ if (qup->n_words <= (qup->in_fifo_sz / sizeof(u32)))
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+ qup->mode = QUP_IO_M_MODE_FIFO;
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+
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+ ret = spi_qup_io_config(spi, xfer);
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+ if (ret)
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+ return ret;
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+
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+ ret = spi_qup_set_state(qup, QUP_STATE_RUN);
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+ if (ret) {
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+ dev_warn(qup->dev, "cannot set RUN state\n");
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+ return ret;
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+ }
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- if (!wait_for_completion_timeout(&qup->done, timeout))
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- return -ETIMEDOUT;
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+
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+ ret = spi_qup_set_state(qup, QUP_STATE_PAUSE);
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+ if (ret) {
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+ dev_warn(qup->dev, "cannot set PAUSE state\n");
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@ -44,58 +44,54 @@ Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
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- ret = spi_qup_io_config(spi, xfer);
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- if (ret)
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- return ret;
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-
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+ rx_sgl = xfer->rx_sg.sgl;
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+ tx_sgl = xfer->tx_sg.sgl;
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- /* before issuing the descriptors, set the QUP to run */
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- ret = spi_qup_set_state(qup, QUP_STATE_RUN);
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- if (ret) {
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- dev_warn(qup->dev, "cannot set RUN state\n");
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- return ret;
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- }
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-
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+ do {
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+ int rx_nents = 0, tx_nents = 0;
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- if (!qup->qup_v1) {
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- if (xfer->rx_buf)
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- rx_done = spi_qup_dma_done;
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-
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+ if (rx_sgl) {
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+ rx_nents = sg_nents_for_len(rx_sgl, SPI_MAX_XFER);
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+ if (rx_nents < 0)
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+ rx_nents = sg_nents(rx_sgl);
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- if (xfer->tx_buf)
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- tx_done = spi_qup_dma_done;
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- }
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-
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+ qup->n_words = spi_qup_sgl_get_size(rx_sgl, rx_nents) /
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+ qup->w_size;
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+ }
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- if (xfer->rx_buf) {
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- ret = spi_qup_prep_sg(master, xfer->rx_sg.sgl,
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- xfer->rx_sg.nents, DMA_DEV_TO_MEM,
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- rx_done, &qup->done);
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- if (ret)
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- return ret;
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+ rx_sgl = xfer->rx_sg.sgl;
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+ tx_sgl = xfer->tx_sg.sgl;
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+ if (tx_sgl) {
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+ tx_nents = sg_nents_for_len(tx_sgl, SPI_MAX_XFER);
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+ if (tx_nents < 0)
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+ tx_nents = sg_nents(tx_sgl);
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- dma_async_issue_pending(master->dma_rx);
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- }
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+ do {
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+ int rx_nents = 0, tx_nents = 0;
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+ qup->n_words = spi_qup_sgl_get_size(tx_sgl, tx_nents) /
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+ qup->w_size;
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+ }
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- if (xfer->tx_buf) {
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- ret = spi_qup_prep_sg(master, xfer->tx_sg.sgl,
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- xfer->tx_sg.nents, DMA_MEM_TO_DEV,
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- tx_done, &qup->dma_tx_done);
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+ if (rx_sgl) {
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+ rx_nents = sg_nents_for_len(rx_sgl, SPI_MAX_XFER);
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+ if (rx_nents < 0)
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+ rx_nents = sg_nents(rx_sgl);
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+
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+ qup->n_words = spi_qup_sgl_get_size(rx_sgl, rx_nents) /
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+ qup->w_size;
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+ }
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+
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+ if (tx_sgl) {
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+ tx_nents = sg_nents_for_len(tx_sgl, SPI_MAX_XFER);
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+ if (tx_nents < 0)
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+ tx_nents = sg_nents(tx_sgl);
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+
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+ qup->n_words = spi_qup_sgl_get_size(tx_sgl, tx_nents) /
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+ qup->w_size;
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+ }
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+
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+
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+ ret = spi_qup_io_config(spi, xfer);
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if (ret)
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@ -109,17 +105,22 @@ Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
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+ dev_warn(qup->dev, "cannot set RUN state\n");
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+ return ret;
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+ }
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+
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- if (xfer->rx_buf && !wait_for_completion_timeout(&qup->done, timeout))
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- return -ETIMEDOUT;
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+ if (!qup->qup_v1) {
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+ if (rx_sgl) {
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+ rx_done = spi_qup_dma_done;
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+ }
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+
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- if (xfer->tx_buf && !wait_for_completion_timeout(&qup->dma_tx_done, timeout))
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- ret = -ETIMEDOUT;
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+ if (tx_sgl) {
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+ tx_done = spi_qup_dma_done;
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+ }
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+ }
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+
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- return ret;
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+ if (rx_sgl) {
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+ ret = spi_qup_prep_sg(master, rx_sgl, rx_nents,
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+ DMA_DEV_TO_MEM, rx_done,
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@ -149,17 +150,12 @@ Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
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+ pr_emerg(" tx timed out\n");
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+ return -ETIMEDOUT;
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+ }
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- if (xfer->rx_buf && !wait_for_completion_timeout(&qup->done, timeout))
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- return -ETIMEDOUT;
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+
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+ for (; rx_sgl && rx_nents--; rx_sgl = sg_next(rx_sgl));
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+ for (; tx_sgl && tx_nents--; tx_sgl = sg_next(tx_sgl));
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- if (xfer->tx_buf && !wait_for_completion_timeout(&qup->dma_tx_done, timeout))
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- ret = -ETIMEDOUT;
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+
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+ } while (rx_sgl || tx_sgl);
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- return ret;
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+
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+ return 0;
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}
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@ -85,7 +85,7 @@ More majordomo info at http://vger.kernel.org/majordomo-info.html
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+ };
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--- a/drivers/clk/qcom/Kconfig
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+++ b/drivers/clk/qcom/Kconfig
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@@ -2,6 +2,9 @@
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@@ -2,6 +2,9 @@ config QCOM_GDSC
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bool
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select PM_GENERIC_DOMAINS if PM
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@ -95,7 +95,7 @@ More majordomo info at http://vger.kernel.org/majordomo-info.html
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config COMMON_CLK_QCOM
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tristate "Support for Qualcomm's clock controllers"
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depends on OF
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@@ -9,6 +12,19 @@
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@@ -9,6 +12,19 @@ config COMMON_CLK_QCOM
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select REGMAP_MMIO
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select RESET_CONTROLLER
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@ -117,7 +117,7 @@ More majordomo info at http://vger.kernel.org/majordomo-info.html
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select QCOM_GDSC
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--- a/drivers/clk/qcom/Makefile
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+++ b/drivers/clk/qcom/Makefile
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@@ -29,3 +29,4 @@
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@@ -29,3 +29,4 @@ obj-$(CONFIG_MSM_LCC_8960) += lcc-msm896
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obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
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obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
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obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o
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@ -54,9 +54,9 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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depends on COMMON_CLK_QCOM && QCOM_SMD_RPM
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--- a/drivers/clk/qcom/Makefile
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+++ b/drivers/clk/qcom/Makefile
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@@ -23,3 +23,4 @@ obj-$(CONFIG_MSM_GCC_8974) += gcc-msm897
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obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
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@@ -30,3 +30,4 @@ obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8
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obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
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obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o
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obj-$(CONFIG_QCOM_CLK_SMD_RPM) += clk-smd-rpm.o
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+obj-$(CONFIG_QCOM_CLK_RPM) += clk-rpm.o
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--- /dev/null
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@ -1,6 +1,6 @@
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -573,92 +573,61 @@
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@@ -573,92 +573,61 @@ dtb-$(CONFIG_ARCH_OMAP4) += \
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omap4-var-stk-om44.dtb
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dtb-$(CONFIG_SOC_AM43XX) += \
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am43x-epos-evm.dtb \
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@ -281,7 +281,10 @@
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+ 0x00094 0x4e /* PORT6_STATUS */
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+ >;
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+ };
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+
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- nand-ecc-strength = <4>;
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- nand-ecc-step-size = <512>;
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- nand-bus-width = <8>;
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+ phy4: ethernet-phy@4 {
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+ device_type = "ethernet-phy";
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+ reg = <4>;
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@ -306,10 +309,7 @@
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+ status = "ok";
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+ phy-mode = "sgmii";
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+ qcom,id = <2>;
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- nand-ecc-strength = <4>;
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- nand-ecc-step-size = <512>;
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- nand-bus-width = <8>;
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+
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+ fixed-link {
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+ speed = <1000>;
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+ full-duplex;
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