cns3xxx: refresh patches

Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
This commit is contained in:
Koen Vandeputte 2018-01-11 16:04:39 +01:00 committed by John Crispin
parent 7f93624d5f
commit 9e7d53c3fe
8 changed files with 21 additions and 21 deletions

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@ -20,7 +20,7 @@
#endif
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -873,6 +873,17 @@ config DMA_CACHE_RWFO
@@ -899,6 +899,17 @@ config DMA_CACHE_RWFO
in hardware, other workarounds are needed (e.g. cache
maintenance broadcasting in software via FIQ).
@ -48,7 +48,7 @@
/*
* The zero page is never written to, so never has any dirty
@@ -329,7 +330,10 @@ void flush_dcache_page(struct page *page
@@ -335,7 +336,10 @@ void flush_dcache_page(struct page *page
mapping = page_mapping(page);
@ -62,7 +62,7 @@
else {
--- a/arch/arm/mm/dma.h
+++ b/arch/arm/mm/dma.h
@@ -4,8 +4,13 @@
@@ -5,8 +5,13 @@
#include <asm/glue-cache.h>
#ifndef MULTI_CACHE

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@ -4,7 +4,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -324,6 +324,13 @@ config KS8695_WATCHDOG
@@ -355,6 +355,13 @@ config KS8695_WATCHDOG
Watchdog timer embedded into KS8695 processor. This will reboot your
system when the timeout is reached.
@ -20,8 +20,8 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
help
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_21285_WATCHDOG) += wdt285.o
obj-$(CONFIG_977_WATCHDOG) += wdt977.o
@@ -49,6 +49,7 @@ obj-$(CONFIG_977_WATCHDOG) += wdt977.o
obj-$(CONFIG_GEMINI_WATCHDOG) += gemini_wdt.o
obj-$(CONFIG_IXP4XX_WATCHDOG) += ixp4xx_wdt.o
obj-$(CONFIG_KS8695_WATCHDOG) += ks8695_wdt.o
+obj-$(CONFIG_MPCORE_WATCHDOG) += mpcore_wdt.o
@ -151,7 +151,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
+MODULE_LICENSE("GPL");
--- a/arch/arm/include/asm/smp_twd.h
+++ b/arch/arm/include/asm/smp_twd.h
@@ -33,5 +33,6 @@ struct twd_local_timer name __initdata =
@@ -34,5 +34,6 @@ struct twd_local_timer name __initdata =
};
int twd_local_timer_register(struct twd_local_timer *);

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@ -1,6 +1,6 @@
--- a/arch/arm/mach-cns3xxx/Makefile
+++ b/arch/arm/mach-cns3xxx/Makefile
@@ -5,3 +5,5 @@ cns3xxx-y += core.o pm.o
@@ -6,3 +6,5 @@ cns3xxx-y += core.o pm.o
cns3xxx-$(CONFIG_ATAGS) += devices.o
cns3xxx-$(CONFIG_PCI) += pcie.o
cns3xxx-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o
@ -8,7 +8,7 @@
+cns3xxx-$(CONFIG_HOTPLUG_CPU) += hotplug.o
--- a/arch/arm/mach-cns3xxx/Kconfig
+++ b/arch/arm/mach-cns3xxx/Kconfig
@@ -2,6 +2,9 @@ menuconfig ARCH_CNS3XXX
@@ -3,6 +3,9 @@ menuconfig ARCH_CNS3XXX
bool "Cavium Networks CNS3XXX family"
depends on ARCH_MULTI_V6
select ARM_GIC

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@ -1,6 +1,6 @@
--- a/arch/arm/mach-cns3xxx/Kconfig
+++ b/arch/arm/mach-cns3xxx/Kconfig
@@ -5,6 +5,7 @@ menuconfig ARCH_CNS3XXX
@@ -6,6 +6,7 @@ menuconfig ARCH_CNS3XXX
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD
select HAVE_SMP
@ -10,7 +10,7 @@
--- a/arch/arm/mach-cns3xxx/Makefile
+++ b/arch/arm/mach-cns3xxx/Makefile
@@ -5,5 +5,5 @@ cns3xxx-y += core.o pm.o
@@ -6,5 +6,5 @@ cns3xxx-y += core.o pm.o
cns3xxx-$(CONFIG_ATAGS) += devices.o
cns3xxx-$(CONFIG_PCI) += pcie.o
cns3xxx-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o
@ -29,7 +29,7 @@
*/
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -856,7 +856,7 @@ config VDSO
@@ -882,7 +882,7 @@ config VDSO
config DMA_CACHE_RWFO
bool "Enable read/write for ownership DMA cache maintenance"

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@ -1,6 +1,6 @@
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -441,6 +441,18 @@ config I2C_CBUS_GPIO
@@ -473,6 +473,18 @@ config I2C_CBUS_GPIO
This driver can also be built as a module. If so, the module
will be called i2c-cbus-gpio.
@ -21,11 +21,11 @@
depends on CPM1 || CPM2
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -114,6 +114,7 @@ obj-$(CONFIG_I2C_VIPERBOARD) += i2c-vipe
@@ -128,6 +128,7 @@ obj-$(CONFIG_I2C_VIPERBOARD) += i2c-vipe
obj-$(CONFIG_I2C_ACORN) += i2c-acorn.o
obj-$(CONFIG_I2C_BCM_KONA) += i2c-bcm-kona.o
obj-$(CONFIG_I2C_BRCMSTB) += i2c-brcmstb.o
+obj-$(CONFIG_I2C_CNS3XXX) += i2c-cns3xxx.o
obj-$(CONFIG_I2C_CROS_EC_TUNNEL) += i2c-cros-ec-tunnel.o
obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o
obj-$(CONFIG_I2C_OPAL) += i2c-opal.o
obj-$(CONFIG_I2C_MLXCPLD) += i2c-mlxcpld.o

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@ -13,7 +13,7 @@
}
--- a/arch/arm/mach-cns3xxx/Kconfig
+++ b/arch/arm/mach-cns3xxx/Kconfig
@@ -2,6 +2,8 @@ menuconfig ARCH_CNS3XXX
@@ -3,6 +3,8 @@ menuconfig ARCH_CNS3XXX
bool "Cavium Networks CNS3XXX family"
depends on ARCH_MULTI_V6
select ARM_GIC
@ -24,7 +24,7 @@
select HAVE_SMP
--- a/arch/arm/mach-cns3xxx/Makefile
+++ b/arch/arm/mach-cns3xxx/Makefile
@@ -1,7 +1,7 @@
@@ -2,7 +2,7 @@
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
obj-$(CONFIG_ARCH_CNS3XXX) += cns3xxx.o

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@ -1,6 +1,6 @@
--- a/arch/arm/mach-cns3xxx/Kconfig
+++ b/arch/arm/mach-cns3xxx/Kconfig
@@ -22,4 +22,12 @@ config MACH_CNS3420VB
@@ -23,4 +23,12 @@ config MACH_CNS3420VB
This is a platform with an on-board ARM11 MPCore and has support
for USB, USB-OTG, MMC/SD/SDIO, SATA, PCI-E, etc.
@ -15,7 +15,7 @@
endif
--- a/arch/arm/mach-cns3xxx/Makefile
+++ b/arch/arm/mach-cns3xxx/Makefile
@@ -7,3 +7,5 @@ cns3xxx-$(CONFIG_PCI) += pcie.o
@@ -8,3 +8,5 @@ cns3xxx-$(CONFIG_PCI) += pcie.o
cns3xxx-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o
cns3xxx-$(CONFIG_SMP) += platsmp.o headsmp.o cns3xxx_fiq.o
cns3xxx-$(CONFIG_HOTPLUG_CPU) += hotplug.o

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@ -1,6 +1,6 @@
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -2015,7 +2015,8 @@ static void pcie_write_mrrs(struct pci_d
@@ -2303,7 +2303,8 @@ static void pcie_write_mrrs(struct pci_d
/* In the "safe" case, do not configure the MRRS. There appear to be
* issues with setting MRRS to 0 on a number of devices.
*/
@ -12,7 +12,7 @@
/* For Max performance, the MRRS must be set to the largest supported
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -783,7 +783,7 @@ enum pcie_bus_config_types {
@@ -845,7 +845,7 @@ enum pcie_bus_config_types {
PCIE_BUS_DEFAULT, /* ensure MPS matches upstream bridge */
PCIE_BUS_SAFE, /* use largest MPS boot-time devices support */
PCIE_BUS_PERFORMANCE, /* use MPS and MRRS for best performance */