ar71xx: experimental 2.6.32 support
SVN-Revision: 18638
This commit is contained in:
parent
3184772820
commit
9bb13d59d9
32 changed files with 1348 additions and 0 deletions
225
target/linux/ar71xx/config-2.6.32
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225
target/linux/ar71xx/config-2.6.32
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@ -0,0 +1,225 @@
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CONFIG_32BIT=y
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# CONFIG_64BIT is not set
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CONFIG_AG71XX=y
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CONFIG_AG71XX_AR8216_SUPPORT=y
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# CONFIG_AG71XX_DEBUG is not set
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# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
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# CONFIG_AR7 is not set
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CONFIG_AR71XX_MACH_AP81=y
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CONFIG_AR71XX_MACH_AP83=y
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CONFIG_AR71XX_MACH_AW_NR580=y
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CONFIG_AR71XX_MACH_DIR_825_B1=y
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CONFIG_AR71XX_MACH_GENERIC=y
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CONFIG_AR71XX_MACH_MZK_W04NU=y
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CONFIG_AR71XX_MACH_MZK_W300NH=y
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CONFIG_AR71XX_MACH_PB42=y
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CONFIG_AR71XX_MACH_PB44=y
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CONFIG_AR71XX_MACH_RB_4XX=y
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CONFIG_AR71XX_MACH_TEW_632BRP=y
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CONFIG_AR71XX_MACH_TL_WR741ND=y
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CONFIG_AR71XX_MACH_TL_WR941ND=y
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CONFIG_AR71XX_MACH_UBNT=y
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CONFIG_AR71XX_MACH_WNDR3700=y
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CONFIG_AR71XX_MACH_WNR2000=y
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CONFIG_AR71XX_MACH_WP543=y
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CONFIG_AR71XX_MACH_WRT160NL=y
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CONFIG_AR71XX_MACH_WRT400N=y
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CONFIG_AR71XX_WDT=y
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# CONFIG_ARCH_HAS_ILOG2_U32 is not set
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# CONFIG_ARCH_HAS_ILOG2_U64 is not set
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CONFIG_ARCH_HIBERNATION_POSSIBLE=y
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CONFIG_ARCH_POPULATES_NODE_MAP=y
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CONFIG_ARCH_REQUIRE_GPIOLIB=y
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# CONFIG_ARCH_SUPPORTS_MSI is not set
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CONFIG_ARCH_SUPPORTS_OPROFILE=y
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_ATHEROS_AR71XX=y
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# CONFIG_BCM47XX is not set
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# CONFIG_BCM63XX is not set
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CONFIG_BITREVERSE=y
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# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
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# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
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CONFIG_CC_OPTIMIZE_FOR_SIZE=y
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CONFIG_CEVT_R4K=y
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CONFIG_CEVT_R4K_LIB=y
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CONFIG_CFG80211_DEFAULT_PS_VALUE=0
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CONFIG_CMDLINE="rootfstype=squashfs,yaffs,jffs2 noinitrd console=ttyS0,115200"
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CONFIG_CPU_BIG_ENDIAN=y
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# CONFIG_CPU_CAVIUM_OCTEON is not set
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CONFIG_CPU_HAS_PREFETCH=y
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CONFIG_CPU_HAS_SYNC=y
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# CONFIG_CPU_LITTLE_ENDIAN is not set
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# CONFIG_CPU_LOONGSON2E is not set
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CONFIG_CPU_MIPS32=y
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# CONFIG_CPU_MIPS32_R1 is not set
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CONFIG_CPU_MIPS32_R2=y
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# CONFIG_CPU_MIPS64_R1 is not set
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# CONFIG_CPU_MIPS64_R2 is not set
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CONFIG_CPU_MIPSR2=y
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# CONFIG_CPU_NEVADA is not set
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# CONFIG_CPU_R10000 is not set
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# CONFIG_CPU_R3000 is not set
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# CONFIG_CPU_R4300 is not set
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# CONFIG_CPU_R4X00 is not set
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# CONFIG_CPU_R5000 is not set
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# CONFIG_CPU_R5432 is not set
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# CONFIG_CPU_R5500 is not set
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# CONFIG_CPU_R6000 is not set
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# CONFIG_CPU_R8000 is not set
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# CONFIG_CPU_RM7000 is not set
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# CONFIG_CPU_RM9000 is not set
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# CONFIG_CPU_SB1 is not set
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CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
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CONFIG_CPU_SUPPORTS_HIGHMEM=y
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# CONFIG_CPU_TX39XX is not set
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# CONFIG_CPU_TX49XX is not set
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# CONFIG_CPU_VR41XX is not set
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CONFIG_CSRC_R4K=y
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CONFIG_CSRC_R4K_LIB=y
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CONFIG_DECOMPRESS_LZMA=y
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CONFIG_DEVPORT=y
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# CONFIG_DM9000 is not set
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CONFIG_DMA_NEED_PCI_MAP_STATE=y
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CONFIG_DMA_NONCOHERENT=y
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CONFIG_EARLY_PRINTK=y
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# CONFIG_FSNOTIFY is not set
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
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CONFIG_GENERIC_CMOS_UPDATE=y
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CONFIG_GENERIC_FIND_LAST_BIT=y
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CONFIG_GENERIC_FIND_NEXT_BIT=y
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CONFIG_GENERIC_GPIO=y
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CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
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CONFIG_GPIOLIB=y
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# CONFIG_GPIO_MC33880 is not set
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CONFIG_GPIO_PCF857X=y
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CONFIG_GPIO_SYSFS=y
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CONFIG_HARDWARE_WATCHPOINTS=y
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HAS_IOPORT=y
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CONFIG_HAVE_ARCH_KGDB=y
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CONFIG_HAVE_GENERIC_DMA_COHERENT=y
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CONFIG_HAVE_IDE=y
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CONFIG_HAVE_OPROFILE=y
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CONFIG_HW_HAS_PCI=y
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# CONFIG_HW_RANDOM is not set
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CONFIG_I2C=y
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CONFIG_I2C_ALGOBIT=y
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CONFIG_I2C_BOARDINFO=y
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CONFIG_I2C_GPIO=y
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CONFIG_ICPLUS_PHY=y
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CONFIG_IMAGE_CMDLINE_HACK=y
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# CONFIG_INITRAMFS_COMPRESSION_LZO is not set
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CONFIG_INITRAMFS_ROOT_GID=0
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CONFIG_INITRAMFS_ROOT_UID=0
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CONFIG_INITRAMFS_SOURCE="../../root"
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CONFIG_IRQ_CPU=y
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# CONFIG_ISDN is not set
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# CONFIG_LEDS_GPIO is not set
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# CONFIG_M25PXX_USE_FAST_READ is not set
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# CONFIG_MACH_ALCHEMY is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MACH_LOONGSON is not set
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# CONFIG_MACH_TX39XX is not set
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# CONFIG_MACH_TX49XX is not set
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# CONFIG_MACH_VR41XX is not set
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# CONFIG_MFD_MC13783 is not set
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CONFIG_MICREL_PHY=y
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# CONFIG_MIKROTIK_RB532 is not set
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CONFIG_MIPS=y
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# CONFIG_MIPS_COBALT is not set
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CONFIG_MIPS_L1_CACHE_SHIFT=5
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CONFIG_MIPS_MACHINE=y
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# CONFIG_MIPS_MALTA is not set
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CONFIG_MIPS_MT_DISABLED=y
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# CONFIG_MIPS_MT_SMP is not set
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# CONFIG_MIPS_MT_SMTC is not set
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# CONFIG_MIPS_SIM is not set
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CONFIG_MTD_AR91XX_FLASH=y
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# CONFIG_MTD_CFI is not set
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# CONFIG_MTD_CFI_INTELEXT is not set
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CONFIG_MTD_CMDLINE_PARTS=y
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CONFIG_MTD_JEDECPROBE=y
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CONFIG_MTD_M25P80=y
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CONFIG_MTD_MYLOADER_PARTS=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_RB4XX=y
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CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
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CONFIG_MTD_REDBOOT_PARTS=y
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# CONFIG_MTD_SST25L is not set
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CONFIG_MTD_WRT160NL_PARTS=y
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CONFIG_MYLOADER=y
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CONFIG_NET_DSA=y
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CONFIG_NET_DSA_MV88E6060=y
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# CONFIG_NET_DSA_MV88E6123_61_65 is not set
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# CONFIG_NET_DSA_MV88E6131 is not set
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# CONFIG_NET_DSA_MV88E6XXX is not set
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# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
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# CONFIG_NET_DSA_TAG_DSA is not set
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# CONFIG_NET_DSA_TAG_EDSA is not set
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CONFIG_NET_DSA_TAG_TRAILER=y
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# CONFIG_NO_IOPORT is not set
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# CONFIG_NXP_STB220 is not set
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# CONFIG_NXP_STB225 is not set
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CONFIG_PAGEFLAGS_EXTENDED=y
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CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
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CONFIG_PCI_DOMAINS=y
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CONFIG_PHYLIB=y
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# CONFIG_PMC_MSP is not set
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# CONFIG_PMC_YOSEMITE is not set
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# CONFIG_PNX8550_JBS is not set
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# CONFIG_PNX8550_STB810 is not set
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# CONFIG_PROBE_INITRD_HEADER is not set
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CONFIG_RTL8306_PHY=y
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CONFIG_SCHED_OMIT_FRAME_POINTER=y
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# CONFIG_SCSI_DMA is not set
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# CONFIG_SERIAL_8250_EXTENDED is not set
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CONFIG_SERIAL_8250_NR_UARTS=1
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CONFIG_SERIAL_8250_RUNTIME_UARTS=1
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# CONFIG_SGI_IP22 is not set
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# CONFIG_SGI_IP27 is not set
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# CONFIG_SGI_IP28 is not set
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# CONFIG_SGI_IP32 is not set
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# CONFIG_SIBYTE_BIGSUR is not set
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# CONFIG_SIBYTE_CARMEL is not set
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# CONFIG_SIBYTE_CRHINE is not set
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# CONFIG_SIBYTE_CRHONE is not set
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# CONFIG_SIBYTE_LITTLESUR is not set
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# CONFIG_SIBYTE_RHONE is not set
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# CONFIG_SIBYTE_SENTOSA is not set
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# CONFIG_SIBYTE_SWARM is not set
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# CONFIG_SLAB is not set
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CONFIG_SLUB=y
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CONFIG_SPI=y
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CONFIG_SPI_AP83=y
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CONFIG_SPI_AR71XX=y
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CONFIG_SPI_BITBANG=y
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CONFIG_SPI_GPIO=y
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CONFIG_SPI_MASTER=y
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CONFIG_SPI_PB44=y
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# CONFIG_SPI_SPIDEV is not set
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# CONFIG_SPI_VSC7385 is not set
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CONFIG_SWCONFIG=y
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CONFIG_SYS_HAS_CPU_MIPS32_R1=y
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CONFIG_SYS_HAS_CPU_MIPS32_R2=y
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CONFIG_SYS_HAS_EARLY_PRINTK=y
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CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
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CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
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CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
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# CONFIG_TC35815 is not set
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CONFIG_TRAD_SIGNALS=y
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# CONFIG_TREE_PREEMPT_RCU is not set
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CONFIG_TREE_RCU=y
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CONFIG_USB_SUPPORT=y
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CONFIG_YAFFS_9BYTE_TAGS=y
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CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED=y
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CONFIG_YAFFS_AUTO_YAFFS2=y
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# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
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# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
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CONFIG_YAFFS_FS=y
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CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
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CONFIG_YAFFS_YAFFS1=y
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CONFIG_YAFFS_YAFFS2=y
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CONFIG_ZONE_DMA_FLAG=0
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50
target/linux/ar71xx/patches-2.6.32/001-ar71xx_core.patch
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50
target/linux/ar71xx/patches-2.6.32/001-ar71xx_core.patch
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@ -0,0 +1,50 @@
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--- a/arch/mips/Makefile
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+++ b/arch/mips/Makefile
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@@ -624,6 +624,13 @@ else
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load-$(CONFIG_CPU_CAVIUM_OCTEON) += 0xffffffff81100000
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endif
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+#
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+# Atheros AR71xx
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+#
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+core-$(CONFIG_ATHEROS_AR71XX) += arch/mips/ar71xx/
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+cflags-$(CONFIG_ATHEROS_AR71XX) += -I$(srctree)/arch/mips/include/asm/mach-ar71xx
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+load-$(CONFIG_ATHEROS_AR71XX) += 0xffffffff80060000
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+
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# temporary until string.h is fixed
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cflags-y += -ffreestanding
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--- a/arch/mips/Kconfig
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+++ b/arch/mips/Kconfig
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@@ -43,6 +43,23 @@ config AR7
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Support for the Texas Instruments AR7 System-on-a-Chip
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family: TNETD7100, 7200 and 7300.
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+config ATHEROS_AR71XX
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+ bool "Atheros AR71xx based boards"
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+ select CEVT_R4K
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+ select CSRC_R4K
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+ select DMA_NONCOHERENT
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+ select HW_HAS_PCI
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+ select IRQ_CPU
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+ select ARCH_REQUIRE_GPIOLIB
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+ select SYS_HAS_CPU_MIPS32_R1
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+ select SYS_HAS_CPU_MIPS32_R2
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+ select SYS_SUPPORTS_32BIT_KERNEL
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+ select SYS_SUPPORTS_BIG_ENDIAN
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+ select SYS_HAS_EARLY_PRINTK
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+ select MIPS_MACHINE
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+ help
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+ Support for Atheros AR71xx based boards.
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+
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config BASLER_EXCITE
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bool "Basler eXcite smart camera"
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select CEVT_R4K
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@@ -674,6 +691,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
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endchoice
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source "arch/mips/alchemy/Kconfig"
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+source "arch/mips/ar71xx/Kconfig"
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source "arch/mips/basler/excite/Kconfig"
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source "arch/mips/bcm63xx/Kconfig"
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source "arch/mips/jazz/Kconfig"
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10
target/linux/ar71xx/patches-2.6.32/002-ar71xx_pci.patch
Normal file
10
target/linux/ar71xx/patches-2.6.32/002-ar71xx_pci.patch
Normal file
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@ -0,0 +1,10 @@
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--- a/arch/mips/pci/Makefile
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+++ b/arch/mips/pci/Makefile
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@@ -18,6 +18,7 @@ obj-$(CONFIG_PCI_TX4927) += ops-tx4927.o
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obj-$(CONFIG_BCM47XX) += pci-bcm47xx.o
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obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o fixup-bcm63xx.o \
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ops-bcm63xx.o
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+obj-$(CONFIG_ATHEROS_AR71XX) += pci-ar71xx.o pci-ar724x.o
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#
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# These are still pretty much in the old state, watch, go blind.
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58
target/linux/ar71xx/patches-2.6.32/003-ar71xx_usb_host.patch
Normal file
58
target/linux/ar71xx/patches-2.6.32/003-ar71xx_usb_host.patch
Normal file
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@ -0,0 +1,58 @@
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--- a/drivers/usb/host/Kconfig
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+++ b/drivers/usb/host/Kconfig
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@@ -98,6 +98,13 @@ config USB_EHCI_BIG_ENDIAN_DESC
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depends on USB_EHCI_HCD && (440EPX || ARCH_IXP4XX)
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default y
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+config USB_EHCI_AR71XX
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+ bool "USB EHCI support for AR71xx"
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+ depends on USB_EHCI_HCD && ATHEROS_AR71XX
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+ default y
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+ help
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+ Support for Atheros AR71xx built-in EHCI controller
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+
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config USB_EHCI_FSL
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bool "Support for Freescale on-chip EHCI USB controller"
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depends on USB_EHCI_HCD && FSL_SOC
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@@ -189,6 +196,13 @@ config USB_OHCI_HCD
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To compile this driver as a module, choose M here: the
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module will be called ohci-hcd.
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+config USB_OHCI_AR71XX
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+ bool "USB OHCI support for Atheros AR71xx"
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+ depends on USB_OHCI_HCD && ATHEROS_AR71XX
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+ default y
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+ help
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+ Support for Atheros AR71xx built-in OHCI controller
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+
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config USB_OHCI_HCD_PPC_SOC
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bool "OHCI support for on-chip PPC USB controller"
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depends on USB_OHCI_HCD && (STB03xxx || PPC_MPC52xx)
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--- a/drivers/usb/host/ehci-hcd.c
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+++ b/drivers/usb/host/ehci-hcd.c
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@@ -1140,6 +1140,11 @@ MODULE_LICENSE ("GPL");
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#define PLATFORM_DRIVER ehci_atmel_driver
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#endif
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+#ifdef CONFIG_USB_EHCI_AR71XX
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+#include "ehci-ar71xx.c"
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+#define PLATFORM_DRIVER ehci_ar71xx_driver
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+#endif
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+
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#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
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!defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER)
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#error "missing bus glue for ehci-hcd"
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--- a/drivers/usb/host/ohci-hcd.c
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+++ b/drivers/usb/host/ohci-hcd.c
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@@ -1085,6 +1085,11 @@ MODULE_LICENSE ("GPL");
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#define TMIO_OHCI_DRIVER ohci_hcd_tmio_driver
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#endif
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+#ifdef CONFIG_USB_OHCI_AR71XX
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+#include "ohci-ar71xx.c"
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+#define PLATFORM_DRIVER ohci_hcd_ar71xx_driver
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+#endif
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+
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#if !defined(PCI_DRIVER) && \
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!defined(PLATFORM_DRIVER) && \
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!defined(OF_PLATFORM_DRIVER) && \
|
|
@ -0,0 +1,26 @@
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--- a/drivers/spi/Kconfig
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+++ b/drivers/spi/Kconfig
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@@ -53,6 +53,13 @@ if SPI_MASTER
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|
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comment "SPI Master Controller Drivers"
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+config SPI_AR71XX
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+ tristate "Atheros AR71xx SPI Controller"
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+ depends on SPI_MASTER && ATHEROS_AR71XX
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+ select SPI_BITBANG
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+ help
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+ This is the SPI contoller driver for Atheros AR71xx.
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+
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config SPI_ATMEL
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tristate "Atmel SPI Controller"
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depends on (ARCH_AT91 || AVR32)
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--- a/drivers/spi/Makefile
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+++ b/drivers/spi/Makefile
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@@ -11,6 +11,7 @@ endif
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obj-$(CONFIG_SPI_MASTER) += spi.o
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# SPI master controller drivers (bus)
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+obj-$(CONFIG_SPI_AR71XX) += ar71xx_spi.o
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obj-$(CONFIG_SPI_ATMEL) += atmel_spi.o
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||||
obj-$(CONFIG_SPI_BFIN) += spi_bfin5xx.o
|
||||
obj-$(CONFIG_SPI_BITBANG) += spi_bitbang.o
|
|
@ -0,0 +1,21 @@
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|||
--- a/drivers/net/Kconfig
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||||
+++ b/drivers/net/Kconfig
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||||
@@ -2126,6 +2126,8 @@ config ACENIC_OMIT_TIGON_I
|
||||
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||||
The safe and default value for this is N.
|
||||
|
||||
+source drivers/net/ag71xx/Kconfig
|
||||
+
|
||||
config DL2K
|
||||
tristate "DL2000/TC902x-based Gigabit Ethernet support"
|
||||
depends on PCI
|
||||
--- a/drivers/net/Makefile
|
||||
+++ b/drivers/net/Makefile
|
||||
@@ -106,6 +106,7 @@ obj-$(CONFIG_STMMAC_ETH) += stmmac/
|
||||
# end link order section
|
||||
#
|
||||
|
||||
+obj-$(CONFIG_AG71XX) += ag71xx/
|
||||
obj-$(CONFIG_SUNDANCE) += sundance.o
|
||||
obj-$(CONFIG_HAMACHI) += hamachi.o
|
||||
obj-$(CONFIG_NET) += Space.o loopback.o
|
|
@ -0,0 +1,26 @@
|
|||
--- a/drivers/watchdog/Kconfig
|
||||
+++ b/drivers/watchdog/Kconfig
|
||||
@@ -850,6 +850,13 @@ config TXX9_WDT
|
||||
help
|
||||
Hardware driver for the built-in watchdog timer on TXx9 MIPS SoCs.
|
||||
|
||||
+config AR71XX_WDT
|
||||
+ tristate "Atheros AR71xx Watchdog Timer"
|
||||
+ depends on ATHEROS_AR71XX
|
||||
+ help
|
||||
+ Hardware driver for the built-in watchdog timer on the Atheros
|
||||
+ AR71xx SoCs.
|
||||
+
|
||||
# PARISC Architecture
|
||||
|
||||
# POWERPC Architecture
|
||||
--- a/drivers/watchdog/Makefile
|
||||
+++ b/drivers/watchdog/Makefile
|
||||
@@ -113,6 +113,7 @@ obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
|
||||
obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
|
||||
obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
|
||||
obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
|
||||
+obj-$(CONFIG_AR71XX_WDT) += ar71xx_wdt.o
|
||||
|
||||
# PARISC Architecture
|
||||
|
|
@ -0,0 +1,26 @@
|
|||
--- a/drivers/mtd/maps/Kconfig
|
||||
+++ b/drivers/mtd/maps/Kconfig
|
||||
@@ -259,6 +259,13 @@ config MTD_ALCHEMY
|
||||
help
|
||||
Flash memory access on AMD Alchemy Pb/Db/RDK Reference Boards
|
||||
|
||||
+config MTD_AR91XX_FLASH
|
||||
+ tristate "Atheros AR91xx parallel flash support"
|
||||
+ depends on ATHEROS_AR71XX
|
||||
+ select MTD_COMPLEX_MAPPINGS
|
||||
+ help
|
||||
+ Parallel flash driver for the Atheros AR91xx based boards.
|
||||
+
|
||||
config MTD_DILNETPC
|
||||
tristate "CFI Flash device mapped on DIL/Net PC"
|
||||
depends on X86 && MTD_CONCAT && MTD_PARTITIONS && MTD_CFI_INTELEXT && BROKEN
|
||||
--- a/drivers/mtd/maps/Makefile
|
||||
+++ b/drivers/mtd/maps/Makefile
|
||||
@@ -41,6 +41,7 @@ obj-$(CONFIG_MTD_DBOX2) += dbox2-flash.
|
||||
obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o
|
||||
obj-$(CONFIG_MTD_PCI) += pci.o
|
||||
obj-$(CONFIG_MTD_ALCHEMY) += alchemy-flash.o
|
||||
+obj-$(CONFIG_MTD_AR91XX_FLASH) += ar91xx_flash.o
|
||||
obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o
|
||||
obj-$(CONFIG_MTD_EDB7312) += edb7312.o
|
||||
obj-$(CONFIG_MTD_IMPA7) += impa7.o
|
|
@ -0,0 +1,13 @@
|
|||
--- a/drivers/mtd/devices/m25p80.c
|
||||
+++ b/drivers/mtd/devices/m25p80.c
|
||||
@@ -626,6 +626,10 @@ static struct flash_info __devinitdata m
|
||||
{ "mx25l12805d", 0xc22018, 0, 64 * 1024, 256, },
|
||||
{ "mx25l12855e", 0xc22618, 0, 64 * 1024, 256, },
|
||||
|
||||
+ /* PMC -- pm25x "blocks" are 32K, sectors are 4K */
|
||||
+ { "pm25lv512", 0, 32 * 1024, 2, SECT_4K },
|
||||
+ { "pm25lv010", 0, 32 * 1024, 4, SECT_4K },
|
||||
+
|
||||
/* Spansion -- single (large) sector size only, at least
|
||||
* for the chips listed here (without boot sectors).
|
||||
*/
|
|
@ -0,0 +1,24 @@
|
|||
--- a/drivers/net/phy/Kconfig
|
||||
+++ b/drivers/net/phy/Kconfig
|
||||
@@ -114,6 +114,11 @@ config RTL8306_PHY
|
||||
tristate "Driver for Realtek RTL8306S switches"
|
||||
select SWCONFIG
|
||||
|
||||
+config MICREL_PHY
|
||||
+ tristate "Drivers for Micrel/Kendin PHYs"
|
||||
+ ---help---
|
||||
+ Currently has a driver for the KSZ8041
|
||||
+
|
||||
config FIXED_PHY
|
||||
bool "Driver for MDIO Bus/PHY emulation with fixed speed/link PHYs"
|
||||
depends on PHYLIB=y
|
||||
--- a/drivers/net/phy/Makefile
|
||||
+++ b/drivers/net/phy/Makefile
|
||||
@@ -21,6 +21,7 @@ obj-$(CONFIG_REALTEK_PHY) += realtek.o
|
||||
obj-$(CONFIG_AR8216_PHY) += ar8216.o
|
||||
obj-$(CONFIG_RTL8306_PHY) += rtl8306.o
|
||||
obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o
|
||||
+obj-$(CONFIG_MICREL) += micrel.o
|
||||
obj-$(CONFIG_FIXED_PHY) += fixed.o
|
||||
obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
|
||||
obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o
|
|
@ -0,0 +1,19 @@
|
|||
--- a/drivers/mtd/devices/m25p80.c
|
||||
+++ b/drivers/mtd/devices/m25p80.c
|
||||
@@ -856,6 +856,16 @@ static int __devinit m25p_probe(struct s
|
||||
part_probes, &parts, 0);
|
||||
}
|
||||
|
||||
+#ifdef CONFIG_MTD_MYLOADER_PARTS
|
||||
+ if (nr_parts <= 0) {
|
||||
+ static const char *part_probes[]
|
||||
+ = { "MyLoader", NULL, };
|
||||
+
|
||||
+ nr_parts = parse_mtd_partitions(&flash->mtd,
|
||||
+ part_probes, &parts, 0);
|
||||
+ }
|
||||
+#endif
|
||||
+
|
||||
if (nr_parts <= 0 && data && data->parts) {
|
||||
parts = data->parts;
|
||||
nr_parts = data->nr_parts;
|
|
@ -0,0 +1,13 @@
|
|||
--- a/drivers/mtd/devices/m25p80.c
|
||||
+++ b/drivers/mtd/devices/m25p80.c
|
||||
@@ -626,6 +626,10 @@ static struct flash_info __devinitdata m
|
||||
{ "mx25l12805d", 0xc22018, 0, 64 * 1024, 256, },
|
||||
{ "mx25l12855e", 0xc22618, 0, 64 * 1024, 256, },
|
||||
|
||||
+ /* EON -- en25pxx */
|
||||
+ { "en25p32", 0x1c2016, 0, 64 * 1024, 64, },
|
||||
+ { "en25p64", 0x1c2017, 0, 64 * 1024, 128, },
|
||||
+
|
||||
/* PMC -- pm25x "blocks" are 32K, sectors are 4K */
|
||||
{ "pm25lv512", 0, 32 * 1024, 2, SECT_4K },
|
||||
{ "pm25lv010", 0, 32 * 1024, 4, SECT_4K },
|
|
@ -0,0 +1,18 @@
|
|||
--- a/drivers/mtd/devices/m25p80.c
|
||||
+++ b/drivers/mtd/devices/m25p80.c
|
||||
@@ -870,6 +870,15 @@ static int __devinit m25p_probe(struct s
|
||||
}
|
||||
#endif
|
||||
|
||||
+#ifdef CONFIG_MTD_REDBOOT_PARTS
|
||||
+ if (nr_parts <= 0) {
|
||||
+ static const char *part_probes[]
|
||||
+ = { "RedBoot", NULL, };
|
||||
+
|
||||
+ nr_parts = parse_mtd_partitions(&flash->mtd,
|
||||
+ part_probes, &parts, 0);
|
||||
+ }
|
||||
+#endif
|
||||
if (nr_parts <= 0 && data && data->parts) {
|
||||
parts = data->parts;
|
||||
nr_parts = data->nr_parts;
|
|
@ -0,0 +1,14 @@
|
|||
--- a/drivers/mtd/devices/m25p80.c
|
||||
+++ b/drivers/mtd/devices/m25p80.c
|
||||
@@ -630,6 +630,11 @@ static struct flash_info __devinitdata m
|
||||
{ "en25p32", 0x1c2016, 0, 64 * 1024, 64, },
|
||||
{ "en25p64", 0x1c2017, 0, 64 * 1024, 128, },
|
||||
|
||||
+ /* Macronix -- mx25lxxx */
|
||||
+ { "mx25l32", 0xc22016, 0, 64 * 1024, 64, },
|
||||
+ { "mx25l64", 0xc22017, 0, 64 * 1024, 128, },
|
||||
+ { "mx25l128", 0xc22018, 0, 64 * 1024, 256, },
|
||||
+
|
||||
/* PMC -- pm25x "blocks" are 32K, sectors are 4K */
|
||||
{ "pm25lv512", 0, 32 * 1024, 2, SECT_4K },
|
||||
{ "pm25lv010", 0, 32 * 1024, 4, SECT_4K },
|
|
@ -0,0 +1,14 @@
|
|||
--- a/drivers/mtd/devices/m25p80.c
|
||||
+++ b/drivers/mtd/devices/m25p80.c
|
||||
@@ -635,6 +635,11 @@ static struct flash_info __devinitdata m
|
||||
{ "mx25l64", 0xc22017, 0, 64 * 1024, 128, },
|
||||
{ "mx25l128", 0xc22018, 0, 64 * 1024, 256, },
|
||||
|
||||
+ /* Numonyx -- xxxs33b */
|
||||
+ { "160s33b", 0x898911, 0, 64 * 1024, 64, },
|
||||
+ { "320s33b", 0x898912, 0, 64 * 1024, 128, },
|
||||
+ { "640s33b", 0x898913, 0, 64 * 1024, 256, },
|
||||
+
|
||||
/* PMC -- pm25x "blocks" are 32K, sectors are 4K */
|
||||
{ "pm25lv512", 0, 32 * 1024, 2, SECT_4K },
|
||||
{ "pm25lv010", 0, 32 * 1024, 4, SECT_4K },
|
|
@ -0,0 +1,29 @@
|
|||
--- a/drivers/mtd/chips/jedec_probe.c
|
||||
+++ b/drivers/mtd/chips/jedec_probe.c
|
||||
@@ -166,6 +166,7 @@
|
||||
#define SST39LF160 0x2782
|
||||
#define SST39VF1601 0x234b
|
||||
#define SST39VF3201 0x235b
|
||||
+#define SST39VF6401B 0x236d
|
||||
#define SST39LF512 0x00D4
|
||||
#define SST39LF010 0x00D5
|
||||
#define SST39LF020 0x00D6
|
||||
@@ -1556,6 +1557,18 @@ static const struct amd_flash_info jedec
|
||||
ERASEINFO(0x10000,64),
|
||||
}
|
||||
}, {
|
||||
+ .mfr_id = MANUFACTURER_SST,
|
||||
+ .dev_id = SST39VF6401B,
|
||||
+ .name = "SST 39VF6401B",
|
||||
+ .devtypes = CFI_DEVICETYPE_X16,
|
||||
+ .uaddr = MTD_UADDR_0xAAAA_0x5555,
|
||||
+ .dev_size = SIZE_8MiB,
|
||||
+ .cmd_set = P_ID_AMD_STD,
|
||||
+ .nr_regions = 1,
|
||||
+ .regions = {
|
||||
+ ERASEINFO(0x10000,128)
|
||||
+ }
|
||||
+ }, {
|
||||
.mfr_id = MANUFACTURER_ST,
|
||||
.dev_id = M29F800AB,
|
||||
.name = "ST M29F800AB",
|
|
@ -0,0 +1,20 @@
|
|||
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
|
||||
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
|
||||
@@ -1568,7 +1568,7 @@ static int __xipram do_erase_chip(struct
|
||||
chip->erase_suspended = 0;
|
||||
}
|
||||
|
||||
- if (chip_ready(map, adr))
|
||||
+ if (chip_good(map, adr, map_word_ff(map)))
|
||||
break;
|
||||
|
||||
if (time_after(jiffies, timeo)) {
|
||||
@@ -1656,7 +1656,7 @@ static int __xipram do_erase_oneblock(st
|
||||
chip->erase_suspended = 0;
|
||||
}
|
||||
|
||||
- if (chip_ready(map, adr)) {
|
||||
+ if (chip_good(map, adr, map_word_ff(map))) {
|
||||
xip_enable(map, chip, adr);
|
||||
break;
|
||||
}
|
|
@ -0,0 +1,44 @@
|
|||
--- a/drivers/mtd/devices/m25p80.c
|
||||
+++ b/drivers/mtd/devices/m25p80.c
|
||||
@@ -889,6 +889,16 @@ static int __devinit m25p_probe(struct s
|
||||
part_probes, &parts, 0);
|
||||
}
|
||||
#endif
|
||||
+
|
||||
+#ifdef CONFIG_MTD_WRT160NL_PARTS
|
||||
+ if (nr_parts <= 0) {
|
||||
+ static const char *part_probes[]
|
||||
+ = { "wrt160nl", NULL, };
|
||||
+
|
||||
+ nr_parts = parse_mtd_partitions(&flash->mtd,
|
||||
+ part_probes, &parts, 0);
|
||||
+ }
|
||||
+#endif
|
||||
if (nr_parts <= 0 && data && data->parts) {
|
||||
parts = data->parts;
|
||||
nr_parts = data->nr_parts;
|
||||
--- a/drivers/mtd/Kconfig
|
||||
+++ b/drivers/mtd/Kconfig
|
||||
@@ -181,6 +181,12 @@ config MTD_AR7_PARTS
|
||||
---help---
|
||||
TI AR7 partitioning support
|
||||
|
||||
+config MTD_WRT160NL_PARTS
|
||||
+ tristate "Linksys WRT160NL partitioning support"
|
||||
+ depends on MTD_PARTITIONS && AR71XX_MACH_WRT160NL
|
||||
+ ---help---
|
||||
+ Linksys WRT160NL partitioning support
|
||||
+
|
||||
config MTD_MYLOADER_PARTS
|
||||
tristate "MyLoader partition parsing"
|
||||
depends on MTD_PARTITIONS && (ADM5120 || ATHEROS_AR231X || ATHEROS_AR71XX)
|
||||
--- a/drivers/mtd/Makefile
|
||||
+++ b/drivers/mtd/Makefile
|
||||
@@ -12,6 +12,7 @@ obj-$(CONFIG_MTD_REDBOOT_PARTS) += redbo
|
||||
obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
|
||||
obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
|
||||
obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o
|
||||
+obj-$(CONFIG_MTD_WRT160NL_PARTS) += wrt160nl_part.o
|
||||
obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o
|
||||
obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o
|
||||
|
|
@ -0,0 +1,22 @@
|
|||
--- a/drivers/usb/host/ehci-q.c
|
||||
+++ b/drivers/usb/host/ehci-q.c
|
||||
@@ -1167,6 +1167,9 @@ static void end_unlink_async (struct ehc
|
||||
ehci->reclaim = NULL;
|
||||
start_unlink_async (ehci, next);
|
||||
}
|
||||
+
|
||||
+ if (ehci->has_synopsys_hc_bug)
|
||||
+ writel((u32)ehci->async->qh_dma, &ehci->regs->async_next);
|
||||
}
|
||||
|
||||
/* makes sure the async qh will become idle */
|
||||
--- a/drivers/usb/host/ehci.h
|
||||
+++ b/drivers/usb/host/ehci.h
|
||||
@@ -129,6 +129,7 @@ struct ehci_hcd { /* one per controlle
|
||||
unsigned has_amcc_usb23:1;
|
||||
unsigned need_io_watchdog:1;
|
||||
unsigned broken_periodic:1;
|
||||
+ unsigned has_synopsys_hc_bug:1; /* Synopsys HC */
|
||||
|
||||
/* required for usb32 quirk */
|
||||
#define OHCI_CTRL_HCFS (3 << 6)
|
|
@ -0,0 +1,54 @@
|
|||
--- a/drivers/mtd/redboot.c
|
||||
+++ b/drivers/mtd/redboot.c
|
||||
@@ -60,31 +60,32 @@ static int parse_redboot_partitions(stru
|
||||
static char nullstring[] = "unallocated";
|
||||
#endif
|
||||
|
||||
+ buf = vmalloc(master->erasesize);
|
||||
+ if (!buf)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ restart:
|
||||
if ( directory < 0 ) {
|
||||
offset = master->size + directory * master->erasesize;
|
||||
- while (master->block_isbad &&
|
||||
+ while (master->block_isbad &&
|
||||
master->block_isbad(master, offset)) {
|
||||
if (!offset) {
|
||||
nogood:
|
||||
printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n");
|
||||
+ vfree(buf);
|
||||
return -EIO;
|
||||
}
|
||||
offset -= master->erasesize;
|
||||
}
|
||||
} else {
|
||||
offset = directory * master->erasesize;
|
||||
- while (master->block_isbad &&
|
||||
+ while (master->block_isbad &&
|
||||
master->block_isbad(master, offset)) {
|
||||
offset += master->erasesize;
|
||||
if (offset == master->size)
|
||||
goto nogood;
|
||||
}
|
||||
}
|
||||
- buf = vmalloc(master->erasesize);
|
||||
-
|
||||
- if (!buf)
|
||||
- return -ENOMEM;
|
||||
-
|
||||
printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n",
|
||||
master->name, offset);
|
||||
|
||||
@@ -156,6 +157,11 @@ static int parse_redboot_partitions(stru
|
||||
}
|
||||
if (i == numslots) {
|
||||
/* Didn't find it */
|
||||
+ if (offset + master->erasesize < master->size) {
|
||||
+ /* not at the end of the flash yet, maybe next block :) */
|
||||
+ directory++;
|
||||
+ goto restart;
|
||||
+ }
|
||||
printk(KERN_NOTICE "No RedBoot partition table detected in %s\n",
|
||||
master->name);
|
||||
ret = 0;
|
|
@ -0,0 +1,21 @@
|
|||
--- a/drivers/mtd/nand/Kconfig
|
||||
+++ b/drivers/mtd/nand/Kconfig
|
||||
@@ -482,4 +482,8 @@ config MTD_NAND_W90P910
|
||||
This enables the driver for the NAND Flash on evaluation board based
|
||||
on w90p910.
|
||||
|
||||
+config MTD_NAND_RB4XX
|
||||
+ tristate "NAND flash driver for RouterBoard 4xx series"
|
||||
+ depends on MTD_NAND && ATHEROS_AR71XX
|
||||
+
|
||||
endif # MTD_NAND
|
||||
--- a/drivers/mtd/nand/Makefile
|
||||
+++ b/drivers/mtd/nand/Makefile
|
||||
@@ -31,6 +31,7 @@ obj-$(CONFIG_MTD_NAND_BASLER_EXCITE) +=
|
||||
obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o
|
||||
obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o
|
||||
obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o
|
||||
+obj-$(CONFIG_MTD_NAND_RB4XX) += rb4xx_nand.o
|
||||
obj-$(CONFIG_MTD_ALAUDA) += alauda.o
|
||||
obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o
|
||||
obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o
|
|
@ -0,0 +1,27 @@
|
|||
--- a/drivers/spi/Makefile
|
||||
+++ b/drivers/spi/Makefile
|
||||
@@ -11,6 +11,7 @@ endif
|
||||
obj-$(CONFIG_SPI_MASTER) += spi.o
|
||||
|
||||
# SPI master controller drivers (bus)
|
||||
+obj-$(CONFIG_SPI_AP83) += ap83_spi.o
|
||||
obj-$(CONFIG_SPI_AR71XX) += ar71xx_spi.o
|
||||
obj-$(CONFIG_SPI_ATMEL) += atmel_spi.o
|
||||
obj-$(CONFIG_SPI_BFIN) += spi_bfin5xx.o
|
||||
--- a/drivers/spi/Kconfig
|
||||
+++ b/drivers/spi/Kconfig
|
||||
@@ -53,6 +53,14 @@ if SPI_MASTER
|
||||
|
||||
comment "SPI Master Controller Drivers"
|
||||
|
||||
+config SPI_AP83
|
||||
+ tristate "Atheros AP83 specific SPI Controller"
|
||||
+ depends on SPI_MASTER && AR71XX_MACH_AP83
|
||||
+ select SPI_BITBANG
|
||||
+ help
|
||||
+ This is a specific SPI controller driver for the Atheros AP83
|
||||
+ reference board.
|
||||
+
|
||||
config SPI_AR71XX
|
||||
tristate "Atheros AR71xx SPI Controller"
|
||||
depends on SPI_MASTER && ATHEROS_AR71XX
|
|
@ -0,0 +1,24 @@
|
|||
--- a/drivers/spi/Kconfig
|
||||
+++ b/drivers/spi/Kconfig
|
||||
@@ -296,6 +296,11 @@ config SPI_TLE62X0
|
||||
sysfs interface, with each line presented as a kind of GPIO
|
||||
exposing both switch control and diagnostic feedback.
|
||||
|
||||
+config SPI_VSC7385
|
||||
+ tristate "Vitesse VSC7385 ethernet switch driver"
|
||||
+ help
|
||||
+ SPI driver for the Vitesse VSC7385 ethernet switch.
|
||||
+
|
||||
#
|
||||
# Add new SPI protocol masters in alphabetical order above this line
|
||||
#
|
||||
--- a/drivers/spi/Makefile
|
||||
+++ b/drivers/spi/Makefile
|
||||
@@ -40,6 +40,7 @@ obj-$(CONFIG_SPI_STMP3XXX) += spi_stmp.
|
||||
|
||||
# SPI protocol drivers (device/link on bus)
|
||||
obj-$(CONFIG_SPI_SPIDEV) += spidev.o
|
||||
+obj-$(CONFIG_SPI_VSC7385) += spi_vsc7385.o
|
||||
obj-$(CONFIG_SPI_TLE62X0) += tle62x0.o
|
||||
# ... add above this line ...
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
--- a/drivers/spi/Kconfig
|
||||
+++ b/drivers/spi/Kconfig
|
||||
@@ -68,6 +68,14 @@ config SPI_AR71XX
|
||||
help
|
||||
This is the SPI contoller driver for Atheros AR71xx.
|
||||
|
||||
+config SPI_PB44
|
||||
+ tristate "Atheros PB44 board specific SPI controller"
|
||||
+ depends on SPI_MASTER && AR71XX_MACH_PB44
|
||||
+ select SPI_BITBANG
|
||||
+ help
|
||||
+ This is a specific SPI controller driver for the Atheros PB44
|
||||
+ reference board.
|
||||
+
|
||||
config SPI_ATMEL
|
||||
tristate "Atmel SPI Controller"
|
||||
depends on (ARCH_AT91 || AVR32)
|
||||
--- a/drivers/spi/Makefile
|
||||
+++ b/drivers/spi/Makefile
|
||||
@@ -22,6 +22,7 @@ obj-$(CONFIG_SPI_GPIO) += spi_gpio.o
|
||||
obj-$(CONFIG_SPI_GPIO_OLD) += spi_gpio_old.o
|
||||
obj-$(CONFIG_SPI_IMX) += spi_imx.o
|
||||
obj-$(CONFIG_SPI_LM70_LLP) += spi_lm70llp.o
|
||||
+obj-$(CONFIG_SPI_PB44) += pb44_spi.o
|
||||
obj-$(CONFIG_SPI_PXA2XX) += pxa2xx_spi.o
|
||||
obj-$(CONFIG_SPI_OMAP_UWIRE) += omap_uwire.o
|
||||
obj-$(CONFIG_SPI_OMAP24XX) += omap2_mcspi.o
|
|
@ -0,0 +1,22 @@
|
|||
--- a/arch/mips/Makefile
|
||||
+++ b/arch/mips/Makefile
|
||||
@@ -169,6 +169,7 @@ endif
|
||||
#
|
||||
libs-$(CONFIG_ARC) += arch/mips/fw/arc/
|
||||
libs-$(CONFIG_CFE) += arch/mips/fw/cfe/
|
||||
+libs-$(CONFIG_MYLOADER) += arch/mips/fw/myloader/
|
||||
libs-$(CONFIG_SNIPROM) += arch/mips/fw/sni/
|
||||
libs-y += arch/mips/fw/lib/
|
||||
|
||||
--- a/arch/mips/Kconfig
|
||||
+++ b/arch/mips/Kconfig
|
||||
@@ -880,6 +880,9 @@ config MIPS_NILE4
|
||||
config MIPS_DISABLE_OBSOLETE_IDE
|
||||
bool
|
||||
|
||||
+config MYLOADER
|
||||
+ bool
|
||||
+
|
||||
config SYNC_R4K
|
||||
bool
|
||||
|
|
@ -0,0 +1,38 @@
|
|||
--- a/drivers/net/ag71xx/ag71xx_main.c
|
||||
+++ b/drivers/net/ag71xx/ag71xx_main.c
|
||||
@@ -593,7 +593,7 @@ static void ag71xx_oom_timer_handler(uns
|
||||
struct net_device *dev = (struct net_device *) data;
|
||||
struct ag71xx *ag = netdev_priv(dev);
|
||||
|
||||
- netif_rx_schedule(dev, &ag->napi);
|
||||
+ netif_rx_schedule(&ag->napi);
|
||||
}
|
||||
|
||||
static void ag71xx_tx_timeout(struct net_device *dev)
|
||||
@@ -749,7 +749,7 @@ static int ag71xx_poll(struct napi_struc
|
||||
DBG("%s: disable polling mode, done=%d, limit=%d\n",
|
||||
dev->name, done, limit);
|
||||
|
||||
- netif_rx_complete(dev, napi);
|
||||
+ netif_rx_complete(napi);
|
||||
|
||||
/* enable interrupts */
|
||||
spin_lock_irqsave(&ag->lock, flags);
|
||||
@@ -768,7 +768,7 @@ static int ag71xx_poll(struct napi_struc
|
||||
printk(KERN_DEBUG "%s: out of memory\n", dev->name);
|
||||
|
||||
mod_timer(&ag->oom_timer, jiffies + AG71XX_OOM_REFILL);
|
||||
- netif_rx_complete(dev, napi);
|
||||
+ netif_rx_complete(napi);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -798,7 +798,7 @@ static irqreturn_t ag71xx_interrupt(int
|
||||
if (likely(status & AG71XX_INT_POLL)) {
|
||||
ag71xx_int_disable(ag, AG71XX_INT_POLL);
|
||||
DBG("%s: enable polling mode\n", dev->name);
|
||||
- netif_rx_schedule(dev, &ag->napi);
|
||||
+ netif_rx_schedule(&ag->napi);
|
||||
}
|
||||
|
||||
return IRQ_HANDLED;
|
|
@ -0,0 +1,38 @@
|
|||
--- a/drivers/net/ag71xx/ag71xx_main.c
|
||||
+++ b/drivers/net/ag71xx/ag71xx_main.c
|
||||
@@ -593,7 +593,7 @@ static void ag71xx_oom_timer_handler(uns
|
||||
struct net_device *dev = (struct net_device *) data;
|
||||
struct ag71xx *ag = netdev_priv(dev);
|
||||
|
||||
- netif_rx_schedule(&ag->napi);
|
||||
+ napi_schedule(&ag->napi);
|
||||
}
|
||||
|
||||
static void ag71xx_tx_timeout(struct net_device *dev)
|
||||
@@ -749,7 +749,7 @@ static int ag71xx_poll(struct napi_struc
|
||||
DBG("%s: disable polling mode, done=%d, limit=%d\n",
|
||||
dev->name, done, limit);
|
||||
|
||||
- netif_rx_complete(napi);
|
||||
+ napi_complete(napi);
|
||||
|
||||
/* enable interrupts */
|
||||
spin_lock_irqsave(&ag->lock, flags);
|
||||
@@ -768,7 +768,7 @@ static int ag71xx_poll(struct napi_struc
|
||||
printk(KERN_DEBUG "%s: out of memory\n", dev->name);
|
||||
|
||||
mod_timer(&ag->oom_timer, jiffies + AG71XX_OOM_REFILL);
|
||||
- netif_rx_complete(napi);
|
||||
+ napi_complete(napi);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -798,7 +798,7 @@ static irqreturn_t ag71xx_interrupt(int
|
||||
if (likely(status & AG71XX_INT_POLL)) {
|
||||
ag71xx_int_disable(ag, AG71XX_INT_POLL);
|
||||
DBG("%s: enable polling mode\n", dev->name);
|
||||
- netif_rx_schedule(&ag->napi);
|
||||
+ napi_schedule(&ag->napi);
|
||||
}
|
||||
|
||||
return IRQ_HANDLED;
|
|
@ -0,0 +1,37 @@
|
|||
--- a/drivers/net/ag71xx/ag71xx_main.c
|
||||
+++ b/drivers/net/ag71xx/ag71xx_main.c
|
||||
@@ -809,6 +809,18 @@ static void ag71xx_set_multicast_list(st
|
||||
/* TODO */
|
||||
}
|
||||
|
||||
+static const struct net_device_ops ag71xx_netdev_ops = {
|
||||
+ .ndo_open = ag71xx_open,
|
||||
+ .ndo_stop = ag71xx_stop,
|
||||
+ .ndo_start_xmit = ag71xx_hard_start_xmit,
|
||||
+ .ndo_set_multicast_list = ag71xx_set_multicast_list,
|
||||
+ .ndo_do_ioctl = ag71xx_do_ioctl,
|
||||
+ .ndo_tx_timeout = ag71xx_tx_timeout,
|
||||
+ .ndo_change_mtu = eth_change_mtu,
|
||||
+ .ndo_set_mac_address = eth_mac_addr,
|
||||
+ .ndo_validate_addr = eth_validate_addr,
|
||||
+};
|
||||
+
|
||||
static int __init ag71xx_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct net_device *dev;
|
||||
@@ -884,14 +896,9 @@ static int __init ag71xx_probe(struct pl
|
||||
}
|
||||
|
||||
dev->base_addr = (unsigned long)ag->mac_base;
|
||||
- dev->open = ag71xx_open;
|
||||
- dev->stop = ag71xx_stop;
|
||||
- dev->hard_start_xmit = ag71xx_hard_start_xmit;
|
||||
- dev->set_multicast_list = ag71xx_set_multicast_list;
|
||||
- dev->do_ioctl = ag71xx_do_ioctl;
|
||||
+ dev->netdev_ops = &ag71xx_netdev_ops;
|
||||
dev->ethtool_ops = &ag71xx_ethtool_ops;
|
||||
|
||||
- dev->tx_timeout = ag71xx_tx_timeout;
|
||||
INIT_WORK(&ag->restart_work, ag71xx_restart_work_func);
|
||||
|
||||
init_timer(&ag->oom_timer);
|
|
@ -0,0 +1,46 @@
|
|||
--- a/arch/mips/ar71xx/devices.c
|
||||
+++ b/arch/mips/ar71xx/devices.c
|
||||
@@ -825,6 +825,8 @@ static struct platform_device ar71xx_dsa
|
||||
void __init ar71xx_add_device_dsa(unsigned int id,
|
||||
struct dsa_platform_data *d)
|
||||
{
|
||||
+ int i;
|
||||
+
|
||||
switch (id) {
|
||||
case 0:
|
||||
d->netdev = &ar71xx_eth0_device.dev;
|
||||
@@ -838,7 +840,10 @@ void __init ar71xx_add_device_dsa(unsign
|
||||
id);
|
||||
return;
|
||||
}
|
||||
- d->mii_bus = &ar71xx_mdio_device.dev;
|
||||
+
|
||||
+ for (i = 0; i < d->nr_chips; i++)
|
||||
+ d->chip[i].mii_bus = &ar71xx_mdio_device.dev;
|
||||
+
|
||||
ar71xx_dsa_switch_device.dev.platform_data = d;
|
||||
|
||||
platform_device_register(&ar71xx_dsa_switch_device);
|
||||
--- a/arch/mips/ar71xx/mach-tl-wr941nd.c
|
||||
+++ b/arch/mips/ar71xx/mach-tl-wr941nd.c
|
||||
@@ -104,7 +104,7 @@ static struct gpio_button tl_wr941nd_gpi
|
||||
}
|
||||
};
|
||||
|
||||
-static struct dsa_platform_data tl_wr941nd_dsa_data = {
|
||||
+static struct dsa_chip_data tl_wr941nd_dsa_chip = {
|
||||
.port_names[0] = "wan",
|
||||
.port_names[1] = "lan1",
|
||||
.port_names[2] = "lan2",
|
||||
@@ -113,6 +113,11 @@ static struct dsa_platform_data tl_wr941
|
||||
.port_names[5] = "cpu",
|
||||
};
|
||||
|
||||
+static struct dsa_platform_data tl_wr941nd_dsa_data = {
|
||||
+ .nr_chips = 1,
|
||||
+ .chip = &tl_wr941nd_dsa_chip,
|
||||
+};
|
||||
+
|
||||
static void __init tl_wr941nd_setup(void)
|
||||
{
|
||||
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
|
|
@ -0,0 +1,29 @@
|
|||
--- a/arch/mips/kernel/traps.c
|
||||
+++ b/arch/mips/kernel/traps.c
|
||||
@@ -48,6 +48,7 @@
|
||||
#include <asm/types.h>
|
||||
#include <asm/stacktrace.h>
|
||||
#include <asm/irq.h>
|
||||
+#include <asm/time.h>
|
||||
|
||||
extern void check_wait(void);
|
||||
extern asmlinkage void r4k_wait(void);
|
||||
@@ -1537,6 +1538,8 @@ void __cpuinit per_cpu_trap_init(void)
|
||||
*/
|
||||
if (cpu_has_mips_r2) {
|
||||
cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
|
||||
+ if (get_c0_compare_irq)
|
||||
+ cp0_compare_irq = get_c0_compare_irq();
|
||||
cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
|
||||
if (cp0_perfcount_irq == cp0_compare_irq)
|
||||
cp0_perfcount_irq = -1;
|
||||
--- a/arch/mips/include/asm/time.h
|
||||
+++ b/arch/mips/include/asm/time.h
|
||||
@@ -52,6 +52,7 @@ extern int (*perf_irq)(void);
|
||||
*/
|
||||
#ifdef CONFIG_CEVT_R4K_LIB
|
||||
extern unsigned int __weak get_c0_compare_int(void);
|
||||
+extern unsigned int __weak get_c0_compare_irq(void);
|
||||
extern int r4k_clockevent_init(void);
|
||||
#endif
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
--- a/arch/mips/kernel/cevt-r4k.c
|
||||
+++ b/arch/mips/kernel/cevt-r4k.c
|
||||
@@ -16,6 +16,22 @@
|
||||
#include <asm/cevt-r4k.h>
|
||||
|
||||
/*
|
||||
+ * Compare interrupt can be routed and latched outside the core,
|
||||
+ * so a single execution hazard barrier may not be enough to give
|
||||
+ * it time to clear as seen in the Cause register. 4 time the
|
||||
+ * pipeline depth seems reasonably conservative, and empirically
|
||||
+ * works better in configurations with high CPU/bus clock ratios.
|
||||
+ */
|
||||
+
|
||||
+#define compare_change_hazard() \
|
||||
+ do { \
|
||||
+ irq_disable_hazard(); \
|
||||
+ irq_disable_hazard(); \
|
||||
+ irq_disable_hazard(); \
|
||||
+ irq_disable_hazard(); \
|
||||
+ } while (0)
|
||||
+
|
||||
+/*
|
||||
* The SMTC Kernel for the 34K, 1004K, et. al. replaces several
|
||||
* of these routines with SMTC-specific variants.
|
||||
*/
|
||||
@@ -31,6 +47,7 @@ static int mips_next_event(unsigned long
|
||||
cnt = read_c0_count();
|
||||
cnt += delta;
|
||||
write_c0_compare(cnt);
|
||||
+ compare_change_hazard();
|
||||
res = ((int)(read_c0_count() - cnt) > 0) ? -ETIME : 0;
|
||||
return res;
|
||||
}
|
||||
@@ -100,22 +117,6 @@ static int c0_compare_int_pending(void)
|
||||
return (read_c0_cause() >> cp0_compare_irq) & 0x100;
|
||||
}
|
||||
|
||||
-/*
|
||||
- * Compare interrupt can be routed and latched outside the core,
|
||||
- * so a single execution hazard barrier may not be enough to give
|
||||
- * it time to clear as seen in the Cause register. 4 time the
|
||||
- * pipeline depth seems reasonably conservative, and empirically
|
||||
- * works better in configurations with high CPU/bus clock ratios.
|
||||
- */
|
||||
-
|
||||
-#define compare_change_hazard() \
|
||||
- do { \
|
||||
- irq_disable_hazard(); \
|
||||
- irq_disable_hazard(); \
|
||||
- irq_disable_hazard(); \
|
||||
- irq_disable_hazard(); \
|
||||
- } while (0)
|
||||
-
|
||||
int c0_compare_int_usable(void)
|
||||
{
|
||||
unsigned int delta;
|
|
@ -0,0 +1,257 @@
|
|||
--- a/drivers/net/phy/ar8216.c
|
||||
+++ b/drivers/net/phy/ar8216.c
|
||||
@@ -563,10 +563,227 @@ ar8216_config_aneg(struct phy_device *ph
|
||||
return 0;
|
||||
}
|
||||
|
||||
+#define ar8216_dbg(fmt, args...) printk(KERN_DEBUG "ar8216: " fmt, ## args)
|
||||
+
|
||||
+static inline const char *ctrl_state_str(u32 ctrl)
|
||||
+{
|
||||
+ switch (ctrl & AR8216_PORT_CTRL_STATE) {
|
||||
+ case AR8216_PORT_STATE_DISABLED:
|
||||
+ return "disabled";
|
||||
+ case AR8216_PORT_STATE_BLOCK:
|
||||
+ return "block";
|
||||
+ case AR8216_PORT_STATE_LISTEN:
|
||||
+ return "listen";
|
||||
+ case AR8216_PORT_STATE_LEARN:
|
||||
+ return "learn";
|
||||
+ case AR8216_PORT_STATE_FORWARD:
|
||||
+ return "forward";
|
||||
+ default:
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ return "????";
|
||||
+}
|
||||
+
|
||||
+static inline const char *ctrl_vlanmode_str(u32 ctrl)
|
||||
+{
|
||||
+ u32 vlan_mode;
|
||||
+
|
||||
+ vlan_mode = (ctrl & AR8216_PORT_CTRL_VLAN_MODE) >>
|
||||
+ AR8216_PORT_CTRL_VLAN_MODE_S;
|
||||
+ switch (vlan_mode) {
|
||||
+ case AR8216_OUT_KEEP:
|
||||
+ return "keep";
|
||||
+ case AR8216_OUT_STRIP_VLAN:
|
||||
+ return "strip vlan";
|
||||
+ case AR8216_OUT_ADD_VLAN:
|
||||
+ return "add_vlan";
|
||||
+ default:
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ return "????";
|
||||
+}
|
||||
+
|
||||
+static inline const char *vlan_vlanmode_str(u32 vlan)
|
||||
+{
|
||||
+ u32 vlan_mode;
|
||||
+
|
||||
+ vlan_mode = (vlan & AR8216_PORT_VLAN_MODE) >>
|
||||
+ AR8216_PORT_VLAN_MODE_S;
|
||||
+ switch (vlan_mode) {
|
||||
+ case AR8216_IN_PORT_ONLY:
|
||||
+ return "port only";
|
||||
+ case AR8216_IN_PORT_FALLBACK:
|
||||
+ return "port fallback";
|
||||
+ case AR8216_IN_VLAN_ONLY:
|
||||
+ return "VLAN only";
|
||||
+ case AR8216_IN_SECURE:
|
||||
+ return "secure";
|
||||
+ default:
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ return "????";
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+ar8216_dump_regs(struct ar8216_priv *ap)
|
||||
+{
|
||||
+ unsigned int i;
|
||||
+ u32 t;
|
||||
+
|
||||
+ t = ar8216_mii_read(ap, AR8216_REG_CTRL);
|
||||
+ ar8216_dbg("CTRL\t\t: %08x\n", t);
|
||||
+ ar8216_dbg(" version\t: %u\n", (t & 0xff00) >> 8);
|
||||
+ ar8216_dbg(" revision\t: %u\n", (t & 0xff));
|
||||
+
|
||||
+ ar8216_dbg("POWER_ON\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x04));
|
||||
+ ar8216_dbg("INT\t\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x10));
|
||||
+ ar8216_dbg("INT_MASK\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x14));
|
||||
+ ar8216_dbg("MAC_ADDR0\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x20));
|
||||
+ ar8216_dbg("MAC_ADDR1\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x24));
|
||||
+ ar8216_dbg("FLOOD_MASK\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x2c));
|
||||
+
|
||||
+ t = ar8216_mii_read(ap, AR8216_REG_GLOBAL_CTRL);
|
||||
+ ar8216_dbg("GLOBAL_CTRL\t: %08x\n", t);
|
||||
+ ar8216_dbg(" mtu\t\t: %lu\n", t & AR8216_GCTRL_MTU);
|
||||
+
|
||||
+ ar8216_dbg("FLOW_CONTROL0\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x34));
|
||||
+ ar8216_dbg("FLOW_CONTROL1\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x38));
|
||||
+ ar8216_dbg("QM_CONTROL\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x3c));
|
||||
+ ar8216_dbg("VLAN_TABLE0\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, AR8216_REG_VTU));
|
||||
+ ar8216_dbg("VLAN_TABLE1\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, AR8216_REG_VTU_DATA));
|
||||
+ ar8216_dbg("ADDR_TABLE0\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, AR8216_REG_ATU));
|
||||
+ ar8216_dbg("ADDR_TABLE1\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, AR8216_REG_ATU_DATA));
|
||||
+ ar8216_dbg("ADDR_TABLE2\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x58));
|
||||
+ ar8216_dbg("ADDR_CTRL\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x5c));
|
||||
+ ar8216_dbg("IP_PRIO0\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x60));
|
||||
+ ar8216_dbg("IP_PRIO1\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x64));
|
||||
+ ar8216_dbg("IP_PRIO2\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x68));
|
||||
+ ar8216_dbg("IP_PRIO3\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x6c));
|
||||
+ ar8216_dbg("TAG_PRIO\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x70));
|
||||
+ ar8216_dbg("SERVICE_TAG\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x74));
|
||||
+ ar8216_dbg("CPU_PORT\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x78));
|
||||
+ ar8216_dbg("MIB_FUNC\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x80));
|
||||
+ ar8216_dbg("MDIO\t\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0x98));
|
||||
+ ar8216_dbg("LED0\t\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0xb0));
|
||||
+ ar8216_dbg("LED1\t\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0xb4));
|
||||
+ ar8216_dbg("LED2\t\t: %08x\n",
|
||||
+ ar8216_mii_read(ap, 0xb8));
|
||||
+
|
||||
+ for (i = 0; i < 6; i++) {
|
||||
+ u32 reg = 0x100 * (i + 1);
|
||||
+
|
||||
+ t = ar8216_mii_read(ap, AR8216_REG_PORT_STATUS(i));
|
||||
+ ar8216_dbg("PORT%d_STATUS\t: %08x\n", i, t);
|
||||
+ ar8216_dbg(" speed\t\t: %s\n",
|
||||
+ (t & AR8216_PORT_STATUS_SPEED) ? "100" : "10");
|
||||
+ ar8216_dbg(" speed error\t: %s\n",
|
||||
+ (t & AR8216_PORT_STATUS_SPEED_ERR) ? "yes" : "no");
|
||||
+ ar8216_dbg(" txmac\t\t: %d\n",
|
||||
+ (t & AR8216_PORT_STATUS_TXMAC) ? 1 : 0);
|
||||
+ ar8216_dbg(" rxmac\t\t: %d\n",
|
||||
+ (t & AR8216_PORT_STATUS_RXMAC) ? 1 : 0);
|
||||
+ ar8216_dbg(" tx_flow\t: %s\n",
|
||||
+ (t & AR8216_PORT_STATUS_TXFLOW) ? "on" : "off");
|
||||
+ ar8216_dbg(" rx_flow\t: %s\n",
|
||||
+ (t & AR8216_PORT_STATUS_RXFLOW) ? "on" : "off");
|
||||
+ ar8216_dbg(" duplex\t: %s\n",
|
||||
+ (t & AR8216_PORT_STATUS_DUPLEX) ? "full" : "half");
|
||||
+ ar8216_dbg(" link\t\t: %s\n",
|
||||
+ (t & AR8216_PORT_STATUS_LINK_UP) ? "up" : "down");
|
||||
+ ar8216_dbg(" auto\t\t: %s\n",
|
||||
+ (t & AR8216_PORT_STATUS_LINK_AUTO) ? "on" : "off");
|
||||
+ ar8216_dbg(" pause\t\t: %s\n",
|
||||
+ (t & AR8216_PORT_STATUS_LINK_PAUSE) ? "on" : "off");
|
||||
+
|
||||
+ t = ar8216_mii_read(ap, AR8216_REG_PORT_CTRL(i));
|
||||
+ ar8216_dbg("PORT%d_CTRL\t: %08x\n", i, t);
|
||||
+ ar8216_dbg(" state\t\t: %s\n", ctrl_state_str(t));
|
||||
+ ar8216_dbg(" learn lock\t: %s\n",
|
||||
+ (t & AR8216_PORT_CTRL_LEARN_LOCK) ? "on" : "off");
|
||||
+ ar8216_dbg(" vlan_mode\t: %s\n", ctrl_vlanmode_str(t));
|
||||
+ ar8216_dbg(" igmp_snoop\t: %s\n",
|
||||
+ (t & AR8216_PORT_CTRL_IGMP_SNOOP) ? "on" : "off");
|
||||
+ ar8216_dbg(" header\t: %s\n",
|
||||
+ (t & AR8216_PORT_CTRL_HEADER) ? "on" : "off");
|
||||
+ ar8216_dbg(" mac_loop\t: %s\n",
|
||||
+ (t & AR8216_PORT_CTRL_MAC_LOOP) ? "on" : "off");
|
||||
+ ar8216_dbg(" single_vlan\t: %s\n",
|
||||
+ (t & AR8216_PORT_CTRL_SINGLE_VLAN) ? "on" : "off");
|
||||
+ ar8216_dbg(" mirror tx\t: %s\n",
|
||||
+ (t & AR8216_PORT_CTRL_MIRROR_TX) ? "on" : "off");
|
||||
+ ar8216_dbg(" mirror rx\t: %s\n",
|
||||
+ (t & AR8216_PORT_CTRL_MIRROR_RX) ? "on" : "off");
|
||||
+
|
||||
+ t = ar8216_mii_read(ap, AR8216_REG_PORT_VLAN(i));
|
||||
+ ar8216_dbg("PORT%d_VLAN\t: %08x\n", i, t);
|
||||
+ ar8216_dbg(" default id\t: %lu\n",
|
||||
+ (t & AR8216_PORT_VLAN_DEFAULT_ID));
|
||||
+ ar8216_dbg(" dest ports\t: %s%s%s%s%s%s\n",
|
||||
+ (t & 0x010000) ? "0 " : "",
|
||||
+ (t & 0x020000) ? "1 " : "",
|
||||
+ (t & 0x040000) ? "2 " : "",
|
||||
+ (t & 0x080000) ? "3 " : "",
|
||||
+ (t & 0x100000) ? "4 " : "",
|
||||
+ (t & 0x200000) ? "5 " : "");
|
||||
+ ar8216_dbg(" tx priority\t: %s\n",
|
||||
+ (t & AR8216_PORT_VLAN_TX_PRIO) ? "on" : "off");
|
||||
+ ar8216_dbg(" port priority\t: %lu\n",
|
||||
+ (t & AR8216_PORT_VLAN_PRIORITY) >>
|
||||
+ AR8216_PORT_VLAN_PRIORITY_S);
|
||||
+ ar8216_dbg(" ingress mode\t: %s\n", vlan_vlanmode_str(t));
|
||||
+
|
||||
+ t = ar8216_mii_read(ap, AR8216_REG_PORT_RATE(i));
|
||||
+ ar8216_dbg("PORT%d_RATE0\t: %08x\n", i, t);
|
||||
+
|
||||
+ ar8216_dbg("PORT%d_PRIO\t: %08x\n", i,
|
||||
+ ar8216_mii_read(ap, AR8216_REG_PORT_PRIO(i)));
|
||||
+ ar8216_dbg("PORT%d_STORM\t: %08x\n", i,
|
||||
+ ar8216_mii_read(ap, reg + 0x14));
|
||||
+ ar8216_dbg("PORT%d_QUEUE\t: %08x\n", i,
|
||||
+ ar8216_mii_read(ap, reg + 0x18));
|
||||
+ ar8216_dbg("PORT%d_RATE1\t: %08x\n", i,
|
||||
+ ar8216_mii_read(ap, reg + 0x1c));
|
||||
+ ar8216_dbg("PORT%d_RATE2\t: %08x\n", i,
|
||||
+ ar8216_mii_read(ap, reg + 0x20));
|
||||
+ ar8216_dbg("PORT%d_RATE3\t: %08x\n", i,
|
||||
+ ar8216_mii_read(ap, reg + 0x24));
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
static int
|
||||
ar8216_probe(struct phy_device *pdev)
|
||||
{
|
||||
struct ar8216_priv priv;
|
||||
+ static int regs_dumped;
|
||||
|
||||
u8 id, rev;
|
||||
u32 val;
|
||||
@@ -575,9 +792,14 @@ ar8216_probe(struct phy_device *pdev)
|
||||
val = ar8216_mii_read(&priv, AR8216_REG_CTRL);
|
||||
rev = val & 0xff;
|
||||
id = (val >> 8) & 0xff;
|
||||
- if ((id != 1) || (rev != 1))
|
||||
+ if ((id != 1) || (rev != 1 && rev != 2))
|
||||
return -ENODEV;
|
||||
|
||||
+ if (!regs_dumped) {
|
||||
+ ar8216_dump_regs(&priv);
|
||||
+ regs_dumped++;
|
||||
+ }
|
||||
+
|
||||
return 0;
|
||||
}
|
||||
|
||||
--- a/drivers/net/phy/ar8216.h
|
||||
+++ b/drivers/net/phy/ar8216.h
|
||||
@@ -27,7 +27,7 @@
|
||||
#define AR8216_CTRL_RESET BIT(31)
|
||||
|
||||
#define AR8216_REG_GLOBAL_CTRL 0x0030
|
||||
-#define AR8216_GCTRL_MTU BITS(0, 10)
|
||||
+#define AR8216_GCTRL_MTU BITS(0, 12)
|
||||
|
||||
#define AR8216_REG_VTU 0x0040
|
||||
#define AR8216_VTU_OP BITS(0, 3)
|
Loading…
Reference in a new issue