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ramips: re-implement PCI mux

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Parallel flash access on RT3662/RT3883 based devices
is broken without that. It was fixed already some time
ago, but that change seems lost somewhere.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

SVN-Revision: 37708
This commit is contained in:
Gabor Juhos 2013-08-05 12:49:19 +00:00
parent c80dd34924
commit 9257d556c2
1 changed files with 17 additions and 2 deletions
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19
target/linux/ramips/patches-3.10/0002-MIPS-ralink-add-pinmux-driver.patch
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@ -49,7 +49,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
--- /dev/null --- /dev/null
+++ b/arch/mips/ralink/pinmux.c +++ b/arch/mips/ralink/pinmux.c
@@ -0,0 +1,77 @@ @@ -0,0 +1,92 @@
+/* +/*
+ * This program is free software; you can redistribute it and/or modify it + * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published + * under the terms of the GNU General Public License version 2 as published
@ -83,7 +83,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+ const __be32 *wdt; + const __be32 *wdt;
+ struct device_node *np; + struct device_node *np;
+ struct property *prop; + struct property *prop;
+ const char *uart, *pin; + const char *uart, *pci, *pin;
+ u32 mode = 0; + u32 mode = 0;
+ int m; + int m;
+ +
@ -125,5 +125,20 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+ if (wdt && *wdt && rt_gpio_pinmux.wdt_reset) + if (wdt && *wdt && rt_gpio_pinmux.wdt_reset)
+ rt_gpio_pinmux.wdt_reset(); + rt_gpio_pinmux.wdt_reset();
+ +
+ pci = NULL;
+ if (rt_gpio_pinmux.pci)
+ of_property_read_string(np, "ralink,pcimux", &pci);
+
+ if (pci) {
+ mode &= ~(rt_gpio_pinmux.pci_mask << rt_gpio_pinmux.pci_shift);
+ if (ralink_mux_mask(pci, rt_gpio_pinmux.pci, &m)) {
+ mode |= rt_gpio_pinmux.pci_mask << rt_gpio_pinmux.pci_shift;
+ pr_debug("pinmux: failed to load pcimux \"%s\"\n", pci);
+ } else {
+ mode |= m << rt_gpio_pinmux.pci_shift;
+ pr_debug("pinmux: registered pcimux \"%s\"\n", pci);
+ }
+ }
+
+ rt_sysc_w32(mode, SYSC_REG_GPIO_MODE); + rt_sysc_w32(mode, SYSC_REG_GPIO_MODE);
+} +}