fix up the rt2880 patches
Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 36326
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2 changed files with 64 additions and 14 deletions
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@ -1,7 +1,7 @@
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From f63a0ea6c115e7b78bce70d78aaa813615e3d434 Mon Sep 17 00:00:00 2001
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From c4429f19cc66951962c171dba90b8747f95a654e Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Sun, 27 Jan 2013 09:17:20 +0100
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Subject: [PATCH 107/121] MIPS: ralink: adds support for RT2880 SoC family
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Subject: [PATCH V2 09/16] MIPS: ralink: adds support for RT2880 SoC family
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Add support code for rt2880 SOC.
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@ -14,14 +14,16 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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arch/mips/ralink/Kconfig | 3 +
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arch/mips/ralink/Makefile | 1 +
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arch/mips/ralink/Platform | 5 +
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arch/mips/ralink/rt288x.c | 141 ++++++++++++++++++++++++++++
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6 files changed, 200 insertions(+), 1 deletion(-)
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arch/mips/ralink/rt288x.c | 143 ++++++++++++++++++++++++++++
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6 files changed, 202 insertions(+), 1 deletion(-)
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create mode 100644 arch/mips/include/asm/mach-ralink/rt288x.h
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create mode 100644 arch/mips/ralink/rt288x.c
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diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
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index 27a4bfa..c1997db 100644
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--- a/arch/mips/Kconfig
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+++ b/arch/mips/Kconfig
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@@ -1189,7 +1189,7 @@ config BOOT_ELF32
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@@ -1144,7 +1144,7 @@ config BOOT_ELF32
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config MIPS_L1_CACHE_SHIFT
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int
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@ -30,6 +32,9 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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default "6" if MIPS_CPU_SCACHE
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default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || CPU_CAVIUM_OCTEON
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default "5"
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diff --git a/arch/mips/include/asm/mach-ralink/rt288x.h b/arch/mips/include/asm/mach-ralink/rt288x.h
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new file mode 100644
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index 0000000..ad8b42d
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--- /dev/null
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+++ b/arch/mips/include/asm/mach-ralink/rt288x.h
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@@ -0,0 +1,49 @@
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@ -82,6 +87,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+#define CLKCFG_SRAM_CS_N_WDT BIT(9)
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+
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+#endif
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diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
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index a0b0197..6723b94 100644
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--- a/arch/mips/ralink/Kconfig
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+++ b/arch/mips/ralink/Kconfig
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@@ -6,6 +6,9 @@ choice
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@ -94,19 +101,23 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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config SOC_RT305X
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bool "RT305x"
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select USB_ARCH_HAS_HCD
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diff --git a/arch/mips/ralink/Makefile b/arch/mips/ralink/Makefile
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index 939757f..6d826f2 100644
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--- a/arch/mips/ralink/Makefile
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+++ b/arch/mips/ralink/Makefile
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@@ -8,6 +8,7 @@
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obj-y := prom.o of.o reset.o clk.o irq.o pinmux.o
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obj-y := prom.o of.o reset.o clk.o irq.o
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+obj-$(CONFIG_SOC_RT288X) += rt288x.o
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obj-$(CONFIG_SOC_RT305X) += rt305x.o
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obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
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diff --git a/arch/mips/ralink/Platform b/arch/mips/ralink/Platform
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index 6babd65..3f49e51 100644
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--- a/arch/mips/ralink/Platform
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+++ b/arch/mips/ralink/Platform
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@@ -5,6 +5,11 @@ core-$(CONFIG_RALINK) += arch/mips/rali
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@@ -5,6 +5,11 @@ core-$(CONFIG_RALINK) += arch/mips/ralink/
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cflags-$(CONFIG_RALINK) += -I$(srctree)/arch/mips/include/asm/mach-ralink
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#
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@ -118,9 +129,12 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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# Ralink RT305x
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#
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load-$(CONFIG_SOC_RT305X) += 0xffffffff80000000
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diff --git a/arch/mips/ralink/rt288x.c b/arch/mips/ralink/rt288x.c
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new file mode 100644
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index 0000000..8f3a0fa
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--- /dev/null
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+++ b/arch/mips/ralink/rt288x.c
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@@ -0,0 +1,141 @@
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@@ -0,0 +1,143 @@
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+/*
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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@ -223,15 +237,17 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+ }
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+
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+ ralink_clk_add("cpu", cpu_rate);
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+ ralink_clk_add("10000100.timer", cpu_rate / 2);
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+ ralink_clk_add("10000500.uart", cpu_rate / 2);
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+ ralink_clk_add("10000c00.uartlite", cpu_rate / 2);
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+ ralink_clk_add("300100.timer", cpu_rate / 2);
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+ ralink_clk_add("300120.watchdog", cpu_rate / 2);
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+ ralink_clk_add("300500.uart", cpu_rate / 2);
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+ ralink_clk_add("300c00.uartlite", cpu_rate / 2);
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+ ralink_clk_add("400000.ethernet", cpu_rate / 2);
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+}
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+
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+void __init ralink_of_remap(void)
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+{
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+ rt_sysc_membase = plat_of_remap_node("ralink,rt288x-sysc");
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+ rt_memc_membase = plat_of_remap_node("ralink,rt288x-memc");
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+ rt_sysc_membase = plat_of_remap_node("ralink,rt2880-sysc");
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+ rt_memc_membase = plat_of_remap_node("ralink,rt2880-memc");
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+
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+ if (!rt_sysc_membase || !rt_memc_membase)
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+ panic("Failed to remap core resources");
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@ -262,3 +278,6 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+ (id >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK,
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+ (id & CHIP_ID_REV_MASK));
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+}
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--
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1.7.10.4
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@ -0,0 +1,31 @@
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From 3f32be8f012fb5476ea916e583e584cccc632a84 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Tue, 9 Apr 2013 18:31:15 +0200
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Subject: [PATCH V2 08/16] MIPS: ralink: make early_printk work on RT2880
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RT2880 has a different location for the early serial port.
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/ralink/early_printk.c | 4 ++++
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1 file changed, 4 insertions(+)
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diff --git a/arch/mips/ralink/early_printk.c b/arch/mips/ralink/early_printk.c
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index c4ae47e..b46d041 100644
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--- a/arch/mips/ralink/early_printk.c
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+++ b/arch/mips/ralink/early_printk.c
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@@ -11,7 +11,11 @@
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#include <asm/addrspace.h>
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+#ifdef CONFIG_SOC_RT288X
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+#define EARLY_UART_BASE 0x300c00
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+#else
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#define EARLY_UART_BASE 0x10000c00
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+#endif
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#define UART_REG_RX 0x00
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#define UART_REG_TX 0x04
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--
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1.7.10.4
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