From 9067ed76092f5c698b672f6d40d369be87022af4 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Mon, 22 Feb 2010 09:43:37 +0000 Subject: [PATCH] add missing patch to arch/mips/kernel/traps.c to allow ar7 to setup its handler correctly (#6722) SVN-Revision: 19812 --- .../patches-2.6.32/100-board_support.patch | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 target/linux/ar7/patches-2.6.32/100-board_support.patch diff --git a/target/linux/ar7/patches-2.6.32/100-board_support.patch b/target/linux/ar7/patches-2.6.32/100-board_support.patch new file mode 100644 index 0000000000..caa441eafc --- /dev/null +++ b/target/linux/ar7/patches-2.6.32/100-board_support.patch @@ -0,0 +1,28 @@ +--- a/arch/mips/kernel/traps.c ++++ b/arch/mips/kernel/traps.c +@@ -1256,9 +1256,22 @@ void *set_except_vector(int n, void *add + + exception_handlers[n] = handler; + if (n == 0 && cpu_has_divec) { +- *(u32 *)(ebase + 0x200) = 0x08000000 | +- (0x03ffffff & (handler >> 2)); +- local_flush_icache_range(ebase + 0x200, ebase + 0x204); ++ if ((handler ^ (ebase + 4)) & 0xfc000000) { ++ /* lui k0, 0x0000 */ ++ *(u32 *)(ebase + 0x200) = 0x3c1a0000 | (handler >> 16); ++ /* ori k0, 0x0000 */ ++ *(u32 *)(ebase + 0x204) = ++ 0x375a0000 | (handler & 0xffff); ++ /* jr k0 */ ++ *(u32 *)(ebase + 0x208) = 0x03400008; ++ /* nop */ ++ *(u32 *)(ebase + 0x20C) = 0x00000000; ++ flush_icache_range(ebase + 0x200, ebase + 0x210); ++ } else { ++ *(u32 *)(ebase + 0x200) = ++ 0x08000000 | (0x03ffffff & (handler >> 2)); ++ flush_icache_range(ebase + 0x200, ebase + 0x204); ++ } + } + return (void *)old_handler; + }