add support for gigaset SX76X to uboot-lantiq
SVN-Revision: 27488
This commit is contained in:
John Crispin
parent
b808c1bc03
commit
8a5ec4142f
4 changed files with 87 additions and 5 deletions
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@ -45,6 +45,9 @@ Package/uboot-lantiq-easy50812_DDR166M_ramboot=$(call Package/uboot-lantiq-templ
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DDR_CONFIG_easy50712_DDR166M_ramboot:=easy50712_DDR166M
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DDR_CONFIG_easy50812_DDR166M_ramboot:=easy50812
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#Siemens
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Package/uboot-lantiq-gigaSX76X_DDRsamsung166=$(call Package/uboot-lantiq-template,gigaSX76X_DDRsamsung166,NOR)
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#Arcadyan
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Package/uboot-lantiq-arv3527P_flash=$(call Package/uboot-lantiq-template,arv3527P_flash,NOR)
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Package/uboot-lantiq-arv3527P_ramboot=$(call Package/uboot-lantiq-template,arv3527P_ramboot,RAM)
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@ -137,6 +140,7 @@ $(eval $(call BuildPackage,uboot-lantiq-easy50712_DDR166M))
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$(eval $(call BuildPackage,uboot-lantiq-easy50712_DDR166M_ramboot))
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$(eval $(call BuildPackage,uboot-lantiq-easy50812_DDR166M))
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$(eval $(call BuildPackage,uboot-lantiq-easy50812_DDR166M_ramboot))
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$(eval $(call BuildPackage,uboot-lantiq-gigaSX76X_DDRsamsung166))
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#$(eval $(call BuildPackage,uboot-lantiq-arv3527P_flash))
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#$(eval $(call BuildPackage,uboot-lantiq-arv3527P_brnboot))
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#$(eval $(call BuildPackage,uboot-lantiq-arv3527P_ramboot))
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@ -180,6 +180,7 @@ int checkboard (void)
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switch (part_num)
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{
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case 0x129:
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case 0x12B:
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case 0x12D:
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puts("Danube/Twinpass/Vinax-VE ");
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break;
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@ -233,6 +234,19 @@ static int external_switch_init(void)
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unsigned short chipid0=0xdead, chipid1=0xbeef;
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static char * const name = "lq_cpe_eth";
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#ifdef CONFIG_SWITCH_PORT0
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*DANUBE_GPIO_P0_ALTSEL0 &= ~(1<<CONFIG_SWITCH_PIN);
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*DANUBE_GPIO_P0_ALTSEL1 &= ~(1<<CONFIG_SWITCH_PIN);
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*DANUBE_GPIO_P0_OD |= (1<<CONFIG_SWITCH_PIN);
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*DANUBE_GPIO_P0_DIR |= (1<<CONFIG_SWITCH_PIN);
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*DANUBE_GPIO_P0_OUT |= (1<<CONFIG_SWITCH_PIN);
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#elif defined(CONFIG_SWITCH_PORT1)
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*DANUBE_GPIO_P1_ALTSEL0 &= ~(1<<CONFIG_SWITCH_PIN);
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*DANUBE_GPIO_P1_ALTSEL1 &= ~(1<<CONFIG_SWITCH_PIN);
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*DANUBE_GPIO_P1_OD |= (1<<CONFIG_SWITCH_PIN);
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*DANUBE_GPIO_P1_DIR |= (1<<CONFIG_SWITCH_PIN);
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*DANUBE_GPIO_P1_OUT |= (1<<CONFIG_SWITCH_PIN);
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#endif
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#ifdef CLK_OUT2_25MHZ
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*DANUBE_GPIO_P0_DIR=0x0000ae78;
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*DANUBE_GPIO_P0_ALTSEL0=0x00008078;
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@ -245,12 +259,12 @@ static int external_switch_init(void)
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/* earlier no valid response is available, at least on Twinpass & Tantos @ 111MHz, M4530 platform */
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udelay(100000);
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debug("\nsearching for Samurai switch ... ");
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printf("\nsearching for Samurai switch ... ");
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if ( (miiphy_read(name, PHYADDR(SAMURAI_ID_REG0), &chipid0)==0) &&
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(miiphy_read(name, PHYADDR(SAMURAI_ID_REG1), &chipid1)==0) ) {
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if (((chipid0 & 0xFFF0) == ID_SAMURAI_0) &&
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((chipid1 & 0x000F) == ID_SAMURAI_1)) {
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debug("found");
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printf("found");
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/* enable "Crossover Auto Detect" + defaults */
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/* P0 */
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@ -274,10 +288,11 @@ static int external_switch_init(void)
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}
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}
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debug("\nsearching for TANTOS switch ... ");
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printf("%04X %04x\n", chipid0, chipid1);
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printf("\nsearching for TANTOS switch ... ");
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if (miiphy_read(name, PHYADDR(0x101), &chipid0) == 0) {
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if (chipid0 == ID_TANTOS) {
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debug("found");
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printf("found");
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/* P5 Basic Control: Force Link Up */
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miiphy_write(name, PHYADDR(0xA1), 0x0004);
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@ -315,8 +330,36 @@ static int external_switch_init(void)
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}
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#endif /* CONFIG_EXTRA_SWITCH */
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int board_gpio_init(void)
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{
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#ifdef CONFIG_BUTTON_PORT0
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*DANUBE_GPIO_P0_ALTSEL0 &= ~(1<<CONFIG_BUTTON_PIN);
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*DANUBE_GPIO_P0_ALTSEL1 &= ~(1<<CONFIG_BUTTON_PIN);
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*DANUBE_GPIO_P0_DIR &= ~(1<<CONFIG_BUTTON_PIN);
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if(!!(*DANUBE_GPIO_P0_IN & (1<<CONFIG_BUTTON_PIN)) == CONFIG_BUTTON_LEVEL)
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{
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printf("button is pressed\n");
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setenv("bootdelay", "0");
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setenv("bootcmd", "httpd");
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}
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#elif defined(CONFIG_BUTTON_PORT1)
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*DANUBE_GPIO_P1_ALTSEL0 &= ~(1<<CONFIG_BUTTON_PIN);
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*DANUBE_GPIO_P1_ALTSEL1 &= ~(1<<CONFIG_BUTTON_PIN);
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*DANUBE_GPIO_P1_DIR &= ~(1<<CONFIG_BUTTON_PIN);
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if(!!(*DANUBE_GPIO_P1_IN & (1<<CONFIG_BUTTON_PIN)) == CONFIG_BUTTON_LEVEL)
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{
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printf("button is pressed\n");
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setenv("bootdelay", "0");
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setenv("bootcmd", "httpd");
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}
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#endif
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}
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int board_eth_init(bd_t *bis)
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{
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board_gpio_init();
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#if defined(CONFIG_IFX_ETOP)
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*DANUBE_PMU_PWDCR &= 0xFFFFEFDF;
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@ -186,7 +186,7 @@
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#define CONFIG_BOOTSTRAP_BAUDRATE CONFIG_BAUDRATE
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_BOOTSTRAP_LZMA
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#define CONFIG_BOOTSTRAP_SERIAL
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//#define CONFIG_BOOTSTRAP_SERIAL
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#endif
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#endif /* __IFX_COMMON_H */
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35
package/uboot-lantiq/patches/500-gigasx.patch
Normal file
35
package/uboot-lantiq/patches/500-gigasx.patch
Normal file
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@ -0,0 +1,35 @@
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--- a/Makefile
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+++ b/Makefile
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@@ -3613,6 +3613,32 @@
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$(eval $(call arcadyan, arv752DPW%config))
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$(eval $(call arcadyan, arv752DPW22%config))
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+gigaSX76X%config : unconfig
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+ @mkdir -p $(obj)include
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+ @mkdir -p $(obj)board/infineon/easy50712
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+ @[ -z "$(findstring ramboot,$@)" ] || \
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+ { echo "TEXT_BASE = 0xA0400000" >$(obj)board/infineon/easy50712/config.tmp ; \
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+ echo "#define CONFIG_SYS_RAMBOOT" >>$(obj)include/config.h ; \
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+ $(XECHO) "... with ramboot configuration" ; \
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+ }
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+ @if [ "$(findstring _DDR,$@)" -a -z "$(findstring ramboot,$@)" ] ; then \
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+ echo "#define CONFIG_USE_DDR_RAM" >>$(obj)include/config.h ; \
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+ echo "#define CONFIG_BOOTSTRAP" >>$(obj)include/config.h ; \
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+ DDR=$(subst DDR,,$(filter DDR%,$(subst _, ,$@))); \
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+ case "$${DDR}" in \
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+ 111M|166M|e111M|e166M|promos400|samsung166|psc166) \
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+ $(XECHO) "... with DDR RAM config $${DDR}" ; \
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+ echo "#define CONFIG_USE_DDR_RAM_CFG_$${DDR}" >>$(obj)include/config.h ;; \
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+ *) $(XECHO) "... DDR RAM config \\\"$${DDR}\\\" unknown, use default"; \
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+ esac; \
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+ fi
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+ echo "#define CONFIG_SWITCH_PORT1 1" >>$(obj)include/config.h
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+ echo "#define CONFIG_SWITCH_PIN 3" >>$(obj)include/config.h
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+ echo "#define CONFIG_BUTTON_PORT0 1" >>$(obj)include/config.h
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+ echo "#define CONFIG_BUTTON_PIN 14" >>$(obj)include/config.h
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+ echo "#define CONFIG_BUTTON_LEVEL 1" >>$(obj)include/config.h
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+ @$(MKCONFIG) -a easy50712 mips mips easy50712 infineon danube
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+
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easy50712%config : unconfig
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@mkdir -p $(obj)include
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@mkdir -p $(obj)board/infineon/easy50712
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