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ipq806x: fix EA8500 switch control

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EA8500 has pcie2 slot unequipped.
By EA8500 hw design default pcie2 reset gpio (gpio63) is used to
reset the switch. That's why enabling pcie2 brings the switch into
a working state.

So let's just control the gpio63 without enabling the pcie2 slot.

We have to remove the pcie2_pins node so the gpio63 is not defined
twice. Because pcie2 node has a reference to pcie2_pins we have to
remove it as well.

Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
[slh: rebase for kernel v4.14 as well]
Signed-off-by: Stefan Lippers-Hollmann <s.l-h@gmx.de>
This commit is contained in:
Pavel Kubelun 2018-01-18 19:45:15 +03:00 committed by John Crispin
parent 7a4f9c5993
commit 7f694ef3d9
2 changed files with 36 additions and 8 deletions
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22
target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
View file

@ -39,6 +39,10 @@
soc { soc {
pinmux@800000 { pinmux@800000 {
pinctrl-0 = <&switch_reset>;
pinctrl-names = "default";
button_pins: button_pins { button_pins: button_pins {
mux { mux {
pins = "gpio65", "gpio67", "gpio68"; pins = "gpio65", "gpio67", "gpio68";
@ -66,6 +70,16 @@
}; };
}; };
switch_reset: switch_reset_pins {
mux {
pins = "gpio63";
function = "gpio";
drive-strength = <2>;
bias-disable;
output-low;
};
};
mdio0_pins: mdio0_pins { mdio0_pins: mdio0_pins {
mux { mux {
pins = "gpio0", "gpio1"; pins = "gpio0", "gpio1";
@ -164,10 +178,6 @@
status = "ok"; status = "ok";
}; };
pcie2: pci@1b900000 {
status = "ok";
};
nand@1ac00000 { nand@1ac00000 {
status = "ok"; status = "ok";
@ -404,3 +414,7 @@
}; };
}; };
}; };
/delete-node/ &pcie2_pins;
/delete-node/ &pcie2;

22
target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
View file

@ -39,6 +39,10 @@
soc { soc {
pinmux@800000 { pinmux@800000 {
pinctrl-0 = <&switch_reset>;
pinctrl-names = "default";
button_pins: button_pins { button_pins: button_pins {
mux { mux {
pins = "gpio65", "gpio67", "gpio68"; pins = "gpio65", "gpio67", "gpio68";
@ -66,6 +70,16 @@
}; };
}; };
switch_reset: switch_reset_pins {
mux {
pins = "gpio63";
function = "gpio";
drive-strength = <2>;
bias-disable;
output-low;
};
};
mdio0_pins: mdio0_pins { mdio0_pins: mdio0_pins {
mux { mux {
pins = "gpio0", "gpio1"; pins = "gpio0", "gpio1";
@ -164,10 +178,6 @@
status = "ok"; status = "ok";
}; };
pcie2: pci@1b900000 {
status = "ok";
};
nand@1ac00000 { nand@1ac00000 {
status = "ok"; status = "ok";
@ -404,3 +414,7 @@
}; };
}; };
}; };
/delete-node/ &pcie2_pins;
/delete-node/ &pcie2;