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kernel: bump to 4.9.105

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Refresh patches.

Drop patches that have been upstreamed:
target/linux/ar71xx/patches-4.9/106-01-MIPS-ath79-fix-AR724X_PLL_REG_PCIE_CONFIG-offset.patch
target/linux/generic/backport-4.9/095-v4.12-ipv6-Need-to-export-ipv6_push_frag_opts-for-tunnelin.patch
target/linux/generic/pending-4.9/180-net-phy-at803x-add-support-for-AT8032.patch
target/linux/generic/pending-4.9/181-net-usb-add-lte-modem-wistron-neweb-d18q1.patch
target/linux/generic/pending-4.9/182-net-qmi_wwan-add-BroadMobi-BM806U-2020-2033.patch

Compile & run tested: ar71xx Archer C7 v2

Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
This commit is contained in:
Kevin Darbyshire-Bryant 2018-05-31 19:49:08 +00:00 • committed by John Crispin
parent 5b0c899bfd
commit 7dca1bae82
36 changed files with 439 additions and 681 deletions
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29
target/linux/ar71xx/patches-4.9/106-01-MIPS-ath79-fix-AR724X_PLL_REG_PCIE_CONFIG-offset.patch
View file

@ -1,29 +0,0 @@
From 0f15814bcdf59f10b708a3fba636acb089e9a4f1 Mon Sep 17 00:00:00 2001
From: Mathias Kresin <dev@kresin.me>
Date: Thu, 30 Mar 2017 15:34:39 +0200
Subject: [PATCH] MIPS: ath79: fix AR724X_PLL_REG_PCIE_CONFIG offset
According to the QCA u-boot source the "PCIE Phase Lock Loop
Configuration (PCIE_PLL_CONFIG)" register is for all SoCs except the
QCA955X and QCA956X at offset 0x10.
Since the PCIE PLL config register is only defined for the AR724x fix
only this value. The value is wrong since the day it was added and isn't
yet used by any driver.
Signed-off-by: Mathias Kresin <dev@kresin.me>
---
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -167,7 +167,7 @@
#define AR71XX_AHB_DIV_MASK 0x7
#define AR724X_PLL_REG_CPU_CONFIG 0x00
-#define AR724X_PLL_REG_PCIE_CONFIG 0x18
+#define AR724X_PLL_REG_PCIE_CONFIG 0x10
#define AR724X_PLL_FB_SHIFT 0
#define AR724X_PLL_FB_MASK 0x3ff

8
target/linux/ar71xx/patches-4.9/902-at803x-add-reset-gpio-pdata.patch
View file

@ -16,7 +16,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#endif /* _PHY_AT803X_PDATA_H */
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c
@@ -264,6 +264,7 @@ static int at803x_resume(struct phy_devi
@@ -263,6 +263,7 @@ static int at803x_resume(struct phy_devi
static int at803x_probe(struct phy_device *phydev)
{
@ -24,8 +24,8 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
struct device *dev = &phydev->mdio.dev;
struct at803x_priv *priv;
struct gpio_desc *gpiod_reset;
@@ -276,6 +277,12 @@ static int at803x_probe(struct phy_devic
phydev->drv->phy_id != ATH8032_PHY_ID)
@@ -274,6 +275,12 @@ static int at803x_probe(struct phy_devic
if (phydev->drv->phy_id != ATH8030_PHY_ID)
goto does_not_require_reset_workaround;
+ pdata = dev_get_platdata(dev);
@ -37,7 +37,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
gpiod_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
if (IS_ERR(gpiod_reset))
return PTR_ERR(gpiod_reset);
@@ -407,15 +414,23 @@ static void at803x_link_change_notify(st
@@ -405,15 +412,23 @@ static void at803x_link_change_notify(st
* cannot recover from by software.
*/
if (phydev->state == PHY_NOLINK) {