brcm47xx: add kernel 4.4 support
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 47930
This commit is contained in:
parent
4afe0fc2b2
commit
7caa9411e7
21 changed files with 2212 additions and 0 deletions
185
target/linux/brcm47xx/config-4.4
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185
target/linux/brcm47xx/config-4.4
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@ -0,0 +1,185 @@
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CONFIG_ADM6996_PHY=y
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CONFIG_ARCH_BINFMT_ELF_STATE=y
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CONFIG_ARCH_DISCARD_MEMBLOCK=y
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CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
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CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
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# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
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# CONFIG_ARCH_HAS_SG_CHAIN is not set
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CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
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CONFIG_ARCH_HIBERNATION_POSSIBLE=y
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CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
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CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
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CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
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CONFIG_B53=y
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# CONFIG_B53_MMAP_DRIVER is not set
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CONFIG_B53_PHY_DRIVER=y
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CONFIG_B53_PHY_FIXUP=y
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# CONFIG_B53_SRAB_DRIVER is not set
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CONFIG_BCM47XX=y
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CONFIG_BCM47XX_BCMA=y
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CONFIG_BCM47XX_SSB=y
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CONFIG_BCM47XX_WDT=y
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CONFIG_BCMA=y
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CONFIG_BCMA_BLOCKIO=y
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CONFIG_BCMA_DEBUG=y
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CONFIG_BCMA_DRIVER_GMAC_CMN=y
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CONFIG_BCMA_DRIVER_GPIO=y
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CONFIG_BCMA_DRIVER_MIPS=y
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CONFIG_BCMA_DRIVER_PCI=y
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CONFIG_BCMA_DRIVER_PCI_HOSTMODE=y
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CONFIG_BCMA_HOST_PCI=y
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CONFIG_BCMA_HOST_PCI_POSSIBLE=y
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CONFIG_BCMA_HOST_SOC=y
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CONFIG_BCMA_NFLASH=y
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CONFIG_BCMA_SFLASH=y
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CONFIG_CC_OPTIMIZE_FOR_SIZE=y
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CONFIG_CEVT_R4K=y
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CONFIG_CLONE_BACKWARDS=y
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CONFIG_CMDLINE="noinitrd console=ttyS0,115200"
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CONFIG_CMDLINE_BOOL=y
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# CONFIG_CMDLINE_OVERRIDE is not set
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# CONFIG_CPU_BMIPS is not set
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CONFIG_CPU_GENERIC_DUMP_TLB=y
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CONFIG_CPU_HAS_PREFETCH=y
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CONFIG_CPU_HAS_SYNC=y
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CONFIG_CPU_LITTLE_ENDIAN=y
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CONFIG_CPU_MIPS32=y
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CONFIG_CPU_MIPS32_R1=y
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# CONFIG_CPU_MIPS32_R2 is not set
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CONFIG_CPU_MIPSR1=y
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CONFIG_CPU_MIPSR2_IRQ_VI=y
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CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
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CONFIG_CPU_R4K_CACHE_TLB=y
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CONFIG_CPU_R4K_FPU=y
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CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
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CONFIG_CPU_SUPPORTS_HIGHMEM=y
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CONFIG_CSRC_R4K=y
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CONFIG_DMA_NONCOHERENT=y
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# CONFIG_EARLY_PRINTK is not set
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CONFIG_FIXED_PHY=y
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CONFIG_GENERIC_ATOMIC64=y
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_CMOS_UPDATE=y
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CONFIG_GENERIC_IO=y
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CONFIG_GENERIC_IRQ_SHOW=y
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CONFIG_GENERIC_PCI_IOMAP=y
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CONFIG_GENERIC_SCHED_CLOCK=y
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CONFIG_GENERIC_SMP_IDLE_THREAD=y
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CONFIG_GPIOLIB=y
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CONFIG_GPIO_DEVRES=y
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CONFIG_GPIO_SYSFS=y
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CONFIG_GPIO_WDT=y
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CONFIG_HARDWARE_WATCHPOINTS=y
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HAS_IOPORT_MAP=y
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# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
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# CONFIG_HAVE_ARCH_BITREVERSE is not set
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CONFIG_HAVE_ARCH_JUMP_LABEL=y
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CONFIG_HAVE_ARCH_KGDB=y
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CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
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CONFIG_HAVE_ARCH_TRACEHOOK=y
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# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
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CONFIG_HAVE_BPF_JIT=y
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CONFIG_HAVE_CC_STACKPROTECTOR=y
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CONFIG_HAVE_CONTEXT_TRACKING=y
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CONFIG_HAVE_C_RECORDMCOUNT=y
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CONFIG_HAVE_DEBUG_KMEMLEAK=y
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CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
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CONFIG_HAVE_DMA_API_DEBUG=y
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CONFIG_HAVE_DMA_ATTRS=y
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CONFIG_HAVE_DMA_CONTIGUOUS=y
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CONFIG_HAVE_DYNAMIC_FTRACE=y
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CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
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CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
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CONFIG_HAVE_FUNCTION_TRACER=y
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CONFIG_HAVE_GENERIC_DMA_COHERENT=y
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CONFIG_HAVE_IDE=y
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CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
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CONFIG_HAVE_MEMBLOCK=y
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CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
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CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
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CONFIG_HAVE_NET_DSA=y
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CONFIG_HAVE_OPROFILE=y
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CONFIG_HAVE_PERF_EVENTS=y
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CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
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CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
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CONFIG_HW_HAS_PCI=y
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CONFIG_HW_RANDOM=y
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CONFIG_HZ_PERIODIC=y
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CONFIG_INITRAMFS_SOURCE=""
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CONFIG_IRQ_CPU=y
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CONFIG_IRQ_DOMAIN=y
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CONFIG_IRQ_FORCED_THREADING=y
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CONFIG_IRQ_WORK=y
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CONFIG_LEDS_GPIO_REGISTER=y
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# CONFIG_LZ4_COMPRESS is not set
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# CONFIG_LZ4_DECOMPRESS is not set
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CONFIG_MDIO_BOARDINFO=y
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CONFIG_MIPS=y
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# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
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CONFIG_MIPS_L1_CACHE_SHIFT=5
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# CONFIG_MIPS_MACHINE is not set
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CONFIG_MODULES_USE_ELF_REL=y
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CONFIG_MTD_BCM47XXSFLASH=y
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CONFIG_MTD_BCM47XX_PARTS=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_BCM47XXNFLASH=y
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CONFIG_MTD_NAND_ECC=y
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CONFIG_MTD_PHYSMAP=y
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CONFIG_NEED_DMA_MAP_STATE=y
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CONFIG_NEED_PER_CPU_KM=y
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CONFIG_NO_EXCEPT_FILL=y
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CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
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# CONFIG_NO_IOPORT_MAP is not set
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CONFIG_PAGEFLAGS_EXTENDED=y
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CONFIG_PCI=y
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CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
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CONFIG_PCI_DOMAINS=y
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CONFIG_PERF_USE_VMALLOC=y
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CONFIG_PGTABLE_LEVELS=2
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CONFIG_PHYLIB=y
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# CONFIG_RCU_EXPEDITE_BOOT is not set
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# CONFIG_RCU_STALL_COMMON is not set
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CONFIG_SCHED_HRTICK=y
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# CONFIG_SCSI_DMA is not set
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CONFIG_SERIAL_8250_EXTENDED=y
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CONFIG_SERIAL_8250_SHARE_IRQ=y
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CONFIG_SRCU=y
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CONFIG_SSB=y
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CONFIG_SSB_B43_PCI_BRIDGE=y
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CONFIG_SSB_BLOCKIO=y
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CONFIG_SSB_DEBUG=y
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CONFIG_SSB_DRIVER_EXTIF=y
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CONFIG_SSB_DRIVER_GIGE=y
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CONFIG_SSB_DRIVER_GPIO=y
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CONFIG_SSB_DRIVER_MIPS=y
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CONFIG_SSB_DRIVER_PCICORE=y
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CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
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CONFIG_SSB_EMBEDDED=y
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CONFIG_SSB_HOST_SOC=y
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CONFIG_SSB_PCICORE_HOSTMODE=y
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CONFIG_SSB_PCIHOST=y
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CONFIG_SSB_PCIHOST_POSSIBLE=y
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CONFIG_SSB_SERIAL=y
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CONFIG_SSB_SFLASH=y
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CONFIG_SSB_SPROM=y
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CONFIG_SWCONFIG=y
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CONFIG_SYSCTL_EXCEPTION_TRACE=y
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CONFIG_SYS_HAS_CPU_BMIPS=y
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CONFIG_SYS_HAS_CPU_BMIPS32_3300=y
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CONFIG_SYS_HAS_CPU_MIPS32_R1=y
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CONFIG_SYS_HAS_CPU_MIPS32_R2=y
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CONFIG_SYS_HAS_EARLY_PRINTK=y
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CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
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CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
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CONFIG_SYS_SUPPORTS_HIGHMEM=y
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CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
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CONFIG_SYS_SUPPORTS_MIPS16=y
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CONFIG_TICK_CPU_ACCOUNTING=y
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CONFIG_USB_SUPPORT=y
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CONFIG_USE_GENERIC_EARLY_PRINTK_8250=y
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CONFIG_WATCHDOG_CORE=y
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CONFIG_ZONE_DMA_FLAG=0
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391
target/linux/brcm47xx/patches-4.4/159-cpu_fixes.patch
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391
target/linux/brcm47xx/patches-4.4/159-cpu_fixes.patch
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@ -0,0 +1,391 @@
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--- a/arch/mips/include/asm/r4kcache.h
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+++ b/arch/mips/include/asm/r4kcache.h
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@@ -25,6 +25,20 @@
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extern void (*r4k_blast_dcache)(void);
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extern void (*r4k_blast_icache)(void);
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+#ifdef CONFIG_BCM47XX
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+#include <asm/paccess.h>
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+#include <linux/ssb/ssb.h>
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+#define BCM4710_DUMMY_RREG() ((void) *((u8 *) KSEG1ADDR(SSB_ENUM_BASE)))
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+
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+#define BCM4710_FILL_TLB(addr) (*(volatile unsigned long *)(addr))
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+#define BCM4710_PROTECTED_FILL_TLB(addr) ({ unsigned long x; get_dbe(x, (volatile unsigned long *)(addr)); })
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+#else
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+#define BCM4710_DUMMY_RREG()
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+
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+#define BCM4710_FILL_TLB(addr)
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+#define BCM4710_PROTECTED_FILL_TLB(addr)
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+#endif
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+
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/*
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* This macro return a properly sign-extended address suitable as base address
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* for indexed cache operations. Two issues here:
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@@ -98,6 +112,7 @@ static inline void flush_icache_line_ind
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static inline void flush_dcache_line_indexed(unsigned long addr)
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{
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__dflush_prologue
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+ BCM4710_DUMMY_RREG();
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cache_op(Index_Writeback_Inv_D, addr);
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__dflush_epilogue
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}
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@@ -125,6 +140,7 @@ static inline void flush_icache_line(uns
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static inline void flush_dcache_line(unsigned long addr)
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{
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__dflush_prologue
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+ BCM4710_DUMMY_RREG();
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cache_op(Hit_Writeback_Inv_D, addr);
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__dflush_epilogue
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}
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@@ -132,6 +148,7 @@ static inline void flush_dcache_line(uns
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static inline void invalidate_dcache_line(unsigned long addr)
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{
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__dflush_prologue
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+ BCM4710_DUMMY_RREG();
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cache_op(Hit_Invalidate_D, addr);
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__dflush_epilogue
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}
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@@ -187,6 +204,7 @@ static inline void protected_flush_icach
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#ifdef CONFIG_EVA
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protected_cachee_op(Hit_Invalidate_I, addr);
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#else
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+ BCM4710_DUMMY_RREG();
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protected_cache_op(Hit_Invalidate_I, addr);
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#endif
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break;
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@@ -201,6 +219,7 @@ static inline void protected_flush_icach
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*/
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static inline void protected_writeback_dcache_line(unsigned long addr)
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{
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+ BCM4710_DUMMY_RREG();
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#ifdef CONFIG_EVA
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protected_cachee_op(Hit_Writeback_Inv_D, addr);
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#else
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@@ -554,8 +573,51 @@ static inline void invalidate_tcache_pag
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: "r" (base), \
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"i" (op));
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+static inline void blast_dcache(void)
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+{
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+ unsigned long start = KSEG0;
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+ unsigned long dcache_size = current_cpu_data.dcache.waysize * current_cpu_data.dcache.ways;
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+ unsigned long end = (start + dcache_size);
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+
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+ do {
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+ BCM4710_DUMMY_RREG();
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+ cache_op(Index_Writeback_Inv_D, start);
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+ start += current_cpu_data.dcache.linesz;
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+ } while(start < end);
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+}
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+
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+static inline void blast_dcache_page(unsigned long page)
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+{
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+ unsigned long start = page;
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+ unsigned long end = start + PAGE_SIZE;
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+
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+ BCM4710_FILL_TLB(start);
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+ do {
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+ BCM4710_DUMMY_RREG();
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+ cache_op(Hit_Writeback_Inv_D, start);
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+ start += current_cpu_data.dcache.linesz;
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+ } while(start < end);
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+}
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+
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+static inline void blast_dcache_page_indexed(unsigned long page)
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+{
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+ unsigned long start = page;
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+ unsigned long end = start + PAGE_SIZE;
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+ unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
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+ unsigned long ws_end = current_cpu_data.dcache.ways <<
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+ current_cpu_data.dcache.waybit;
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+ unsigned long ws, addr;
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+ for (ws = 0; ws < ws_end; ws += ws_inc) {
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+ start = page + ws;
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+ for (addr = start; addr < end; addr += current_cpu_data.dcache.linesz) {
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+ BCM4710_DUMMY_RREG();
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+ cache_op(Index_Writeback_Inv_D, addr);
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+ }
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+ }
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+}
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+
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/* build blast_xxx, blast_xxx_page, blast_xxx_page_indexed */
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-#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, extra) \
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+#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, extra, war) \
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static inline void extra##blast_##pfx##cache##lsize(void) \
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{ \
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unsigned long start = INDEX_BASE; \
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@@ -567,6 +629,7 @@ static inline void extra##blast_##pfx##c
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\
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__##pfx##flush_prologue \
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\
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+ war \
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for (ws = 0; ws < ws_end; ws += ws_inc) \
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for (addr = start; addr < end; addr += lsize * 32) \
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cache##lsize##_unroll32(addr|ws, indexop); \
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@@ -581,6 +644,7 @@ static inline void extra##blast_##pfx##c
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\
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__##pfx##flush_prologue \
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\
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+ war \
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do { \
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cache##lsize##_unroll32(start, hitop); \
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start += lsize * 32; \
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@@ -599,6 +663,8 @@ static inline void extra##blast_##pfx##c
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current_cpu_data.desc.waybit; \
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unsigned long ws, addr; \
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\
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+ war \
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+ \
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__##pfx##flush_prologue \
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\
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for (ws = 0; ws < ws_end; ws += ws_inc) \
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@@ -608,26 +674,26 @@ static inline void extra##blast_##pfx##c
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__##pfx##flush_epilogue \
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}
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-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, )
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-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, )
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-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, )
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-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, )
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-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, )
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-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I_Loongson2, 32, loongson2_)
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-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, )
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-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, )
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-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, )
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-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, )
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-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 128, )
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-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 128, )
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-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, )
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-
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-__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, )
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-__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, )
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-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, )
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-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, )
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-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, )
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-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, )
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+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, , )
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+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, , BCM4710_FILL_TLB(start);)
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+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, , )
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+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, , )
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+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, , BCM4710_FILL_TLB(start);)
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+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I_Loongson2, 32, loongson2_, BCM4710_FILL_TLB(start);)
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+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, , )
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+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, , )
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+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, , BCM4710_FILL_TLB(start);)
|
||||
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, , )
|
||||
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 128, , )
|
||||
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 128, , )
|
||||
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, , )
|
||||
+
|
||||
+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, , )
|
||||
+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, , )
|
||||
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, , )
|
||||
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, , )
|
||||
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, , )
|
||||
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, , )
|
||||
|
||||
#define __BUILD_BLAST_USER_CACHE(pfx, desc, indexop, hitop, lsize) \
|
||||
static inline void blast_##pfx##cache##lsize##_user_page(unsigned long page) \
|
||||
@@ -656,17 +722,19 @@ __BUILD_BLAST_USER_CACHE(d, dcache, Inde
|
||||
__BUILD_BLAST_USER_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64)
|
||||
|
||||
/* build blast_xxx_range, protected_blast_xxx_range */
|
||||
-#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, extra) \
|
||||
+#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, extra, war, war2) \
|
||||
static inline void prot##extra##blast_##pfx##cache##_range(unsigned long start, \
|
||||
unsigned long end) \
|
||||
{ \
|
||||
unsigned long lsize = cpu_##desc##_line_size(); \
|
||||
unsigned long addr = start & ~(lsize - 1); \
|
||||
unsigned long aend = (end - 1) & ~(lsize - 1); \
|
||||
+ war \
|
||||
\
|
||||
__##pfx##flush_prologue \
|
||||
\
|
||||
while (1) { \
|
||||
+ war2 \
|
||||
prot##cache_op(hitop, addr); \
|
||||
if (addr == aend) \
|
||||
break; \
|
||||
@@ -678,8 +746,8 @@ static inline void prot##extra##blast_##
|
||||
|
||||
#ifndef CONFIG_EVA
|
||||
|
||||
-__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, )
|
||||
-__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, )
|
||||
+__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, , BCM4710_PROTECTED_FILL_TLB(addr); BCM4710_PROTECTED_FILL_TLB(aend);, BCM4710_DUMMY_RREG();)
|
||||
+__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, , , )
|
||||
|
||||
#else
|
||||
|
||||
@@ -716,14 +784,14 @@ __BUILD_PROT_BLAST_CACHE_RANGE(d, dcache
|
||||
__BUILD_PROT_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I)
|
||||
|
||||
#endif
|
||||
-__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_, )
|
||||
+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_, , , )
|
||||
__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I_Loongson2, \
|
||||
- protected_, loongson2_)
|
||||
-__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, , )
|
||||
-__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, , )
|
||||
-__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , )
|
||||
+ protected_, loongson2_, , )
|
||||
+__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, , , BCM4710_FILL_TLB(addr); BCM4710_FILL_TLB(aend);, BCM4710_DUMMY_RREG();)
|
||||
+__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, , , , )
|
||||
+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , , , )
|
||||
/* blast_inv_dcache_range */
|
||||
-__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, , )
|
||||
-__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, , )
|
||||
+__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, , , , BCM4710_DUMMY_RREG();)
|
||||
+__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, , , , )
|
||||
|
||||
#endif /* _ASM_R4KCACHE_H */
|
||||
--- a/arch/mips/include/asm/stackframe.h
|
||||
+++ b/arch/mips/include/asm/stackframe.h
|
||||
@@ -358,6 +358,10 @@
|
||||
.macro RESTORE_SP_AND_RET
|
||||
LONG_L sp, PT_R29(sp)
|
||||
.set arch=r4000
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ nop
|
||||
+ nop
|
||||
+#endif
|
||||
eret
|
||||
.set mips0
|
||||
.endm
|
||||
--- a/arch/mips/kernel/genex.S
|
||||
+++ b/arch/mips/kernel/genex.S
|
||||
@@ -32,6 +32,10 @@
|
||||
NESTED(except_vec3_generic, 0, sp)
|
||||
.set push
|
||||
.set noat
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ nop
|
||||
+ nop
|
||||
+#endif
|
||||
#if R5432_CP0_INTERRUPT_WAR
|
||||
mfc0 k0, CP0_INDEX
|
||||
#endif
|
||||
--- a/arch/mips/mm/c-r4k.c
|
||||
+++ b/arch/mips/mm/c-r4k.c
|
||||
@@ -39,6 +39,9 @@
|
||||
#include <asm/dma-coherence.h>
|
||||
#include <asm/mips-cm.h>
|
||||
|
||||
+/* For enabling BCM4710 cache workarounds */
|
||||
+int bcm4710 = 0;
|
||||
+
|
||||
/*
|
||||
* Special Variant of smp_call_function for use by cache functions:
|
||||
*
|
||||
@@ -157,6 +160,9 @@ static void r4k_blast_dcache_user_page_s
|
||||
{
|
||||
unsigned long dc_lsize = cpu_dcache_line_size();
|
||||
|
||||
+ if (bcm4710)
|
||||
+ r4k_blast_dcache_page = blast_dcache_page;
|
||||
+ else
|
||||
if (dc_lsize == 0)
|
||||
r4k_blast_dcache_user_page = (void *)cache_noop;
|
||||
else if (dc_lsize == 16)
|
||||
@@ -175,6 +181,9 @@ static void r4k_blast_dcache_page_indexe
|
||||
{
|
||||
unsigned long dc_lsize = cpu_dcache_line_size();
|
||||
|
||||
+ if (bcm4710)
|
||||
+ r4k_blast_dcache_page_indexed = blast_dcache_page_indexed;
|
||||
+ else
|
||||
if (dc_lsize == 0)
|
||||
r4k_blast_dcache_page_indexed = (void *)cache_noop;
|
||||
else if (dc_lsize == 16)
|
||||
@@ -194,6 +203,9 @@ static void r4k_blast_dcache_setup(void)
|
||||
{
|
||||
unsigned long dc_lsize = cpu_dcache_line_size();
|
||||
|
||||
+ if (bcm4710)
|
||||
+ r4k_blast_dcache = blast_dcache;
|
||||
+ else
|
||||
if (dc_lsize == 0)
|
||||
r4k_blast_dcache = (void *)cache_noop;
|
||||
else if (dc_lsize == 16)
|
||||
@@ -793,6 +805,8 @@ static void local_r4k_flush_cache_sigtra
|
||||
unsigned long addr = (unsigned long) arg;
|
||||
|
||||
R4600_HIT_CACHEOP_WAR_IMPL;
|
||||
+ BCM4710_PROTECTED_FILL_TLB(addr);
|
||||
+ BCM4710_PROTECTED_FILL_TLB(addr + 4);
|
||||
if (dc_lsize)
|
||||
protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
|
||||
if (!cpu_icache_snoops_remote_store && scache_size)
|
||||
@@ -1602,6 +1616,17 @@ static void coherency_setup(void)
|
||||
* silly idea of putting something else there ...
|
||||
*/
|
||||
switch (current_cpu_type()) {
|
||||
+ case CPU_BMIPS3300:
|
||||
+ {
|
||||
+ u32 cm;
|
||||
+ cm = read_c0_diag();
|
||||
+ /* Enable icache */
|
||||
+ cm |= (1 << 31);
|
||||
+ /* Enable dcache */
|
||||
+ cm |= (1 << 30);
|
||||
+ write_c0_diag(cm);
|
||||
+ }
|
||||
+ break;
|
||||
case CPU_R4000PC:
|
||||
case CPU_R4000SC:
|
||||
case CPU_R4000MC:
|
||||
@@ -1648,6 +1673,15 @@ void r4k_cache_init(void)
|
||||
extern void build_copy_page(void);
|
||||
struct cpuinfo_mips *c = ¤t_cpu_data;
|
||||
|
||||
+ /* Check if special workarounds are required */
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ if (current_cpu_data.cputype == CPU_BMIPS32 && (current_cpu_data.processor_id & 0xff) == 0) {
|
||||
+ printk("Enabling BCM4710A0 cache workarounds.\n");
|
||||
+ bcm4710 = 1;
|
||||
+ } else
|
||||
+#endif
|
||||
+ bcm4710 = 0;
|
||||
+
|
||||
probe_pcache();
|
||||
setup_scache();
|
||||
|
||||
@@ -1717,7 +1751,15 @@ void r4k_cache_init(void)
|
||||
*/
|
||||
local_r4k___flush_cache_all(NULL);
|
||||
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ {
|
||||
+ static void (*_coherency_setup)(void);
|
||||
+ _coherency_setup = (void (*)(void)) KSEG1ADDR(coherency_setup);
|
||||
+ _coherency_setup();
|
||||
+ }
|
||||
+#else
|
||||
coherency_setup();
|
||||
+#endif
|
||||
board_cache_error_setup = r4k_cache_error_setup;
|
||||
|
||||
/*
|
||||
--- a/arch/mips/mm/tlbex.c
|
||||
+++ b/arch/mips/mm/tlbex.c
|
||||
@@ -1281,6 +1281,9 @@ static void build_r4000_tlb_refill_handl
|
||||
/* No need for uasm_i_nop */
|
||||
}
|
||||
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ uasm_i_nop(&p);
|
||||
+#endif
|
||||
#ifdef CONFIG_64BIT
|
||||
build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
|
||||
#else
|
||||
@@ -1868,6 +1871,9 @@ build_r4000_tlbchange_handler_head(u32 *
|
||||
{
|
||||
struct work_registers wr = build_get_work_registers(p);
|
||||
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ uasm_i_nop(p);
|
||||
+#endif
|
||||
#ifdef CONFIG_64BIT
|
||||
build_get_pmde64(p, l, r, wr.r1, wr.r2); /* get pmd in ptr */
|
||||
#else
|
78
target/linux/brcm47xx/patches-4.4/160-kmap_coherent.patch
Normal file
78
target/linux/brcm47xx/patches-4.4/160-kmap_coherent.patch
Normal file
|
@ -0,0 +1,78 @@
|
|||
From: Jeff Hansen <jhansen@cardaccess-inc.com>
|
||||
Subject: [PATCH] kmap_coherent
|
||||
|
||||
On ASUS WL-500gP there are some "Data bus error"s when executing simple
|
||||
commands liks "ps" or "cat /proc/1/cmdline".
|
||||
|
||||
This fixes OpenWrt ticket #1485: https://dev.openwrt.org/ticket/1485
|
||||
---
|
||||
--- a/arch/mips/include/asm/cpu-features.h
|
||||
+++ b/arch/mips/include/asm/cpu-features.h
|
||||
@@ -160,6 +160,9 @@
|
||||
#ifndef cpu_has_local_ebase
|
||||
#define cpu_has_local_ebase 1
|
||||
#endif
|
||||
+#ifndef cpu_use_kmap_coherent
|
||||
+#define cpu_use_kmap_coherent 1
|
||||
+#endif
|
||||
|
||||
/*
|
||||
* I-Cache snoops remote store. This only matters on SMP. Some multiprocessors
|
||||
--- a/arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h
|
||||
@@ -79,4 +79,6 @@
|
||||
#define cpu_scache_line_size() 0
|
||||
#define cpu_has_vz 0
|
||||
|
||||
+#define cpu_use_kmap_coherent 0
|
||||
+
|
||||
#endif /* __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H */
|
||||
--- a/arch/mips/mm/c-r4k.c
|
||||
+++ b/arch/mips/mm/c-r4k.c
|
||||
@@ -600,7 +600,7 @@ static inline void local_r4k_flush_cache
|
||||
*/
|
||||
map_coherent = (cpu_has_dc_aliases &&
|
||||
page_mapped(page) && !Page_dcache_dirty(page));
|
||||
- if (map_coherent)
|
||||
+ if (map_coherent && cpu_use_kmap_coherent)
|
||||
vaddr = kmap_coherent(page, addr);
|
||||
else
|
||||
vaddr = kmap_atomic(page);
|
||||
@@ -625,7 +625,7 @@ static inline void local_r4k_flush_cache
|
||||
}
|
||||
|
||||
if (vaddr) {
|
||||
- if (map_coherent)
|
||||
+ if (map_coherent && cpu_use_kmap_coherent)
|
||||
kunmap_coherent();
|
||||
else
|
||||
kunmap_atomic(vaddr);
|
||||
--- a/arch/mips/mm/init.c
|
||||
+++ b/arch/mips/mm/init.c
|
||||
@@ -164,7 +164,7 @@ void copy_user_highpage(struct page *to,
|
||||
void *vfrom, *vto;
|
||||
|
||||
vto = kmap_atomic(to);
|
||||
- if (cpu_has_dc_aliases &&
|
||||
+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent &&
|
||||
page_mapped(from) && !Page_dcache_dirty(from)) {
|
||||
vfrom = kmap_coherent(from, vaddr);
|
||||
copy_page(vto, vfrom);
|
||||
@@ -186,7 +186,7 @@ void copy_to_user_page(struct vm_area_st
|
||||
struct page *page, unsigned long vaddr, void *dst, const void *src,
|
||||
unsigned long len)
|
||||
{
|
||||
- if (cpu_has_dc_aliases &&
|
||||
+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent &&
|
||||
page_mapped(page) && !Page_dcache_dirty(page)) {
|
||||
void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
|
||||
memcpy(vto, src, len);
|
||||
@@ -204,7 +204,7 @@ void copy_from_user_page(struct vm_area_
|
||||
struct page *page, unsigned long vaddr, void *dst, const void *src,
|
||||
unsigned long len)
|
||||
{
|
||||
- if (cpu_has_dc_aliases &&
|
||||
+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent &&
|
||||
page_mapped(page) && !Page_dcache_dirty(page)) {
|
||||
void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
|
||||
memcpy(dst, vfrom, len);
|
|
@ -0,0 +1,122 @@
|
|||
From b36f694256f41bc71571f467646d015dda128d14 Mon Sep 17 00:00:00 2001
|
||||
From: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
Date: Sat, 9 Nov 2013 17:03:59 +0100
|
||||
Subject: [PATCH 210/210] b44: register adm switch
|
||||
|
||||
---
|
||||
drivers/net/ethernet/broadcom/b44.c | 57 +++++++++++++++++++++++++++++++++++
|
||||
drivers/net/ethernet/broadcom/b44.h | 3 ++
|
||||
2 files changed, 60 insertions(+)
|
||||
|
||||
--- a/drivers/net/ethernet/broadcom/b44.c
|
||||
+++ b/drivers/net/ethernet/broadcom/b44.c
|
||||
@@ -31,6 +31,8 @@
|
||||
#include <linux/ssb/ssb.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/phy.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/platform_data/adm6996-gpio.h>
|
||||
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/io.h>
|
||||
@@ -2240,6 +2242,70 @@ static void b44_adjust_link(struct net_d
|
||||
}
|
||||
}
|
||||
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+static int b44_register_adm_switch(struct b44 *bp)
|
||||
+{
|
||||
+ int gpio;
|
||||
+ struct platform_device *pdev;
|
||||
+ struct adm6996_gpio_platform_data adm_data = {0};
|
||||
+ struct platform_device_info info = {0};
|
||||
+
|
||||
+ adm_data.model = ADM6996L;
|
||||
+ gpio = bcm47xx_nvram_gpio_pin("adm_eecs");
|
||||
+ if (gpio >= 0)
|
||||
+ adm_data.eecs = gpio;
|
||||
+ else
|
||||
+ adm_data.eecs = 2;
|
||||
+
|
||||
+ gpio = bcm47xx_nvram_gpio_pin("adm_eesk");
|
||||
+ if (gpio >= 0)
|
||||
+ adm_data.eesk = gpio;
|
||||
+ else
|
||||
+ adm_data.eesk = 3;
|
||||
+
|
||||
+ gpio = bcm47xx_nvram_gpio_pin("adm_eedi");
|
||||
+ if (gpio >= 0)
|
||||
+ adm_data.eedi = gpio;
|
||||
+ else
|
||||
+ adm_data.eedi = 4;
|
||||
+
|
||||
+ gpio = bcm47xx_nvram_gpio_pin("adm_rc");
|
||||
+ if (gpio >= 0)
|
||||
+ adm_data.eerc = gpio;
|
||||
+ else
|
||||
+ adm_data.eerc = 5;
|
||||
+
|
||||
+ info.parent = bp->sdev->dev;
|
||||
+ info.name = "adm6996_gpio";
|
||||
+ info.id = -1;
|
||||
+ info.data = &adm_data;
|
||||
+ info.size_data = sizeof(adm_data);
|
||||
+
|
||||
+ if (!bp->adm_switch) {
|
||||
+ pdev = platform_device_register_full(&info);
|
||||
+ if (IS_ERR(pdev))
|
||||
+ return PTR_ERR(pdev);
|
||||
+
|
||||
+ bp->adm_switch = pdev;
|
||||
+ }
|
||||
+ return 0;
|
||||
+}
|
||||
+static void b44_unregister_adm_switch(struct b44 *bp)
|
||||
+{
|
||||
+ if (bp->adm_switch)
|
||||
+ platform_device_unregister(bp->adm_switch);
|
||||
+}
|
||||
+#else
|
||||
+static int b44_register_adm_switch(struct b44 *bp)
|
||||
+{
|
||||
+ return 0;
|
||||
+}
|
||||
+static void b44_unregister_adm_switch(struct b44 *bp)
|
||||
+{
|
||||
+
|
||||
+}
|
||||
+#endif /* CONFIG_BCM47XX */
|
||||
+
|
||||
static int b44_register_phy_one(struct b44 *bp)
|
||||
{
|
||||
struct mii_bus *mii_bus;
|
||||
@@ -2283,6 +2349,9 @@ static int b44_register_phy_one(struct b
|
||||
if (!bp->mii_bus->phy_map[bp->phy_addr] &&
|
||||
(sprom->boardflags_lo & (B44_BOARDFLAG_ROBO | B44_BOARDFLAG_ADM))) {
|
||||
|
||||
+ if (sprom->boardflags_lo & B44_BOARDFLAG_ADM)
|
||||
+ b44_register_adm_switch(bp);
|
||||
+
|
||||
dev_info(sdev->dev,
|
||||
"could not find PHY at %i, use fixed one\n",
|
||||
bp->phy_addr);
|
||||
@@ -2479,6 +2548,7 @@ static void b44_remove_one(struct ssb_de
|
||||
unregister_netdev(dev);
|
||||
if (bp->flags & B44_FLAG_EXTERNAL_PHY)
|
||||
b44_unregister_phy_one(bp);
|
||||
+ b44_unregister_adm_switch(bp);
|
||||
ssb_device_disable(sdev, 0);
|
||||
ssb_bus_may_powerdown(sdev->bus);
|
||||
netif_napi_del(&bp->napi);
|
||||
--- a/drivers/net/ethernet/broadcom/b44.h
|
||||
+++ b/drivers/net/ethernet/broadcom/b44.h
|
||||
@@ -408,6 +408,9 @@ struct b44 {
|
||||
struct mii_bus *mii_bus;
|
||||
int old_link;
|
||||
struct mii_if_info mii_if;
|
||||
+
|
||||
+ /* platform device for associated switch */
|
||||
+ struct platform_device *adm_switch;
|
||||
};
|
||||
|
||||
#endif /* _B44_H */
|
54
target/linux/brcm47xx/patches-4.4/210-b44_phy_fix.patch
Normal file
54
target/linux/brcm47xx/patches-4.4/210-b44_phy_fix.patch
Normal file
|
@ -0,0 +1,54 @@
|
|||
--- a/drivers/net/ethernet/broadcom/b44.c
|
||||
+++ b/drivers/net/ethernet/broadcom/b44.c
|
||||
@@ -431,10 +431,34 @@ static void b44_wap54g10_workaround(stru
|
||||
error:
|
||||
pr_warn("PHY: cannot reset MII transceiver isolate bit\n");
|
||||
}
|
||||
+
|
||||
+static void b44_bcm47xx_workarounds(struct b44 *bp)
|
||||
+{
|
||||
+ char buf[20];
|
||||
+ struct ssb_device *sdev = bp->sdev;
|
||||
+
|
||||
+ /* Toshiba WRC-1000, Siemens SE505 v1, Askey RT-210W, RT-220W */
|
||||
+ if (sdev->bus->sprom.board_num == 100) {
|
||||
+ bp->phy_addr = B44_PHY_ADDR_NO_LOCAL_PHY;
|
||||
+ } else {
|
||||
+ /* WL-HDD */
|
||||
+ if (bcm47xx_nvram_getenv("hardware_version", buf, sizeof(buf)) >= 0 &&
|
||||
+ !strncmp(buf, "WL300-", strlen("WL300-"))) {
|
||||
+ if (sdev->bus->sprom.et0phyaddr == 0 &&
|
||||
+ sdev->bus->sprom.et1phyaddr == 1)
|
||||
+ bp->phy_addr = B44_PHY_ADDR_NO_LOCAL_PHY;
|
||||
+ }
|
||||
+ }
|
||||
+ return;
|
||||
+}
|
||||
#else
|
||||
static inline void b44_wap54g10_workaround(struct b44 *bp)
|
||||
{
|
||||
}
|
||||
+
|
||||
+static inline void b44_bcm47xx_workarounds(struct b44 *bp)
|
||||
+{
|
||||
+}
|
||||
#endif
|
||||
|
||||
static int b44_setup_phy(struct b44 *bp)
|
||||
@@ -443,6 +467,7 @@ static int b44_setup_phy(struct b44 *bp)
|
||||
int err;
|
||||
|
||||
b44_wap54g10_workaround(bp);
|
||||
+ b44_bcm47xx_workarounds(bp);
|
||||
|
||||
if (bp->flags & B44_FLAG_EXTERNAL_PHY)
|
||||
return 0;
|
||||
@@ -2170,6 +2195,8 @@ static int b44_get_invariants(struct b44
|
||||
* valid PHY address. */
|
||||
bp->phy_addr &= 0x1F;
|
||||
|
||||
+ b44_bcm47xx_workarounds(bp);
|
||||
+
|
||||
memcpy(bp->dev->dev_addr, addr, ETH_ALEN);
|
||||
|
||||
if (!is_valid_ether_addr(&bp->dev->dev_addr[0])){
|
|
@ -0,0 +1,25 @@
|
|||
This prevents the options from being delete with make kernel_oldconfig.
|
||||
---
|
||||
drivers/ssb/Kconfig | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
--- a/drivers/bcma/Kconfig
|
||||
+++ b/drivers/bcma/Kconfig
|
||||
@@ -33,6 +33,7 @@ config BCMA_HOST_PCI
|
||||
config BCMA_HOST_SOC
|
||||
bool "Support for BCMA in a SoC"
|
||||
depends on BCMA
|
||||
+ select USB_HCD_BCMA if USB_EHCI_HCD || USB_OHCI_HCD
|
||||
help
|
||||
Host interface for a Broadcom AIX bus directly mapped into
|
||||
the memory. This only works with the Broadcom SoCs from the
|
||||
--- a/drivers/ssb/Kconfig
|
||||
+++ b/drivers/ssb/Kconfig
|
||||
@@ -156,6 +156,7 @@ config SSB_SFLASH
|
||||
config SSB_EMBEDDED
|
||||
bool
|
||||
depends on SSB_DRIVER_MIPS && SSB_PCICORE_HOSTMODE
|
||||
+ select USB_HCD_SSB if USB_EHCI_HCD || USB_OHCI_HCD
|
||||
default y
|
||||
|
||||
config SSB_DRIVER_EXTIF
|
21
target/linux/brcm47xx/patches-4.4/300-fork_cacheflush.patch
Normal file
21
target/linux/brcm47xx/patches-4.4/300-fork_cacheflush.patch
Normal file
|
@ -0,0 +1,21 @@
|
|||
From: Wolfram Joost <dbox2@frokaschwei.de>
|
||||
Subject: [PATCH] fork_cacheflush
|
||||
|
||||
On ASUS WL-500gP there are many unexpected "Segmentation fault"s that
|
||||
seem to be caused by a kernel. They can be avoided by:
|
||||
1) Disabling highpage
|
||||
2) Using flush_cache_mm in flush_cache_dup_mm
|
||||
|
||||
For details see OpenWrt ticket #2035 https://dev.openwrt.org/ticket/2035
|
||||
---
|
||||
--- a/arch/mips/include/asm/cacheflush.h
|
||||
+++ b/arch/mips/include/asm/cacheflush.h
|
||||
@@ -46,7 +46,7 @@
|
||||
extern void (*flush_cache_all)(void);
|
||||
extern void (*__flush_cache_all)(void);
|
||||
extern void (*flush_cache_mm)(struct mm_struct *mm);
|
||||
-#define flush_cache_dup_mm(mm) do { (void) (mm); } while (0)
|
||||
+#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
|
||||
extern void (*flush_cache_range)(struct vm_area_struct *vma,
|
||||
unsigned long start, unsigned long end);
|
||||
extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn);
|
74
target/linux/brcm47xx/patches-4.4/310-no_highpage.patch
Normal file
74
target/linux/brcm47xx/patches-4.4/310-no_highpage.patch
Normal file
|
@ -0,0 +1,74 @@
|
|||
From: Jeff Hansen <jhansen@cardaccess-inc.com>
|
||||
Subject: [PATCH] no highpage
|
||||
|
||||
On ASUS WL-500gP there are many unexpected "Segmentation fault"s that
|
||||
seem to be caused by a kernel. They can be avoided by:
|
||||
1) Disabling highpage
|
||||
2) Using flush_cache_mm in flush_cache_dup_mm
|
||||
|
||||
For details see OpenWrt ticket #2035 https://dev.openwrt.org/ticket/2035
|
||||
---
|
||||
--- a/arch/mips/include/asm/page.h
|
||||
+++ b/arch/mips/include/asm/page.h
|
||||
@@ -71,6 +71,7 @@ static inline unsigned int page_size_ftl
|
||||
#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
|
||||
|
||||
#include <linux/pfn.h>
|
||||
+#include <asm/cpu-features.h>
|
||||
|
||||
extern void build_clear_page(void);
|
||||
extern void build_copy_page(void);
|
||||
@@ -105,11 +106,16 @@ static inline void clear_user_page(void
|
||||
flush_data_cache_page((unsigned long)addr);
|
||||
}
|
||||
|
||||
-struct vm_area_struct;
|
||||
-extern void copy_user_highpage(struct page *to, struct page *from,
|
||||
- unsigned long vaddr, struct vm_area_struct *vma);
|
||||
+static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
|
||||
+ struct page *to)
|
||||
+{
|
||||
+ extern void (*flush_data_cache_page)(unsigned long addr);
|
||||
|
||||
-#define __HAVE_ARCH_COPY_USER_HIGHPAGE
|
||||
+ copy_page(vto, vfrom);
|
||||
+ if (!cpu_has_ic_fills_f_dc ||
|
||||
+ pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
|
||||
+ flush_data_cache_page((unsigned long)vto);
|
||||
+}
|
||||
|
||||
/*
|
||||
* These are used to make use of C type-checking..
|
||||
--- a/arch/mips/mm/init.c
|
||||
+++ b/arch/mips/mm/init.c
|
||||
@@ -158,30 +158,6 @@ void kunmap_coherent(void)
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
-void copy_user_highpage(struct page *to, struct page *from,
|
||||
- unsigned long vaddr, struct vm_area_struct *vma)
|
||||
-{
|
||||
- void *vfrom, *vto;
|
||||
-
|
||||
- vto = kmap_atomic(to);
|
||||
- if (cpu_has_dc_aliases && cpu_use_kmap_coherent &&
|
||||
- page_mapped(from) && !Page_dcache_dirty(from)) {
|
||||
- vfrom = kmap_coherent(from, vaddr);
|
||||
- copy_page(vto, vfrom);
|
||||
- kunmap_coherent();
|
||||
- } else {
|
||||
- vfrom = kmap_atomic(from);
|
||||
- copy_page(vto, vfrom);
|
||||
- kunmap_atomic(vfrom);
|
||||
- }
|
||||
- if ((!cpu_has_ic_fills_f_dc) ||
|
||||
- pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
|
||||
- flush_data_cache_page((unsigned long)vto);
|
||||
- kunmap_atomic(vto);
|
||||
- /* Make sure this page is cleared on other CPU's too before using it */
|
||||
- smp_wmb();
|
||||
-}
|
||||
-
|
||||
void copy_to_user_page(struct vm_area_struct *vma,
|
||||
struct page *page, unsigned long vaddr, void *dst, const void *src,
|
||||
unsigned long len)
|
|
@ -0,0 +1,223 @@
|
|||
--- a/arch/mips/bcm47xx/board.c
|
||||
+++ b/arch/mips/bcm47xx/board.c
|
||||
@@ -140,6 +140,7 @@ struct bcm47xx_board_type_list2 bcm47xx_
|
||||
{{BCM47XX_BOARD_LINKSYS_WRT300NV11, "Linksys WRT300N V1.1"}, "WRT300N", "1.1"},
|
||||
{{BCM47XX_BOARD_LINKSYS_WRT310NV1, "Linksys WRT310N V1"}, "WRT310N", "1.0"},
|
||||
{{BCM47XX_BOARD_LINKSYS_WRT310NV2, "Linksys WRT310N V2"}, "WRT310N", "2.0"},
|
||||
+ {{BCM47XX_BOARD_LINKSYS_WRT320N_V1, "Linksys WRT320N V1"}, "WRT320N", "1.0"},
|
||||
{{BCM47XX_BOARD_LINKSYS_WRT54G3GV2, "Linksys WRT54G3GV2-VF"}, "WRT54G3GV2-VF", "1.0"},
|
||||
{{BCM47XX_BOARD_LINKSYS_WRT610NV1, "Linksys WRT610N V1"}, "WRT610N", "1.0"},
|
||||
{{BCM47XX_BOARD_LINKSYS_WRT610NV2, "Linksys WRT610N V2"}, "WRT610N", "2.0"},
|
||||
@@ -150,9 +151,12 @@ struct bcm47xx_board_type_list2 bcm47xx_
|
||||
static const
|
||||
struct bcm47xx_board_type_list1 bcm47xx_board_list_board_id[] __initconst = {
|
||||
{{BCM47XX_BOARD_LUXUL_XWR_1750_V1, "Luxul XWR-1750 V1"}, "luxul_xwr1750_v1"},
|
||||
+ {{BCM47XX_BOARD_NETGEAR_R6300_V1, "Netgear R6300 V1"}, "U12H218T00_NETGEAR"},
|
||||
{{BCM47XX_BOARD_NETGEAR_WGR614V8, "Netgear WGR614 V8"}, "U12H072T00_NETGEAR"},
|
||||
{{BCM47XX_BOARD_NETGEAR_WGR614V9, "Netgear WGR614 V9"}, "U12H094T00_NETGEAR"},
|
||||
{{BCM47XX_BOARD_NETGEAR_WGR614_V10, "Netgear WGR614 V10"}, "U12H139T01_NETGEAR"},
|
||||
+ {{BCM47XX_BOARD_NETGEAR_WN2500RP_V1, "Netgear WN2500RP V1"}, "U12H197T00_NETGEAR"},
|
||||
+ {{BCM47XX_BOARD_NETGEAR_WN2500RP_V2, "Netgear WN2500RP V2"}, "U12H294T00_NETGEAR"},
|
||||
{{BCM47XX_BOARD_NETGEAR_WNDR3300, "Netgear WNDR3300"}, "U12H093T00_NETGEAR"},
|
||||
{{BCM47XX_BOARD_NETGEAR_WNDR3400V1, "Netgear WNDR3400 V1"}, "U12H155T00_NETGEAR"},
|
||||
{{BCM47XX_BOARD_NETGEAR_WNDR3400V2, "Netgear WNDR3400 V2"}, "U12H187T00_NETGEAR"},
|
||||
@@ -162,6 +166,7 @@ struct bcm47xx_board_type_list1 bcm47xx_
|
||||
{{BCM47XX_BOARD_NETGEAR_WNDR4000, "Netgear WNDR4000"}, "U12H181T00_NETGEAR"},
|
||||
{{BCM47XX_BOARD_NETGEAR_WNDR4500V1, "Netgear WNDR4500 V1"}, "U12H189T00_NETGEAR"},
|
||||
{{BCM47XX_BOARD_NETGEAR_WNDR4500V2, "Netgear WNDR4500 V2"}, "U12H224T00_NETGEAR"},
|
||||
+ {{BCM47XX_BOARD_NETGEAR_WNR1000_V3, "Netgear WNR1000 V3"}, "U12H139T50_NETGEAR"},
|
||||
{{BCM47XX_BOARD_NETGEAR_WNR2000, "Netgear WNR2000"}, "U12H114T00_NETGEAR"},
|
||||
{{BCM47XX_BOARD_NETGEAR_WNR3500L, "Netgear WNR3500L"}, "U12H136T99_NETGEAR"},
|
||||
{{BCM47XX_BOARD_NETGEAR_WNR3500U, "Netgear WNR3500U"}, "U12H136T00_NETGEAR"},
|
||||
--- a/arch/mips/bcm47xx/buttons.c
|
||||
+++ b/arch/mips/bcm47xx/buttons.c
|
||||
@@ -20,6 +20,12 @@
|
||||
/* Asus */
|
||||
|
||||
static const struct gpio_keys_button
|
||||
+bcm47xx_buttons_asus_rtn10u[] __initconst = {
|
||||
+ BCM47XX_GPIO_KEY(20, KEY_WPS_BUTTON),
|
||||
+ BCM47XX_GPIO_KEY(21, KEY_RESTART),
|
||||
+};
|
||||
+
|
||||
+static const struct gpio_keys_button
|
||||
bcm47xx_buttons_asus_rtn12[] __initconst = {
|
||||
BCM47XX_GPIO_KEY(0, KEY_WPS_BUTTON),
|
||||
BCM47XX_GPIO_KEY(1, KEY_RESTART),
|
||||
@@ -270,6 +276,18 @@ bcm47xx_buttons_linksys_wrt310nv1[] __in
|
||||
};
|
||||
|
||||
static const struct gpio_keys_button
|
||||
+bcm47xx_buttons_linksys_wrt310n_v2[] __initconst = {
|
||||
+ BCM47XX_GPIO_KEY(5, KEY_WPS_BUTTON),
|
||||
+ BCM47XX_GPIO_KEY(6, KEY_RESTART),
|
||||
+};
|
||||
+
|
||||
+static const struct gpio_keys_button
|
||||
+bcm47xx_buttons_linksys_wrt320n_v1[] __initconst = {
|
||||
+ BCM47XX_GPIO_KEY(5, KEY_WPS_BUTTON),
|
||||
+ BCM47XX_GPIO_KEY(8, KEY_RESTART),
|
||||
+};
|
||||
+
|
||||
+static const struct gpio_keys_button
|
||||
bcm47xx_buttons_linksys_wrt54g3gv2[] __initconst = {
|
||||
BCM47XX_GPIO_KEY(5, KEY_WIMAX),
|
||||
BCM47XX_GPIO_KEY(6, KEY_RESTART),
|
||||
@@ -333,6 +351,17 @@ bcm47xx_buttons_motorola_wr850gv2v3[] __
|
||||
/* Netgear */
|
||||
|
||||
static const struct gpio_keys_button
|
||||
+bcm47xx_buttons_netgear_r6300_v1[] __initconst = {
|
||||
+ BCM47XX_GPIO_KEY(6, KEY_RESTART),
|
||||
+};
|
||||
+
|
||||
+static const struct gpio_keys_button
|
||||
+bcm47xx_buttons_netgear_wn2500rp_v1[] __initconst = {
|
||||
+ BCM47XX_GPIO_KEY(12, KEY_RESTART),
|
||||
+ BCM47XX_GPIO_KEY(31, KEY_WPS_BUTTON),
|
||||
+};
|
||||
+
|
||||
+static const struct gpio_keys_button
|
||||
bcm47xx_buttons_netgear_wndr3400v1[] __initconst = {
|
||||
BCM47XX_GPIO_KEY(4, KEY_RESTART),
|
||||
BCM47XX_GPIO_KEY(6, KEY_WPS_BUTTON),
|
||||
@@ -360,6 +389,11 @@ bcm47xx_buttons_netgear_wndr4500v1[] __i
|
||||
};
|
||||
|
||||
static const struct gpio_keys_button
|
||||
+bcm47xx_buttons_netgear_wnr1000_v3[] __initconst = {
|
||||
+ BCM47XX_GPIO_KEY(3, KEY_RESTART),
|
||||
+};
|
||||
+
|
||||
+static const struct gpio_keys_button
|
||||
bcm47xx_buttons_netgear_wnr3500lv1[] __initconst = {
|
||||
BCM47XX_GPIO_KEY(4, KEY_RESTART),
|
||||
BCM47XX_GPIO_KEY(6, KEY_WPS_BUTTON),
|
||||
@@ -413,6 +447,9 @@ int __init bcm47xx_buttons_register(void
|
||||
int err;
|
||||
|
||||
switch (board) {
|
||||
+ case BCM47XX_BOARD_ASUS_RTN10U:
|
||||
+ err = bcm47xx_copy_bdata(bcm47xx_buttons_asus_rtn10u);
|
||||
+ break;
|
||||
case BCM47XX_BOARD_ASUS_RTN12:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_asus_rtn12);
|
||||
break;
|
||||
@@ -543,6 +580,12 @@ int __init bcm47xx_buttons_register(void
|
||||
case BCM47XX_BOARD_LINKSYS_WRT310NV1:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt310nv1);
|
||||
break;
|
||||
+ case BCM47XX_BOARD_LINKSYS_WRT310NV2:
|
||||
+ err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt310n_v2);
|
||||
+ break;
|
||||
+ case BCM47XX_BOARD_LINKSYS_WRT320N_V1:
|
||||
+ err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt320n_v1);
|
||||
+ break;
|
||||
case BCM47XX_BOARD_LINKSYS_WRT54G3GV2:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt54g3gv2);
|
||||
break;
|
||||
@@ -579,6 +622,12 @@ int __init bcm47xx_buttons_register(void
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_motorola_wr850gv2v3);
|
||||
break;
|
||||
|
||||
+ case BCM47XX_BOARD_NETGEAR_R6300_V1:
|
||||
+ err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_r6300_v1);
|
||||
+ break;
|
||||
+ case BCM47XX_BOARD_NETGEAR_WN2500RP_V1:
|
||||
+ err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wn2500rp_v1);
|
||||
+ break;
|
||||
case BCM47XX_BOARD_NETGEAR_WNDR3400V1:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wndr3400v1);
|
||||
break;
|
||||
@@ -591,6 +640,9 @@ int __init bcm47xx_buttons_register(void
|
||||
case BCM47XX_BOARD_NETGEAR_WNDR4500V1:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wndr4500v1);
|
||||
break;
|
||||
+ case BCM47XX_BOARD_NETGEAR_WNR1000_V3:
|
||||
+ err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wnr1000_v3);
|
||||
+ break;
|
||||
case BCM47XX_BOARD_NETGEAR_WNR3500L:
|
||||
err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wnr3500lv1);
|
||||
break;
|
||||
--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h
|
||||
+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h
|
||||
@@ -71,6 +71,7 @@ enum bcm47xx_board {
|
||||
BCM47XX_BOARD_LINKSYS_WRT300NV11,
|
||||
BCM47XX_BOARD_LINKSYS_WRT310NV1,
|
||||
BCM47XX_BOARD_LINKSYS_WRT310NV2,
|
||||
+ BCM47XX_BOARD_LINKSYS_WRT320N_V1,
|
||||
BCM47XX_BOARD_LINKSYS_WRT54G3GV2,
|
||||
BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0101,
|
||||
BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0467,
|
||||
@@ -88,9 +89,12 @@ enum bcm47xx_board {
|
||||
BCM47XX_BOARD_MOTOROLA_WR850GP,
|
||||
BCM47XX_BOARD_MOTOROLA_WR850GV2V3,
|
||||
|
||||
+ BCM47XX_BOARD_NETGEAR_R6300_V1,
|
||||
BCM47XX_BOARD_NETGEAR_WGR614V8,
|
||||
BCM47XX_BOARD_NETGEAR_WGR614V9,
|
||||
BCM47XX_BOARD_NETGEAR_WGR614_V10,
|
||||
+ BCM47XX_BOARD_NETGEAR_WN2500RP_V1,
|
||||
+ BCM47XX_BOARD_NETGEAR_WN2500RP_V2,
|
||||
BCM47XX_BOARD_NETGEAR_WNDR3300,
|
||||
BCM47XX_BOARD_NETGEAR_WNDR3400V1,
|
||||
BCM47XX_BOARD_NETGEAR_WNDR3400V2,
|
||||
@@ -100,6 +104,7 @@ enum bcm47xx_board {
|
||||
BCM47XX_BOARD_NETGEAR_WNDR4000,
|
||||
BCM47XX_BOARD_NETGEAR_WNDR4500V1,
|
||||
BCM47XX_BOARD_NETGEAR_WNDR4500V2,
|
||||
+ BCM47XX_BOARD_NETGEAR_WNR1000_V3,
|
||||
BCM47XX_BOARD_NETGEAR_WNR2000,
|
||||
BCM47XX_BOARD_NETGEAR_WNR3500L,
|
||||
BCM47XX_BOARD_NETGEAR_WNR3500U,
|
||||
--- a/arch/mips/bcm47xx/leds.c
|
||||
+++ b/arch/mips/bcm47xx/leds.c
|
||||
@@ -29,6 +29,14 @@
|
||||
/* Asus */
|
||||
|
||||
static const struct gpio_led
|
||||
+bcm47xx_leds_asus_rtn10u[] __initconst = {
|
||||
+ BCM47XX_GPIO_LED(5, "green", "wlan", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(6, "green", "power", 1, LEDS_GPIO_DEFSTATE_ON),
|
||||
+ BCM47XX_GPIO_LED(7, "green", "wps", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(8, "green", "usb", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+};
|
||||
+
|
||||
+static const struct gpio_led
|
||||
bcm47xx_leds_asus_rtn12[] __initconst = {
|
||||
BCM47XX_GPIO_LED(2, "unk", "power", 1, LEDS_GPIO_DEFSTATE_ON),
|
||||
BCM47XX_GPIO_LED(7, "unk", "wlan", 0, LEDS_GPIO_DEFSTATE_OFF),
|
||||
@@ -313,6 +321,13 @@ bcm47xx_leds_linksys_wrt310nv1[] __initc
|
||||
};
|
||||
|
||||
static const struct gpio_led
|
||||
+bcm47xx_leds_linksys_wrt320n_v1[] __initconst = {
|
||||
+ BCM47XX_GPIO_LED(1, "blue", "wlan", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+ BCM47XX_GPIO_LED(2, "blue", "power", 0, LEDS_GPIO_DEFSTATE_ON),
|
||||
+ BCM47XX_GPIO_LED(4, "amber", "wps", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
+};
|
||||
+
|
||||
+static const struct gpio_led
|
||||
bcm47xx_leds_linksys_wrt54g_generic[] __initconst = {
|
||||
BCM47XX_GPIO_LED(0, "unk", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF),
|
||||
BCM47XX_GPIO_LED(1, "unk", "power", 0, LEDS_GPIO_DEFSTATE_ON),
|
||||
@@ -478,6 +493,9 @@ void __init bcm47xx_leds_register(void)
|
||||
enum bcm47xx_board board = bcm47xx_board_get();
|
||||
|
||||
switch (board) {
|
||||
+ case BCM47XX_BOARD_ASUS_RTN10U:
|
||||
+ bcm47xx_set_pdata(bcm47xx_leds_asus_rtn10u);
|
||||
+ break;
|
||||
case BCM47XX_BOARD_ASUS_RTN12:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_asus_rtn12);
|
||||
break;
|
||||
@@ -611,6 +629,9 @@ void __init bcm47xx_leds_register(void)
|
||||
case BCM47XX_BOARD_LINKSYS_WRT310NV1:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt310nv1);
|
||||
break;
|
||||
+ case BCM47XX_BOARD_LINKSYS_WRT320N_V1:
|
||||
+ bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt320n_v1);
|
||||
+ break;
|
||||
case BCM47XX_BOARD_LINKSYS_WRT54G3GV2:
|
||||
bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt54g3gv2);
|
||||
break;
|
|
@ -0,0 +1,34 @@
|
|||
--- a/drivers/mtd/bcm47xxpart.c
|
||||
+++ b/drivers/mtd/bcm47xxpart.c
|
||||
@@ -100,6 +100,7 @@ static int bcm47xxpart_parse(struct mtd_
|
||||
int last_trx_part = -1;
|
||||
int possible_nvram_sizes[] = { 0x8000, 0xF000, 0x10000, };
|
||||
int err;
|
||||
+ bool found_nvram = false;
|
||||
|
||||
/*
|
||||
* Some really old flashes (like AT45DB*) had smaller erasesize-s, but
|
||||
@@ -306,12 +307,23 @@ static int bcm47xxpart_parse(struct mtd_
|
||||
if (buf[0] == NVRAM_HEADER) {
|
||||
bcm47xxpart_add_part(&parts[curr_part++], "nvram",
|
||||
master->size - blocksize, 0);
|
||||
+ found_nvram = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
kfree(buf);
|
||||
|
||||
+ if (!found_nvram) {
|
||||
+ pr_err("can not find a nvram partition reserve last block\n");
|
||||
+ bcm47xxpart_add_part(&parts[curr_part++], "nvram_guess",
|
||||
+ master->size - blocksize * 2, MTD_WRITEABLE);
|
||||
+ for (i = 0; i < curr_part; i++) {
|
||||
+ if (parts[i].size + parts[i].offset == master->size)
|
||||
+ parts[i].offset -= blocksize * 2;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
/*
|
||||
* Assume that partitions end at the beginning of the one they are
|
||||
* followed by.
|
41
target/linux/brcm47xx/patches-4.4/610-pci_ide_fix.patch
Normal file
41
target/linux/brcm47xx/patches-4.4/610-pci_ide_fix.patch
Normal file
|
@ -0,0 +1,41 @@
|
|||
From: b.sander
|
||||
Subject: [PATCH] pci: IDE fix
|
||||
|
||||
These are standard probing messages when using pdc202xx_old:
|
||||
pdc202xx_old 0000:00:01.0: IDE controller (0x105a:0x0d30 rev 0x02)
|
||||
PCI: Enabling device 0000:00:01.0 (0004 -> 0007)
|
||||
PCI: Fixing up device 0000:00:01.0
|
||||
0000:00:01.0: (U)DMA Burst Bit DISABLED Primary PCI Mode Secondary PCI Mode.
|
||||
0000:00:01.0: FORCING BURST BIT 0x00->0x01 ACTIVE
|
||||
pdc202xx_old 0000:00:01.0: 100% native mode on irq 6
|
||||
|
||||
With the default MAX_HWIFS value after above we get:
|
||||
ide2: BM-DMA at 0x0400-0x0407
|
||||
ide3: BM-DMA at 0x0408-0x040f
|
||||
Probing IDE interface ide2...
|
||||
hde: CF500, CFA DISK drive
|
||||
|
||||
As you can see it's ide2 + ide3 and hde.
|
||||
|
||||
With this patch applied we get:
|
||||
ide0: BM-DMA at 0x0400-0x0407
|
||||
ide1: BM-DMA at 0x0408-0x040f
|
||||
Probing IDE interface ide0...
|
||||
hda: CF500, CFA DISK drive
|
||||
|
||||
This fixes OpenWrt ticket #7061: https://dev.openwrt.org/ticket/7061
|
||||
---
|
||||
--- a/include/linux/ide.h
|
||||
+++ b/include/linux/ide.h
|
||||
@@ -204,7 +204,11 @@ static inline void ide_std_init_ports(st
|
||||
hw->io_ports.ctl_addr = ctl_addr;
|
||||
}
|
||||
|
||||
+#if defined CONFIG_BCM47XX
|
||||
+# define MAX_HWIFS 2
|
||||
+#else
|
||||
#define MAX_HWIFS 10
|
||||
+#endif
|
||||
|
||||
/*
|
||||
* Now for the data we need to maintain per-drive: ide_drive_t
|
17
target/linux/brcm47xx/patches-4.4/791-tg3-no-pci-sleep.patch
Normal file
17
target/linux/brcm47xx/patches-4.4/791-tg3-no-pci-sleep.patch
Normal file
|
@ -0,0 +1,17 @@
|
|||
When the Ethernet controller is powered down and someone wants to
|
||||
access the mdio bus like the witch driver (b53) the system crashed if
|
||||
PCI_D3hot was set before. This patch deactivates this power sawing mode
|
||||
when a switch driver is in use.
|
||||
|
||||
--- a/drivers/net/ethernet/broadcom/tg3.c
|
||||
+++ b/drivers/net/ethernet/broadcom/tg3.c
|
||||
@@ -4263,7 +4263,8 @@ static int tg3_power_down_prepare(struct
|
||||
static void tg3_power_down(struct tg3 *tp)
|
||||
{
|
||||
pci_wake_from_d3(tp->pdev, tg3_flag(tp, WOL_ENABLE));
|
||||
- pci_set_power_state(tp->pdev, PCI_D3hot);
|
||||
+ if (!tg3_flag(tp, ROBOSWITCH))
|
||||
+ pci_set_power_state(tp->pdev, PCI_D3hot);
|
||||
}
|
||||
|
||||
static void tg3_aux_stat_to_speed_duplex(struct tg3 *tp, u32 val, u16 *speed, u8 *duplex)
|
|
@ -0,0 +1,73 @@
|
|||
From 597715c61ae75a05ab3310a34ff3857a006f0f63 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
|
||||
Date: Thu, 20 Nov 2014 21:32:42 +0100
|
||||
Subject: [PATCH] bcma: add table of serial flashes with smaller blocks
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
|
||||
---
|
||||
drivers/bcma/driver_chipcommon_sflash.c | 29 +++++++++++++++++++++++++++++
|
||||
1 file changed, 29 insertions(+)
|
||||
|
||||
--- a/drivers/bcma/driver_chipcommon_sflash.c
|
||||
+++ b/drivers/bcma/driver_chipcommon_sflash.c
|
||||
@@ -9,6 +9,7 @@
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/bcma/bcma.h>
|
||||
+#include <bcm47xx_board.h>
|
||||
|
||||
static struct resource bcma_sflash_resource = {
|
||||
.name = "bcma_sflash",
|
||||
@@ -41,6 +42,13 @@ static const struct bcma_sflash_tbl_e bc
|
||||
{ NULL },
|
||||
};
|
||||
|
||||
+/* Some devices use smaller blocks (and have more of them) */
|
||||
+static const struct bcma_sflash_tbl_e bcma_sflash_st_shrink_tbl[] = {
|
||||
+ { "M25P16", 0x14, 0x1000, 512, },
|
||||
+ { "M25P32", 0x15, 0x1000, 1024, },
|
||||
+ { NULL },
|
||||
+};
|
||||
+
|
||||
static const struct bcma_sflash_tbl_e bcma_sflash_sst_tbl[] = {
|
||||
{ "SST25WF512", 1, 0x1000, 16, },
|
||||
{ "SST25VF512", 0x48, 0x1000, 16, },
|
||||
@@ -84,6 +92,24 @@ static void bcma_sflash_cmd(struct bcma_
|
||||
bcma_err(cc->core->bus, "SFLASH control command failed (timeout)!\n");
|
||||
}
|
||||
|
||||
+const struct bcma_sflash_tbl_e *bcma_sflash_shrink_flash(u32 id)
|
||||
+{
|
||||
+ enum bcm47xx_board board = bcm47xx_board_get();
|
||||
+ const struct bcma_sflash_tbl_e *e;
|
||||
+
|
||||
+ switch (board) {
|
||||
+ case BCM47XX_BOARD_NETGEAR_WGR614_V10:
|
||||
+ case BCM47XX_BOARD_NETGEAR_WNR1000_V3:
|
||||
+ for (e = bcma_sflash_st_shrink_tbl; e->name; e++) {
|
||||
+ if (e->id == id)
|
||||
+ return e;
|
||||
+ }
|
||||
+ return NULL;
|
||||
+ default:
|
||||
+ return NULL;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
/* Initialize serial flash access */
|
||||
int bcma_sflash_init(struct bcma_drv_cc *cc)
|
||||
{
|
||||
@@ -114,6 +140,10 @@ int bcma_sflash_init(struct bcma_drv_cc
|
||||
case 0x13:
|
||||
return -ENOTSUPP;
|
||||
default:
|
||||
+ e = bcma_sflash_shrink_flash(id);
|
||||
+ if (e)
|
||||
+ break;
|
||||
+
|
||||
for (e = bcma_sflash_st_tbl; e->name; e++) {
|
||||
if (e->id == id)
|
||||
break;
|
293
target/linux/brcm47xx/patches-4.4/820-wgt634u-nvram-fix.patch
Normal file
293
target/linux/brcm47xx/patches-4.4/820-wgt634u-nvram-fix.patch
Normal file
|
@ -0,0 +1,293 @@
|
|||
The Netgear wgt634u uses a different format for storing the
|
||||
configuration. This patch is needed to read out the correct
|
||||
configuration. The cfe_env.c file uses a different method way to read
|
||||
out the configuration than the in kernel cfe config reader.
|
||||
|
||||
--- a/drivers/firmware/broadcom/Makefile
|
||||
+++ b/drivers/firmware/broadcom/Makefile
|
||||
@@ -1 +1 @@
|
||||
-obj-$(CONFIG_BCM47XX_NVRAM) += bcm47xx_nvram.o
|
||||
+obj-$(CONFIG_BCM47XX_NVRAM) += bcm47xx_nvram.o cfe_env.o
|
||||
--- /dev/null
|
||||
+++ b/drivers/firmware/broadcom/cfe_env.c
|
||||
@@ -0,0 +1,228 @@
|
||||
+/*
|
||||
+ * CFE environment variable access
|
||||
+ *
|
||||
+ * Copyright 2001-2003, Broadcom Corporation
|
||||
+ * Copyright 2006, Felix Fietkau <nbd@openwrt.org>
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or modify it
|
||||
+ * under the terms of the GNU General Public License as published by the
|
||||
+ * Free Software Foundation; either version 2 of the License, or (at your
|
||||
+ * option) any later version.
|
||||
+ */
|
||||
+
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/string.h>
|
||||
+#include <asm/io.h>
|
||||
+#include <asm/uaccess.h>
|
||||
+
|
||||
+#define NVRAM_SIZE (0x1ff0)
|
||||
+static char _nvdata[NVRAM_SIZE];
|
||||
+static char _valuestr[256];
|
||||
+
|
||||
+/*
|
||||
+ * TLV types. These codes are used in the "type-length-value"
|
||||
+ * encoding of the items stored in the NVRAM device (flash or EEPROM)
|
||||
+ *
|
||||
+ * The layout of the flash/nvram is as follows:
|
||||
+ *
|
||||
+ * <type> <length> <data ...> <type> <length> <data ...> <type_end>
|
||||
+ *
|
||||
+ * The type code of "ENV_TLV_TYPE_END" marks the end of the list.
|
||||
+ * The "length" field marks the length of the data section, not
|
||||
+ * including the type and length fields.
|
||||
+ *
|
||||
+ * Environment variables are stored as follows:
|
||||
+ *
|
||||
+ * <type_env> <length> <flags> <name> = <value>
|
||||
+ *
|
||||
+ * If bit 0 (low bit) is set, the length is an 8-bit value.
|
||||
+ * If bit 0 (low bit) is clear, the length is a 16-bit value
|
||||
+ *
|
||||
+ * Bit 7 set indicates "user" TLVs. In this case, bit 0 still
|
||||
+ * indicates the size of the length field.
|
||||
+ *
|
||||
+ * Flags are from the constants below:
|
||||
+ *
|
||||
+ */
|
||||
+#define ENV_LENGTH_16BITS 0x00 /* for low bit */
|
||||
+#define ENV_LENGTH_8BITS 0x01
|
||||
+
|
||||
+#define ENV_TYPE_USER 0x80
|
||||
+
|
||||
+#define ENV_CODE_SYS(n,l) (((n)<<1)|(l))
|
||||
+#define ENV_CODE_USER(n,l) ((((n)<<1)|(l)) | ENV_TYPE_USER)
|
||||
+
|
||||
+/*
|
||||
+ * The actual TLV types we support
|
||||
+ */
|
||||
+
|
||||
+#define ENV_TLV_TYPE_END 0x00
|
||||
+#define ENV_TLV_TYPE_ENV ENV_CODE_SYS(0,ENV_LENGTH_8BITS)
|
||||
+
|
||||
+/*
|
||||
+ * Environment variable flags
|
||||
+ */
|
||||
+
|
||||
+#define ENV_FLG_NORMAL 0x00 /* normal read/write */
|
||||
+#define ENV_FLG_BUILTIN 0x01 /* builtin - not stored in flash */
|
||||
+#define ENV_FLG_READONLY 0x02 /* read-only - cannot be changed */
|
||||
+
|
||||
+#define ENV_FLG_MASK 0xFF /* mask of attributes we keep */
|
||||
+#define ENV_FLG_ADMIN 0x100 /* lets us internally override permissions */
|
||||
+
|
||||
+
|
||||
+/* *********************************************************************
|
||||
+ * _nvram_read(buffer,offset,length)
|
||||
+ *
|
||||
+ * Read data from the NVRAM device
|
||||
+ *
|
||||
+ * Input parameters:
|
||||
+ * buffer - destination buffer
|
||||
+ * offset - offset of data to read
|
||||
+ * length - number of bytes to read
|
||||
+ *
|
||||
+ * Return value:
|
||||
+ * number of bytes read, or <0 if error occured
|
||||
+ ********************************************************************* */
|
||||
+static int
|
||||
+_nvram_read(unsigned char *nv_buf, unsigned char *buffer, int offset, int length)
|
||||
+{
|
||||
+ int i;
|
||||
+ if (offset > NVRAM_SIZE)
|
||||
+ return -1;
|
||||
+
|
||||
+ for ( i = 0; i < length; i++) {
|
||||
+ buffer[i] = ((volatile unsigned char*)nv_buf)[offset + i];
|
||||
+ }
|
||||
+ return length;
|
||||
+}
|
||||
+
|
||||
+
|
||||
+static char*
|
||||
+_strnchr(const char *dest,int c,size_t cnt)
|
||||
+{
|
||||
+ while (*dest && (cnt > 0)) {
|
||||
+ if (*dest == c) return (char *) dest;
|
||||
+ dest++;
|
||||
+ cnt--;
|
||||
+ }
|
||||
+ return NULL;
|
||||
+}
|
||||
+
|
||||
+
|
||||
+
|
||||
+/*
|
||||
+ * Core support API: Externally visible.
|
||||
+ */
|
||||
+
|
||||
+/*
|
||||
+ * Get the value of an NVRAM variable
|
||||
+ * @param name name of variable to get
|
||||
+ * @return value of variable or NULL if undefined
|
||||
+ */
|
||||
+
|
||||
+char *cfe_env_get(unsigned char *nv_buf, const char *name)
|
||||
+{
|
||||
+ int size;
|
||||
+ unsigned char *buffer;
|
||||
+ unsigned char *ptr;
|
||||
+ unsigned char *envval;
|
||||
+ unsigned int reclen;
|
||||
+ unsigned int rectype;
|
||||
+ int offset;
|
||||
+ int flg;
|
||||
+
|
||||
+ if (!strcmp(name, "nvram_type"))
|
||||
+ return "cfe";
|
||||
+
|
||||
+ size = NVRAM_SIZE;
|
||||
+ buffer = &_nvdata[0];
|
||||
+
|
||||
+ ptr = buffer;
|
||||
+ offset = 0;
|
||||
+
|
||||
+ /* Read the record type and length */
|
||||
+ if (_nvram_read(nv_buf, ptr,offset,1) != 1) {
|
||||
+ goto error;
|
||||
+ }
|
||||
+
|
||||
+ while ((*ptr != ENV_TLV_TYPE_END) && (size > 1)) {
|
||||
+
|
||||
+ /* Adjust pointer for TLV type */
|
||||
+ rectype = *(ptr);
|
||||
+ offset++;
|
||||
+ size--;
|
||||
+
|
||||
+ /*
|
||||
+ * Read the length. It can be either 1 or 2 bytes
|
||||
+ * depending on the code
|
||||
+ */
|
||||
+ if (rectype & ENV_LENGTH_8BITS) {
|
||||
+ /* Read the record type and length - 8 bits */
|
||||
+ if (_nvram_read(nv_buf, ptr,offset,1) != 1) {
|
||||
+ goto error;
|
||||
+ }
|
||||
+ reclen = *(ptr);
|
||||
+ size--;
|
||||
+ offset++;
|
||||
+ }
|
||||
+ else {
|
||||
+ /* Read the record type and length - 16 bits, MSB first */
|
||||
+ if (_nvram_read(nv_buf, ptr,offset,2) != 2) {
|
||||
+ goto error;
|
||||
+ }
|
||||
+ reclen = (((unsigned int) *(ptr)) << 8) + (unsigned int) *(ptr+1);
|
||||
+ size -= 2;
|
||||
+ offset += 2;
|
||||
+ }
|
||||
+
|
||||
+ if (reclen > size)
|
||||
+ break; /* should not happen, bad NVRAM */
|
||||
+
|
||||
+ switch (rectype) {
|
||||
+ case ENV_TLV_TYPE_ENV:
|
||||
+ /* Read the TLV data */
|
||||
+ if (_nvram_read(nv_buf, ptr,offset,reclen) != reclen)
|
||||
+ goto error;
|
||||
+ flg = *ptr++;
|
||||
+ envval = (unsigned char *) _strnchr(ptr,'=',(reclen-1));
|
||||
+ if (envval) {
|
||||
+ *envval++ = '\0';
|
||||
+ memcpy(_valuestr,envval,(reclen-1)-(envval-ptr));
|
||||
+ _valuestr[(reclen-1)-(envval-ptr)] = '\0';
|
||||
+#if 0
|
||||
+ printk(KERN_INFO "NVRAM:%s=%s\n", ptr, _valuestr);
|
||||
+#endif
|
||||
+ if(!strcmp(ptr, name)){
|
||||
+ return _valuestr;
|
||||
+ }
|
||||
+ if((strlen(ptr) > 1) && !strcmp(&ptr[1], name))
|
||||
+ return _valuestr;
|
||||
+ }
|
||||
+ break;
|
||||
+
|
||||
+ default:
|
||||
+ /* Unknown TLV type, skip it. */
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ /*
|
||||
+ * Advance to next TLV
|
||||
+ */
|
||||
+
|
||||
+ size -= (int)reclen;
|
||||
+ offset += reclen;
|
||||
+
|
||||
+ /* Read the next record type */
|
||||
+ ptr = buffer;
|
||||
+ if (_nvram_read(nv_buf, ptr,offset,1) != 1)
|
||||
+ goto error;
|
||||
+ }
|
||||
+
|
||||
+error:
|
||||
+ return NULL;
|
||||
+
|
||||
+}
|
||||
+
|
||||
--- a/drivers/firmware/broadcom/bcm47xx_nvram.c
|
||||
+++ b/drivers/firmware/broadcom/bcm47xx_nvram.c
|
||||
@@ -37,6 +37,8 @@ struct nvram_header {
|
||||
static char nvram_buf[NVRAM_SPACE];
|
||||
static size_t nvram_len;
|
||||
static const u32 nvram_sizes[] = {0x8000, 0xF000, 0x10000};
|
||||
+static int cfe_env;
|
||||
+extern char *cfe_env_get(char *nv_buf, const char *name);
|
||||
|
||||
static u32 find_nvram_size(void __iomem *end)
|
||||
{
|
||||
@@ -66,6 +68,26 @@ static int nvram_find_and_copy(void __io
|
||||
return -EEXIST;
|
||||
}
|
||||
|
||||
+ cfe_env = 0;
|
||||
+
|
||||
+ /* XXX: hack for supporting the CFE environment stuff on WGT634U */
|
||||
+ if (lim >= 8 * 1024 * 1024) {
|
||||
+ src = (u32 *)(iobase + 8 * 1024 * 1024 - 0x2000);
|
||||
+ dst = (u32 *)nvram_buf;
|
||||
+
|
||||
+ if ((*src & 0xff00ff) == 0x000001) {
|
||||
+ printk("early_nvram_init: WGT634U NVRAM found.\n");
|
||||
+
|
||||
+ for (i = 0; i < 0x1ff0; i++) {
|
||||
+ if (*src == 0xFFFFFFFF)
|
||||
+ break;
|
||||
+ *dst++ = *src++;
|
||||
+ }
|
||||
+ cfe_env = 1;
|
||||
+ return 0;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
/* TODO: when nvram is on nand flash check for bad blocks first. */
|
||||
off = FLASH_MIN;
|
||||
while (off <= lim) {
|
||||
@@ -180,6 +202,13 @@ int bcm47xx_nvram_getenv(const char *nam
|
||||
if (!name)
|
||||
return -EINVAL;
|
||||
|
||||
+ if (cfe_env) {
|
||||
+ value = cfe_env_get(nvram_buf, name);
|
||||
+ if (!value)
|
||||
+ return -ENOENT;
|
||||
+ return snprintf(val, val_len, "%s", value);
|
||||
+ }
|
||||
+
|
||||
if (!nvram_len) {
|
||||
err = nvram_init();
|
||||
if (err)
|
101
target/linux/brcm47xx/patches-4.4/830-huawei_e970_support.patch
Normal file
101
target/linux/brcm47xx/patches-4.4/830-huawei_e970_support.patch
Normal file
|
@ -0,0 +1,101 @@
|
|||
--- a/arch/mips/bcm47xx/setup.c
|
||||
+++ b/arch/mips/bcm47xx/setup.c
|
||||
@@ -36,6 +36,7 @@
|
||||
#include <linux/ssb/ssb.h>
|
||||
#include <linux/ssb/ssb_embedded.h>
|
||||
#include <linux/bcma/bcma_soc.h>
|
||||
+#include <linux/old_gpio_wdt.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/idle.h>
|
||||
#include <asm/prom.h>
|
||||
@@ -262,6 +263,33 @@ static struct fixed_phy_status bcm47xx_f
|
||||
.duplex = DUPLEX_FULL,
|
||||
};
|
||||
|
||||
+static struct gpio_wdt_platform_data gpio_wdt_data;
|
||||
+
|
||||
+static struct platform_device gpio_wdt_device = {
|
||||
+ .name = "gpio-wdt",
|
||||
+ .id = 0,
|
||||
+ .dev = {
|
||||
+ .platform_data = &gpio_wdt_data,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static int __init bcm47xx_register_gpio_watchdog(void)
|
||||
+{
|
||||
+ enum bcm47xx_board board = bcm47xx_board_get();
|
||||
+
|
||||
+ switch (board) {
|
||||
+ case BCM47XX_BOARD_HUAWEI_E970:
|
||||
+ pr_info("bcm47xx: detected Huawei E970 or similar, starting early gpio_wdt timer\n");
|
||||
+ gpio_wdt_data.gpio = 7;
|
||||
+ gpio_wdt_data.interval = HZ;
|
||||
+ gpio_wdt_data.first_interval = HZ / 5;
|
||||
+ return platform_device_register(&gpio_wdt_device);
|
||||
+ default:
|
||||
+ /* Nothing to do */
|
||||
+ return 0;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
static int __init bcm47xx_register_bus_complete(void)
|
||||
{
|
||||
switch (bcm47xx_bus_type) {
|
||||
@@ -281,6 +309,7 @@ static int __init bcm47xx_register_bus_c
|
||||
bcm47xx_workarounds();
|
||||
|
||||
fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status, -1);
|
||||
+ bcm47xx_register_gpio_watchdog();
|
||||
return 0;
|
||||
}
|
||||
device_initcall(bcm47xx_register_bus_complete);
|
||||
--- a/arch/mips/configs/bcm47xx_defconfig
|
||||
+++ b/arch/mips/configs/bcm47xx_defconfig
|
||||
@@ -67,6 +67,7 @@ CONFIG_HW_RANDOM=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_BCM47XX_WDT=y
|
||||
+CONFIG_GPIO_WDT=y
|
||||
CONFIG_SSB_DEBUG=y
|
||||
CONFIG_SSB_DRIVER_GIGE=y
|
||||
CONFIG_BCMA_DRIVER_GMAC_CMN=y
|
||||
--- a/drivers/ssb/embedded.c
|
||||
+++ b/drivers/ssb/embedded.c
|
||||
@@ -34,11 +34,36 @@ int ssb_watchdog_timer_set(struct ssb_bu
|
||||
}
|
||||
EXPORT_SYMBOL(ssb_watchdog_timer_set);
|
||||
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+#include <bcm47xx_board.h>
|
||||
+
|
||||
+static bool ssb_watchdog_supported(void)
|
||||
+{
|
||||
+ enum bcm47xx_board board = bcm47xx_board_get();
|
||||
+
|
||||
+ /* The Huawei E970 has a hardware watchdog using a GPIO */
|
||||
+ switch (board) {
|
||||
+ case BCM47XX_BOARD_HUAWEI_E970:
|
||||
+ return false;
|
||||
+ default:
|
||||
+ return true;
|
||||
+ }
|
||||
+}
|
||||
+#else
|
||||
+static bool ssb_watchdog_supported(void)
|
||||
+{
|
||||
+ return true;
|
||||
+}
|
||||
+#endif
|
||||
+
|
||||
int ssb_watchdog_register(struct ssb_bus *bus)
|
||||
{
|
||||
struct bcm47xx_wdt wdt = {};
|
||||
struct platform_device *pdev;
|
||||
|
||||
+ if (!ssb_watchdog_supported())
|
||||
+ return 0;
|
||||
+
|
||||
if (ssb_chipco_available(&bus->chipco)) {
|
||||
wdt.driver_data = &bus->chipco;
|
||||
wdt.timer_set = ssb_chipco_watchdog_timer_set_wdt;
|
|
@ -0,0 +1,30 @@
|
|||
From 5c81397a0147ea59c778d1de14ef54e2268221f6 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
|
||||
Date: Wed, 8 Apr 2015 06:58:11 +0200
|
||||
Subject: [PATCH] ssb: reject PCI writes setting CardBus bridge resources
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
If SoC has a CardBus we can set resources of device at slot 1 only. It's
|
||||
impossigle to set bridge resources as it simply overwrites device 1
|
||||
configuration and usually results in Data bus error-s.
|
||||
|
||||
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
|
||||
---
|
||||
drivers/ssb/driver_pcicore.c | 4 ++++
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
--- a/drivers/ssb/driver_pcicore.c
|
||||
+++ b/drivers/ssb/driver_pcicore.c
|
||||
@@ -164,6 +164,10 @@ static int ssb_extpci_write_config(struc
|
||||
SSB_WARN_ON(!pc->hostmode);
|
||||
if (unlikely(len != 1 && len != 2 && len != 4))
|
||||
goto out;
|
||||
+ /* CardBus SoCs allow configuring dev 1 resources only */
|
||||
+ if (extpci_core->cardbusmode && dev != 1 &&
|
||||
+ off >= PCI_BASE_ADDRESS_0 && off <= PCI_BASE_ADDRESS_5)
|
||||
+ goto out;
|
||||
addr = get_cfgspace_addr(pc, bus, dev, func, off);
|
||||
if (unlikely(!addr))
|
||||
goto out;
|
|
@ -0,0 +1,233 @@
|
|||
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
|
||||
Date: Fri, 18 Dec 2015 07:51:08 +0100
|
||||
Subject: [PATCH] Revert "bcma: switch GPIO portions to use GPIOLIB_IRQCHIP"
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
This reverts commit 74f4e0cc61080f63f28e8d519bdf437957e64217.
|
||||
|
||||
On BCM47XX (MIPS) bcma_bus_get_host_dev returns NULL which results in:
|
||||
[ 0.157054] missing gpiochip .dev parent pointer
|
||||
[ 0.157287] bcma: bus0: Error registering GPIO driver: -22
|
||||
|
||||
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
|
||||
---
|
||||
drivers/bcma/Kconfig | 2 +-
|
||||
drivers/bcma/driver_gpio.c | 92 +++++++++++++++++++----------
|
||||
include/linux/bcma/bcma_driver_chipcommon.h | 1 +
|
||||
3 files changed, 64 insertions(+), 31 deletions(-)
|
||||
|
||||
--- a/drivers/bcma/Kconfig
|
||||
+++ b/drivers/bcma/Kconfig
|
||||
@@ -94,7 +94,7 @@ config BCMA_DRIVER_GMAC_CMN
|
||||
config BCMA_DRIVER_GPIO
|
||||
bool "BCMA GPIO driver"
|
||||
depends on BCMA && GPIOLIB
|
||||
- select GPIOLIB_IRQCHIP if BCMA_HOST_SOC
|
||||
+ select IRQ_DOMAIN if BCMA_HOST_SOC
|
||||
help
|
||||
Driver to provide access to the GPIO pins of the bcma bus.
|
||||
|
||||
--- a/drivers/bcma/driver_gpio.c
|
||||
+++ b/drivers/bcma/driver_gpio.c
|
||||
@@ -8,8 +8,10 @@
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
|
||||
-#include <linux/gpio/driver.h>
|
||||
+#include <linux/gpio.h>
|
||||
+#include <linux/irq.h>
|
||||
#include <linux/interrupt.h>
|
||||
+#include <linux/irqdomain.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/bcma/bcma.h>
|
||||
|
||||
@@ -77,11 +79,19 @@ static void bcma_gpio_free(struct gpio_c
|
||||
}
|
||||
|
||||
#if IS_BUILTIN(CONFIG_BCM47XX) || IS_BUILTIN(CONFIG_ARCH_BCM_5301X)
|
||||
+static int bcma_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
|
||||
+{
|
||||
+ struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
|
||||
+
|
||||
+ if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC)
|
||||
+ return irq_find_mapping(cc->irq_domain, gpio);
|
||||
+ else
|
||||
+ return -EINVAL;
|
||||
+}
|
||||
|
||||
static void bcma_gpio_irq_unmask(struct irq_data *d)
|
||||
{
|
||||
- struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
|
||||
- struct bcma_drv_cc *cc = bcma_gpio_get_cc(gc);
|
||||
+ struct bcma_drv_cc *cc = irq_data_get_irq_chip_data(d);
|
||||
int gpio = irqd_to_hwirq(d);
|
||||
u32 val = bcma_chipco_gpio_in(cc, BIT(gpio));
|
||||
|
||||
@@ -91,8 +101,7 @@ static void bcma_gpio_irq_unmask(struct
|
||||
|
||||
static void bcma_gpio_irq_mask(struct irq_data *d)
|
||||
{
|
||||
- struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
|
||||
- struct bcma_drv_cc *cc = bcma_gpio_get_cc(gc);
|
||||
+ struct bcma_drv_cc *cc = irq_data_get_irq_chip_data(d);
|
||||
int gpio = irqd_to_hwirq(d);
|
||||
|
||||
bcma_chipco_gpio_intmask(cc, BIT(gpio), 0);
|
||||
@@ -107,7 +116,6 @@ static struct irq_chip bcma_gpio_irq_chi
|
||||
static irqreturn_t bcma_gpio_irq_handler(int irq, void *dev_id)
|
||||
{
|
||||
struct bcma_drv_cc *cc = dev_id;
|
||||
- struct gpio_chip *gc = &cc->gpio;
|
||||
u32 val = bcma_cc_read32(cc, BCMA_CC_GPIOIN);
|
||||
u32 mask = bcma_cc_read32(cc, BCMA_CC_GPIOIRQ);
|
||||
u32 pol = bcma_cc_read32(cc, BCMA_CC_GPIOPOL);
|
||||
@@ -117,58 +125,81 @@ static irqreturn_t bcma_gpio_irq_handler
|
||||
if (!irqs)
|
||||
return IRQ_NONE;
|
||||
|
||||
- for_each_set_bit(gpio, &irqs, gc->ngpio)
|
||||
- generic_handle_irq(irq_find_mapping(gc->irqdomain, gpio));
|
||||
+ for_each_set_bit(gpio, &irqs, cc->gpio.ngpio)
|
||||
+ generic_handle_irq(bcma_gpio_to_irq(&cc->gpio, gpio));
|
||||
bcma_chipco_gpio_polarity(cc, irqs, val & irqs);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
-static int bcma_gpio_irq_init(struct bcma_drv_cc *cc)
|
||||
+static int bcma_gpio_irq_domain_init(struct bcma_drv_cc *cc)
|
||||
{
|
||||
struct gpio_chip *chip = &cc->gpio;
|
||||
- int hwirq, err;
|
||||
+ int gpio, hwirq, err;
|
||||
|
||||
if (cc->core->bus->hosttype != BCMA_HOSTTYPE_SOC)
|
||||
return 0;
|
||||
|
||||
+ cc->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
|
||||
+ &irq_domain_simple_ops, cc);
|
||||
+ if (!cc->irq_domain) {
|
||||
+ err = -ENODEV;
|
||||
+ goto err_irq_domain;
|
||||
+ }
|
||||
+ for (gpio = 0; gpio < chip->ngpio; gpio++) {
|
||||
+ int irq = irq_create_mapping(cc->irq_domain, gpio);
|
||||
+
|
||||
+ irq_set_chip_data(irq, cc);
|
||||
+ irq_set_chip_and_handler(irq, &bcma_gpio_irq_chip,
|
||||
+ handle_simple_irq);
|
||||
+ }
|
||||
+
|
||||
hwirq = bcma_core_irq(cc->core, 0);
|
||||
err = request_irq(hwirq, bcma_gpio_irq_handler, IRQF_SHARED, "gpio",
|
||||
cc);
|
||||
if (err)
|
||||
- return err;
|
||||
+ goto err_req_irq;
|
||||
|
||||
bcma_chipco_gpio_intmask(cc, ~0, 0);
|
||||
bcma_cc_set32(cc, BCMA_CC_IRQMASK, BCMA_CC_IRQ_GPIO);
|
||||
|
||||
- err = gpiochip_irqchip_add(chip,
|
||||
- &bcma_gpio_irq_chip,
|
||||
- 0,
|
||||
- handle_simple_irq,
|
||||
- IRQ_TYPE_NONE);
|
||||
- if (err) {
|
||||
- free_irq(hwirq, cc);
|
||||
- return err;
|
||||
- }
|
||||
-
|
||||
return 0;
|
||||
+
|
||||
+err_req_irq:
|
||||
+ for (gpio = 0; gpio < chip->ngpio; gpio++) {
|
||||
+ int irq = irq_find_mapping(cc->irq_domain, gpio);
|
||||
+
|
||||
+ irq_dispose_mapping(irq);
|
||||
+ }
|
||||
+ irq_domain_remove(cc->irq_domain);
|
||||
+err_irq_domain:
|
||||
+ return err;
|
||||
}
|
||||
|
||||
-static void bcma_gpio_irq_exit(struct bcma_drv_cc *cc)
|
||||
+static void bcma_gpio_irq_domain_exit(struct bcma_drv_cc *cc)
|
||||
{
|
||||
+ struct gpio_chip *chip = &cc->gpio;
|
||||
+ int gpio;
|
||||
+
|
||||
if (cc->core->bus->hosttype != BCMA_HOSTTYPE_SOC)
|
||||
return;
|
||||
|
||||
bcma_cc_mask32(cc, BCMA_CC_IRQMASK, ~BCMA_CC_IRQ_GPIO);
|
||||
free_irq(bcma_core_irq(cc->core, 0), cc);
|
||||
+ for (gpio = 0; gpio < chip->ngpio; gpio++) {
|
||||
+ int irq = irq_find_mapping(cc->irq_domain, gpio);
|
||||
+
|
||||
+ irq_dispose_mapping(irq);
|
||||
+ }
|
||||
+ irq_domain_remove(cc->irq_domain);
|
||||
}
|
||||
#else
|
||||
-static int bcma_gpio_irq_init(struct bcma_drv_cc *cc)
|
||||
+static int bcma_gpio_irq_domain_init(struct bcma_drv_cc *cc)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
-static void bcma_gpio_irq_exit(struct bcma_drv_cc *cc)
|
||||
+static void bcma_gpio_irq_domain_exit(struct bcma_drv_cc *cc)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
@@ -187,8 +218,9 @@ int bcma_gpio_init(struct bcma_drv_cc *c
|
||||
chip->set = bcma_gpio_set_value;
|
||||
chip->direction_input = bcma_gpio_direction_input;
|
||||
chip->direction_output = bcma_gpio_direction_output;
|
||||
- chip->owner = THIS_MODULE;
|
||||
- chip->dev = bcma_bus_get_host_dev(bus);
|
||||
+#if IS_BUILTIN(CONFIG_BCM47XX) || IS_BUILTIN(CONFIG_ARCH_BCM_5301X)
|
||||
+ chip->to_irq = bcma_gpio_to_irq;
|
||||
+#endif
|
||||
#if IS_BUILTIN(CONFIG_OF)
|
||||
if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC)
|
||||
chip->of_node = cc->core->dev.of_node;
|
||||
@@ -216,13 +248,13 @@ int bcma_gpio_init(struct bcma_drv_cc *c
|
||||
else
|
||||
chip->base = -1;
|
||||
|
||||
- err = gpiochip_add(chip);
|
||||
+ err = bcma_gpio_irq_domain_init(cc);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
- err = bcma_gpio_irq_init(cc);
|
||||
+ err = gpiochip_add(chip);
|
||||
if (err) {
|
||||
- gpiochip_remove(chip);
|
||||
+ bcma_gpio_irq_domain_exit(cc);
|
||||
return err;
|
||||
}
|
||||
|
||||
@@ -231,7 +263,7 @@ int bcma_gpio_init(struct bcma_drv_cc *c
|
||||
|
||||
int bcma_gpio_unregister(struct bcma_drv_cc *cc)
|
||||
{
|
||||
- bcma_gpio_irq_exit(cc);
|
||||
+ bcma_gpio_irq_domain_exit(cc);
|
||||
gpiochip_remove(&cc->gpio);
|
||||
return 0;
|
||||
}
|
||||
--- a/include/linux/bcma/bcma_driver_chipcommon.h
|
||||
+++ b/include/linux/bcma/bcma_driver_chipcommon.h
|
||||
@@ -640,6 +640,7 @@ struct bcma_drv_cc {
|
||||
spinlock_t gpio_lock;
|
||||
#ifdef CONFIG_BCMA_DRIVER_GPIO
|
||||
struct gpio_chip gpio;
|
||||
+ struct irq_domain *irq_domain;
|
||||
#endif
|
||||
};
|
||||
|
138
target/linux/brcm47xx/patches-4.4/920-cache-wround.patch
Normal file
138
target/linux/brcm47xx/patches-4.4/920-cache-wround.patch
Normal file
|
@ -0,0 +1,138 @@
|
|||
--- a/arch/mips/include/asm/r4kcache.h
|
||||
+++ b/arch/mips/include/asm/r4kcache.h
|
||||
@@ -28,10 +28,28 @@ extern void (*r4k_blast_icache)(void);
|
||||
#ifdef CONFIG_BCM47XX
|
||||
#include <asm/paccess.h>
|
||||
#include <linux/ssb/ssb.h>
|
||||
-#define BCM4710_DUMMY_RREG() ((void) *((u8 *) KSEG1ADDR(SSB_ENUM_BASE)))
|
||||
+#define BCM4710_DUMMY_RREG() bcm4710_dummy_rreg()
|
||||
+
|
||||
+static inline unsigned long bcm4710_dummy_rreg(void)
|
||||
+{
|
||||
+ return *(volatile unsigned long *)(KSEG1ADDR(SSB_ENUM_BASE));
|
||||
+}
|
||||
+
|
||||
+#define BCM4710_FILL_TLB(addr) bcm4710_fill_tlb((void *)(addr))
|
||||
+
|
||||
+static inline unsigned long bcm4710_fill_tlb(void *addr)
|
||||
+{
|
||||
+ return *(unsigned long *)addr;
|
||||
+}
|
||||
+
|
||||
+#define BCM4710_PROTECTED_FILL_TLB(addr) bcm4710_protected_fill_tlb((void *)(addr))
|
||||
+
|
||||
+static inline void bcm4710_protected_fill_tlb(void *addr)
|
||||
+{
|
||||
+ unsigned long x;
|
||||
+ get_dbe(x, (unsigned long *)addr);;
|
||||
+}
|
||||
|
||||
-#define BCM4710_FILL_TLB(addr) (*(volatile unsigned long *)(addr))
|
||||
-#define BCM4710_PROTECTED_FILL_TLB(addr) ({ unsigned long x; get_dbe(x, (volatile unsigned long *)(addr)); })
|
||||
#else
|
||||
#define BCM4710_DUMMY_RREG()
|
||||
|
||||
--- a/arch/mips/mm/tlbex.c
|
||||
+++ b/arch/mips/mm/tlbex.c
|
||||
@@ -943,6 +943,9 @@ build_get_pgde32(u32 **p, unsigned int t
|
||||
uasm_i_srl(p, ptr, ptr, SMP_CPUID_PTRSHIFT);
|
||||
uasm_i_addu(p, ptr, tmp, ptr);
|
||||
#else
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ uasm_i_nop(p);
|
||||
+#endif
|
||||
UASM_i_LA_mostly(p, ptr, pgdc);
|
||||
#endif
|
||||
uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */
|
||||
@@ -1281,12 +1284,12 @@ static void build_r4000_tlb_refill_handl
|
||||
/* No need for uasm_i_nop */
|
||||
}
|
||||
|
||||
-#ifdef CONFIG_BCM47XX
|
||||
- uasm_i_nop(&p);
|
||||
-#endif
|
||||
#ifdef CONFIG_64BIT
|
||||
build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
|
||||
#else
|
||||
+# ifdef CONFIG_BCM47XX
|
||||
+ uasm_i_nop(&p);
|
||||
+# endif
|
||||
build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
|
||||
#endif
|
||||
|
||||
@@ -1298,6 +1301,9 @@ static void build_r4000_tlb_refill_handl
|
||||
build_update_entries(&p, K0, K1);
|
||||
build_tlb_write_entry(&p, &l, &r, tlb_random);
|
||||
uasm_l_leave(&l, p);
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ uasm_i_nop(&p);
|
||||
+#endif
|
||||
uasm_i_eret(&p); /* return from trap */
|
||||
}
|
||||
#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
|
||||
@@ -1871,12 +1877,12 @@ build_r4000_tlbchange_handler_head(u32 *
|
||||
{
|
||||
struct work_registers wr = build_get_work_registers(p);
|
||||
|
||||
-#ifdef CONFIG_BCM47XX
|
||||
- uasm_i_nop(p);
|
||||
-#endif
|
||||
#ifdef CONFIG_64BIT
|
||||
build_get_pmde64(p, l, r, wr.r1, wr.r2); /* get pmd in ptr */
|
||||
#else
|
||||
+# ifdef CONFIG_BCM47XX
|
||||
+ uasm_i_nop(p);
|
||||
+# endif
|
||||
build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */
|
||||
#endif
|
||||
|
||||
@@ -1923,6 +1929,9 @@ build_r4000_tlbchange_handler_tail(u32 *
|
||||
build_tlb_write_entry(p, l, r, tlb_indexed);
|
||||
uasm_l_leave(l, *p);
|
||||
build_restore_work_registers(p);
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ uasm_i_nop(p);
|
||||
+#endif
|
||||
uasm_i_eret(p); /* return from trap */
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
--- a/arch/mips/kernel/genex.S
|
||||
+++ b/arch/mips/kernel/genex.S
|
||||
@@ -21,6 +21,19 @@
|
||||
#include <asm/war.h>
|
||||
#include <asm/thread_info.h>
|
||||
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+# ifdef eret
|
||||
+# undef eret
|
||||
+# endif
|
||||
+# define eret \
|
||||
+ .set push; \
|
||||
+ .set noreorder; \
|
||||
+ nop; \
|
||||
+ nop; \
|
||||
+ eret; \
|
||||
+ .set pop;
|
||||
+#endif
|
||||
+
|
||||
__INIT
|
||||
|
||||
/*
|
||||
@@ -34,7 +47,6 @@ NESTED(except_vec3_generic, 0, sp)
|
||||
.set noat
|
||||
#ifdef CONFIG_BCM47XX
|
||||
nop
|
||||
- nop
|
||||
#endif
|
||||
#if R5432_CP0_INTERRUPT_WAR
|
||||
mfc0 k0, CP0_INDEX
|
||||
@@ -59,6 +71,9 @@ NESTED(except_vec3_r4000, 0, sp)
|
||||
.set push
|
||||
.set arch=r4000
|
||||
.set noat
|
||||
+#ifdef CONFIG_BCM47XX
|
||||
+ nop
|
||||
+#endif
|
||||
mfc0 k1, CP0_CAUSE
|
||||
li k0, 31<<2
|
||||
andi k1, k1, 0x7c
|
46
target/linux/brcm47xx/patches-4.4/940-bcm47xx-yenta.patch
Normal file
46
target/linux/brcm47xx/patches-4.4/940-bcm47xx-yenta.patch
Normal file
|
@ -0,0 +1,46 @@
|
|||
--- a/drivers/pcmcia/yenta_socket.c
|
||||
+++ b/drivers/pcmcia/yenta_socket.c
|
||||
@@ -919,6 +919,8 @@ static unsigned int yenta_probe_irq(stru
|
||||
* Probe for usable interrupts using the force
|
||||
* register to generate bogus card status events.
|
||||
*/
|
||||
+#ifndef CONFIG_BCM47XX
|
||||
+ /* WRT54G3G does not like this */
|
||||
cb_writel(socket, CB_SOCKET_EVENT, -1);
|
||||
cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
|
||||
reg = exca_readb(socket, I365_CSCINT);
|
||||
@@ -934,6 +936,7 @@ static unsigned int yenta_probe_irq(stru
|
||||
}
|
||||
cb_writel(socket, CB_SOCKET_MASK, 0);
|
||||
exca_writeb(socket, I365_CSCINT, reg);
|
||||
+#endif
|
||||
|
||||
mask = probe_irq_mask(val) & 0xffff;
|
||||
|
||||
@@ -1018,6 +1021,10 @@ static void yenta_get_socket_capabilitie
|
||||
else
|
||||
socket->socket.irq_mask = 0;
|
||||
|
||||
+ /* irq mask probing is broken for the WRT54G3G */
|
||||
+ if (socket->socket.irq_mask == 0)
|
||||
+ socket->socket.irq_mask = 0x6f8;
|
||||
+
|
||||
dev_info(&socket->dev->dev, "ISA IRQ mask 0x%04x, PCI irq %d\n",
|
||||
socket->socket.irq_mask, socket->cb_irq);
|
||||
}
|
||||
@@ -1250,6 +1257,15 @@ static int yenta_probe(struct pci_dev *d
|
||||
dev_info(&dev->dev, "Socket status: %08x\n",
|
||||
cb_readl(socket, CB_SOCKET_STATE));
|
||||
|
||||
+ /* Generate an interrupt on card insert/remove */
|
||||
+ config_writew(socket, CB_SOCKET_MASK, CB_CSTSMASK | CB_CDMASK);
|
||||
+
|
||||
+ /* Set up Multifunction Routing Status Register */
|
||||
+ config_writew(socket, 0x8C, 0x1000 /* MFUNC3 to GPIO3 */ | 0x2 /* MFUNC0 to INTA */);
|
||||
+
|
||||
+ /* Switch interrupts to parallelized */
|
||||
+ config_writeb(socket, 0x92, 0x64);
|
||||
+
|
||||
yenta_fixup_parent_bridge(dev->subordinate);
|
||||
|
||||
/* Register it with the pcmcia layer.. */
|
|
@ -0,0 +1,11 @@
|
|||
--- a/drivers/ssb/driver_pcicore.c
|
||||
+++ b/drivers/ssb/driver_pcicore.c
|
||||
@@ -389,7 +389,7 @@ static void ssb_pcicore_init_hostmode(st
|
||||
set_io_port_base(ssb_pcicore_controller.io_map_base);
|
||||
/* Give some time to the PCI controller to configure itself with the new
|
||||
* values. Not waiting at this point causes crashes of the machine. */
|
||||
- mdelay(10);
|
||||
+ mdelay(300);
|
||||
register_pci_controller(&ssb_pcicore_controller);
|
||||
}
|
||||
|
22
target/linux/brcm47xx/patches-4.4/999-wl_exports.patch
Normal file
22
target/linux/brcm47xx/patches-4.4/999-wl_exports.patch
Normal file
|
@ -0,0 +1,22 @@
|
|||
--- a/drivers/firmware/broadcom/bcm47xx_nvram.c
|
||||
+++ b/drivers/firmware/broadcom/bcm47xx_nvram.c
|
||||
@@ -34,7 +34,8 @@ struct nvram_header {
|
||||
u32 config_ncdl; /* ncdl values for memc */
|
||||
};
|
||||
|
||||
-static char nvram_buf[NVRAM_SPACE];
|
||||
+char nvram_buf[NVRAM_SPACE];
|
||||
+EXPORT_SYMBOL(nvram_buf);
|
||||
static size_t nvram_len;
|
||||
static const u32 nvram_sizes[] = {0x8000, 0xF000, 0x10000};
|
||||
static int cfe_env;
|
||||
--- a/arch/mips/mm/cache.c
|
||||
+++ b/arch/mips/mm/cache.c
|
||||
@@ -59,6 +59,7 @@ void (*_dma_cache_wback)(unsigned long s
|
||||
void (*_dma_cache_inv)(unsigned long start, unsigned long size);
|
||||
|
||||
EXPORT_SYMBOL(_dma_cache_wback_inv);
|
||||
+EXPORT_SYMBOL(_dma_cache_inv);
|
||||
|
||||
#endif /* CONFIG_DMA_NONCOHERENT || CONFIG_DMA_MAYBE_COHERENT */
|
||||
|
Loading…
Reference in a new issue