diff --git a/target/linux/mvebu/patches-4.14/527-PCI-aardvark-allow-to-specify-link-capability.patch b/target/linux/mvebu/patches-4.14/527-PCI-aardvark-allow-to-specify-link-capability.patch new file mode 100644 index 0000000000..fb57f4112a --- /dev/null +++ b/target/linux/mvebu/patches-4.14/527-PCI-aardvark-allow-to-specify-link-capability.patch @@ -0,0 +1,43 @@ +From f70b629e488cc3f2a325ac35476f4f7ae502c5d0 Mon Sep 17 00:00:00 2001 +From: Tomasz Maciej Nowak +Date: Thu, 14 Jun 2018 14:24:40 +0200 +Subject: [PATCH 1/2] PCI: aardvark: allow to specify link capability + +Use DT of_pci_get_max_link_speed() facility to allow specifying link +capability. If none or unspecified value is given it falls back to gen2, +which is default for Armada 3700 SoC. + +Signed-off-by: Tomasz Maciej Nowak +--- + drivers/pci/host/pci-aardvark.c | 11 +++++++++-- + 1 file changed, 9 insertions(+), 2 deletions(-) + +--- a/drivers/pci/host/pci-aardvark.c ++++ b/drivers/pci/host/pci-aardvark.c +@@ -272,6 +272,8 @@ static void advk_pcie_set_ob_win(struct + + static void advk_pcie_setup_hw(struct advk_pcie *pcie) + { ++ struct device *dev = &pcie->pdev->dev; ++ struct device_node *node = dev->of_node; + u32 reg; + int i; + +@@ -311,10 +313,15 @@ static void advk_pcie_setup_hw(struct ad + PCIE_CORE_CTRL2_TD_ENABLE; + advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG); + +- /* Set GEN2 */ ++ /* Set GEN */ + reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG); + reg &= ~PCIE_GEN_SEL_MSK; +- reg |= SPEED_GEN_2; ++ if (of_pci_get_max_link_speed(node) == 1) ++ reg |= SPEED_GEN_1; ++ else if (of_pci_get_max_link_speed(node) == 3) ++ reg |= SPEED_GEN_3; ++ else ++ reg |= SPEED_GEN_2; + advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); + + /* Set lane X1 */ diff --git a/target/linux/mvebu/patches-4.14/528-arm64-dts-armada-3720-espressobin-set-max-link-to-ge.patch b/target/linux/mvebu/patches-4.14/528-arm64-dts-armada-3720-espressobin-set-max-link-to-ge.patch new file mode 100644 index 0000000000..5ff9b47268 --- /dev/null +++ b/target/linux/mvebu/patches-4.14/528-arm64-dts-armada-3720-espressobin-set-max-link-to-ge.patch @@ -0,0 +1,73 @@ +From 33f8fdcedb01680427328d710594facef7a0092c Mon Sep 17 00:00:00 2001 +From: Tomasz Maciej Nowak +Date: Thu, 14 Jun 2018 14:40:26 +0200 +Subject: [PATCH 2/2] arm64: dts: armada-3720-espressobin: set max link to gen1 + +Since the beginning there's been an issue with initializing the Atheros +based MiniPCIe wireless cards. Here's an example of kerenel log: + + OF: PCI: host bridge /soc/pcie@d0070000 ranges: + OF: PCI: MEM 0xe8000000..0xe8ffffff -> 0xe8000000 + OF: PCI: IO 0xe9000000..0xe900ffff -> 0xe9000000 + advk-pcie d0070000.pcie: link up + advk-pcie d0070000.pcie: PCI host bridge to bus 0000:00 + pci_bus 0000:00: root bus resource [bus 00-ff] + pci_bus 0000:00: root bus resource [mem0xe8000000-0xe8ffffff] + pci_bus 0000:00: root bus resource [io 0x0000-0xffff](bus address [0xe9000000-0xe900ffff]) + pci 0000:00:00.0: BAR 0: assigned [mem0xe8000000-0xe801ffff 64bit] + pci 0000:00:00.0: BAR 6: assigned [mem0xe8020000-0xe802ffff pref] + [...] + advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x3c + advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x44 + advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4 + ath9k 0000:00:00.0: enabling device (0000 -> 0002) + advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x3c + advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0xc + advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4 + advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x40 + ath9k 0000:00:00.0: request_irq failed + advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4 + ath9k: probe of 0000:00:00.0 failed with error -22 + +The same happens for ath5k cards, while ath10k card didn't appear at +all (not detected): + + OF: PCI: host bridge /soc/pcie@d0070000 ranges: + OF: PCI: MEM 0xe8000000..0xe8ffffff -> 0xe8000000 + OF: PCI: IO 0xe9000000..0xe900ffff -> 0xe9000000 + advk-pcie d0070000.pcie: link never came up + advk-pcie d0070000.pcie: PCI host bridge to bus 0000:00 + pci_bus 0000:00: root bus resource [bus 00-ff] + pci_bus 0000:00: root bus resource [mem0xe8000000-0xe8ffffff] + pci_bus 0000:00: root bus resource [io 0x0000-0xffff](bus address [0xe9000000-0xe900ffff]) + advk-pcie d0070000.pcie: config read/write timed out + +Following the issue on esppressobin.net forum [1] the workaround seems +to be limiting the speed of PCIe bridge to 1st generation. This fixed +the initialisation of all tested Atheros wireless cards. +The patch in the forum thread swaped registers which would limit speed +for all Armada 3700 based boards. The approach in this patch, in +conjunction with "PCI: aardvark: allow to specify link capability" patch +is less invasive, it only touches the affected board. + +For the record, the iwlwifi and mt76 cards were not affected by this +issue. + +1. http://espressobin.net/forums/topic/which-pcie-wlan-cards-are-supported + +Signed-off-by: Tomasz Maciej Nowak +--- + arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts ++++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts +@@ -79,6 +79,8 @@ + /* J9 */ + &pcie0 { + status = "okay"; ++ ++ max-link-speed = <1>; + }; + + /* J6 */