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use the global register access macros in the flash driver

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SVN-Revision: 8707
This commit is contained in:
Gabor Juhos 2007-09-09 13:28:24 +00:00
parent 108723067b
commit 741c1f7997
1 changed files with 13 additions and 14 deletions
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27
target/linux/adm5120/files/drivers/mtd/maps/adm5120-flash.c
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@ -41,10 +41,10 @@
#include <asm/io.h> #include <asm/io.h>
#include <asm/mach-adm5120/adm5120_defs.h> #include <adm5120_defs.h>
#include <asm/mach-adm5120/adm5120_switch.h> #include <adm5120_switch.h>
#include <asm/mach-adm5120/adm5120_mpmc.h> #include <adm5120_mpmc.h>
#include <asm/mach-adm5120/adm5120_platform.h> #include <adm5120_platform.h>
#define DRV_NAME "adm5120-flash" #define DRV_NAME "adm5120-flash"
#define DRV_DESC "ADM5120 flash MAP driver" #define DRV_DESC "ADM5120 flash MAP driver"
@ -78,7 +78,6 @@ struct adm5120_flash_info {
struct flash_desc { struct flash_desc {
u32 phys; u32 phys;
u32 srs_shift; u32 srs_shift;
u32 mpmc_reg;
}; };
/* /*
@ -98,11 +97,9 @@ static u32 flash_sizes[8] = {
static struct flash_desc flash_descs[2] = { static struct flash_desc flash_descs[2] = {
{ {
.phys = ADM5120_SRAM0_BASE, .phys = ADM5120_SRAM0_BASE,
.mpmc_reg = MPMC_REG_SC1,
.srs_shift = MEMCTRL_SRS0_SHIFT, .srs_shift = MEMCTRL_SRS0_SHIFT,
}, { }, {
.phys = ADM5120_SRAM1_BASE, .phys = ADM5120_SRAM1_BASE,
.mpmc_reg = MPMC_REG_SC0,
.srs_shift = MEMCTRL_SRS1_SHIFT, .srs_shift = MEMCTRL_SRS1_SHIFT,
} }
}; };
@ -242,11 +239,6 @@ out:
return err; return err;
} }
#define SWITCH_READ(r) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))
#define SWITCH_WRITE(r,v) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))=(v)
#define MPMC_READ(r) *(u32 *)(KSEG1ADDR(ADM5120_MPMC_BASE)+(r))
#define MPMC_WRITE(r,v) *(u32 *)(KSEG1ADDR(ADM5120_MPMC_BASE)+(r))=(v)
static int adm5120_flash_initinfo(struct adm5120_flash_info *info, static int adm5120_flash_initinfo(struct adm5120_flash_info *info,
struct platform_device *dev) struct platform_device *dev)
{ {
@ -265,7 +257,7 @@ static int adm5120_flash_initinfo(struct adm5120_flash_info *info,
fdesc = &flash_descs[dev->id]; fdesc = &flash_descs[dev->id];
/* get memory window size */ /* get memory window size */
t = SWITCH_READ(SWITCH_REG_MEMCTRL) >> fdesc->srs_shift; t = SW_READ_REG(MEMCTRL) >> fdesc->srs_shift;
t &= MEMCTRL_SRS_MASK; t &= MEMCTRL_SRS_MASK;
info->amap.window_size = flash_sizes[t]; info->amap.window_size = flash_sizes[t];
if (info->amap.window_size == 0) { if (info->amap.window_size == 0) {
@ -274,7 +266,14 @@ static int adm5120_flash_initinfo(struct adm5120_flash_info *info,
} }
/* get flash bus width */ /* get flash bus width */
t = MPMC_READ(fdesc->mpmc_reg) & SC_MW_MASK; switch (dev->id) {
case 0:
t = MPMC_READ_REG(SC1) & SC_MW_MASK;
break;
case 1:
t = MPMC_READ_REG(SC0) & SC_MW_MASK;
break;
}
map->bankwidth = flash_bankwidths[t]; map->bankwidth = flash_bankwidths[t];
if (map->bankwidth == 0) { if (map->bankwidth == 0) {
MAP_ERR(map, "invalid bus width detected\n"); MAP_ERR(map, "invalid bus width detected\n");