ramips: Add device tree for JCG JHR-N805R

Add a device tree for JCG JHR-N805R

This router is based on a RT3050 and has 4MB of SPI flash and 16MB of
SDRAM. For details, see https://wikidevi.com/wiki/JCG_JHR-N805R .

Signed-off-by: Reinhard Max <reinhard@m4x.de>
Reviewed-by: Torsten Duwe <duwe@lst.de>

SVN-Revision: 48902

target/linux/ramips/dts/JHR-N805R.dts

@@ -0,0 +1,89 @@
+/dts-v1/;
+
+/include/ "rt3050.dtsi"
+
+/ {
+	compatible = "JHR-N805R", "ralink,rt3050-soc";
+	model = "JCG JHR-N805R";
+
+	pinctrl {
+		state_default: pinctrl0 {
+			gpio {
+				ralink,group = "i2c", "jtag", "rgmii", "mdio", "uartf";
+				ralink,function = "gpio";
+			};
+		};
+	};
+
+	palmbus@10000000 {
+		spi@b00 {
+			status = "okay";
+
+			m25p80@0 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				compatible = "jedec,spi-nor";
+				reg = <0 0>;
+				linux,modalias = "m25p80", "mx25l3205d";
+				spi-max-frequency = <10000000>;
+
+				partition@0 {
+					label = "u-boot";
+					reg = <0x0 0x30000>;
+					read-only;
+				};
+
+				partition@30000 {
+					label = "u-boot-env";
+					reg = <0x30000 0x10000>;
+					read-only;
+				};
+
+				factory: partition@40000 {
+					label = "factory";
+					reg = <0x40000 0x10000>;
+					read-only;
+				};
+
+				partition@50000 {
+					label = "firmware";
+					reg = <0x50000 0x3b0000>;
+				};
+			};
+		};
+        };
+
+	ethernet@10100000 {
+		mtd-mac-address = <&factory 0x2e>;
+	};
+
+	esw@10110000 {
+		mediatek,portmap = <0x3e>;
+	};
+
+	wmac@10180000 {
+		ralink,mtd-eeprom = <&factory 0>;
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		system {
+			label = "jhr-n805r:blue:system";
+			gpios = <&gpio0 9 1>;
+		};
+	};
+
+        gpio-keys-polled {
+                compatible = "gpio-keys-polled";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                poll-interval = <20>;
+
+                reset {
+                        label = "reset";
+                        gpios = <&gpio0 10 1>;
+                        linux,code = <0x198>;
+                };
+	};
+};