add ar9 target

SVN-Revision: 21200
This commit is contained in:
Ralph Hempel 2010-04-27 15:45:43 +00:00
parent 1a07f81239
commit 7287be04b0
14 changed files with 782 additions and 463 deletions

View file

@ -0,0 +1,176 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_ADM6996_PHY=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_BCM47XX is not set
# CONFIG_BINARY_PRINTF is not set
CONFIG_BITREVERSE=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CMDLINE="console=ttyS0,9600 rootfstype=squashfs,jffs2"
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_CAVIUM_OCTEON is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR2=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R5500 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_DEV_IFXMIPS=y
CONFIG_CRYPTO_DEV_IFXMIPS_AES=y
# CONFIG_CRYPTO_DEV_IFXMIPS_ARC4 is not set
CONFIG_CRYPTO_DEV_IFXMIPS_DES=y
# CONFIG_CRYPTO_DEV_IFXMIPS_MD5_HMAC is not set
CONFIG_CRYPTO_DEV_IFXMIPS_SHA1=y
# CONFIG_CRYPTO_DEV_IFXMIPS_SHA1_HMAC is not set
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_IFXMIPS_EBU=y
CONFIG_GPIO_SYSFS=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_IDE=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_STD_PC_SERIAL_PORT=y
# CONFIG_HIGH_RES_TIMERS is not set
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
CONFIG_IFXMIPS=y
CONFIG_IFXMIPS_GPIO_RST_BTN=y
CONFIG_IFXMIPS_MII0=y
# CONFIG_IFXMIPS_PROM_ASC0 is not set
CONFIG_IFXMIPS_PROM_ASC1=y
CONFIG_IFXMIPS_WDT=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQ_CPU=y
# CONFIG_ISDN_CAPI is not set
# CONFIG_ISDN_I4L is not set
CONFIG_KALLSYMS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_IFXMIPS=y
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_TX39XX is not set
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
# CONFIG_MIPS_MALTA is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MIPS_VPE_LOADER is not set
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_IFXMIPS=y
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_PROBE_INITRD_HEADER is not set
CONFIG_RTL8306_PHY=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_IFXMIPS=y
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SLOW_WORK is not set
CONFIG_SWAP_IO_SPACE=y
CONFIG_SWCONFIG=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_MULTITHREADING=y
# CONFIG_TC35815 is not set
CONFIG_TRACING_SUPPORT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB_SUPPORT=y
CONFIG_ZONE_DMA_FLAG=0

View file

@ -0,0 +1,207 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_ADM6996_PHY=y
# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
# CONFIG_AR7 is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_BCM47XX is not set
# CONFIG_BCM63XX is not set
CONFIG_BITREVERSE=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CFG80211_DEFAULT_PS_VALUE=0
CONFIG_CMDLINE="console=ttyS0,9600 rootfstype=squashfs,jffs2"
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_CAVIUM_OCTEON is not set
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CPU_LOONGSON2E is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR2=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R5500 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CRC_CCITT=m
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_DANUBE_MACH_ARV4519=y
CONFIG_DANUBE_MACH_ARV452=y
CONFIG_DANUBE_MACH_EASY4010=y
CONFIG_DANUBE_MACH_EASY50712=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
# CONFIG_FSNOTIFY is not set
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_STD_PC_SERIAL_PORT=y
# CONFIG_HIGH_RES_TIMERS is not set
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
CONFIG_IFXMIPS=y
# CONFIG_IFXMIPS_AR9 is not set
CONFIG_IFXMIPS_ARCAYDIAN_BRNBOOT=y
# CONFIG_IFXMIPS_ASE is not set
CONFIG_IFXMIPS_COMPAT=y
CONFIG_IFXMIPS_DANUBE=y
CONFIG_IFXMIPS_MII0=y
# CONFIG_IFXMIPS_PROM_ASC0 is not set
CONFIG_IFXMIPS_PROM_ASC1=y
# CONFIG_IFXMIPS_VR9 is not set
CONFIG_IFXMIPS_WDT=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_IPTABLES=m
CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_RAW=m
CONFIG_IP_NF_TARGET_LOG=m
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_REJECT=m
CONFIG_IRQ_CPU=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_IFXMIPS=y
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_LOONGSON is not set
# CONFIG_MACH_TX39XX is not set
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_MACHINE=y
# CONFIG_MIPS_MALTA is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MIPS_VPE_LOADER is not set
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_IFXMIPS=y
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
CONFIG_NETFILTER_XTABLES=m
CONFIG_NETFILTER_XT_MATCH_COMMENT=m
CONFIG_NETFILTER_XT_MATCH_LIMIT=m
CONFIG_NETFILTER_XT_MATCH_MAC=m
CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
CONFIG_NETFILTER_XT_MATCH_STATE=m
CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
CONFIG_NF_CONNTRACK=m
CONFIG_NF_CONNTRACK_FTP=m
CONFIG_NF_CONNTRACK_IPV4=m
CONFIG_NF_CONNTRACK_IRC=m
CONFIG_NF_CONNTRACK_TFTP=m
CONFIG_NF_DEFRAG_IPV4=m
CONFIG_NF_NAT=m
CONFIG_NF_NAT_FTP=m
CONFIG_NF_NAT_IRC=m
CONFIG_NF_NAT_TFTP=m
CONFIG_NLS=y
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
CONFIG_PPP=m
CONFIG_PPPOE=m
CONFIG_PPP_ASYNC=m
CONFIG_RTL8306_PHY=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_IFXMIPS=y
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
CONFIG_SLHC=m
CONFIG_SOC_DANUBE=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_SWCONFIG=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_MULTITHREADING=y
# CONFIG_TC35815 is not set
CONFIG_TRAD_SIGNALS=y
# CONFIG_TREE_PREEMPT_RCU is not set
CONFIG_TREE_RCU=y
CONFIG_USB=y
CONFIG_USB_DEBUG=y
# CONFIG_USB_EHCI_HCD is not set
CONFIG_USB_SUPPORT=y
# CONFIG_USB_UHCI_HCD is not set
CONFIG_ZONE_DMA_FLAG=0

View file

@ -0,0 +1,222 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_ADM6996_PHY=y
# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
# CONFIG_AR7 is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_BCM47XX is not set
# CONFIG_BCM63XX is not set
CONFIG_BITREVERSE=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CMDLINE="console=ttyS0,9600 rootfstype=squashfs,jffs2"
CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_CAVIUM_OCTEON is not set
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CPU_LOONGSON2E is not set
# CONFIG_CPU_LOONGSON2F is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR2=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R5500 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_DANUBE_MACH_ARV4519=y
CONFIG_DANUBE_MACH_ARV452=y
CONFIG_DANUBE_MACH_EASY4010=y
CONFIG_DANUBE_MACH_EASY50712=y
CONFIG_DECOMPRESS_LZMA=y
# CONFIG_DEFAULT_SECURITY_SELINUX is not set
# CONFIG_DEFAULT_SECURITY_SMACK is not set
# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
# CONFIG_FSNOTIFY is not set
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_STD_PC_SERIAL_PORT=y
# CONFIG_HIGH_RES_TIMERS is not set
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
CONFIG_IFXMIPS=y
# CONFIG_IFXMIPS_AR9 is not set
CONFIG_IFXMIPS_ARCAYDIAN_BRNBOOT=y
# CONFIG_IFXMIPS_ASE is not set
CONFIG_IFXMIPS_COMPAT=y
CONFIG_IFXMIPS_DANUBE=y
CONFIG_IFXMIPS_MII0=y
# CONFIG_IFXMIPS_PROM_ASC0 is not set
CONFIG_IFXMIPS_PROM_ASC1=y
# CONFIG_IFXMIPS_VR9 is not set
CONFIG_IFXMIPS_WDT=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_INLINE_READ_LOCK is not set
# CONFIG_INLINE_READ_LOCK_BH is not set
# CONFIG_INLINE_READ_LOCK_IRQ is not set
# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
# CONFIG_INLINE_READ_TRYLOCK is not set
CONFIG_INLINE_READ_UNLOCK=y
# CONFIG_INLINE_READ_UNLOCK_BH is not set
CONFIG_INLINE_READ_UNLOCK_IRQ=y
# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
# CONFIG_INLINE_SPIN_LOCK is not set
# CONFIG_INLINE_SPIN_LOCK_BH is not set
# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
# CONFIG_INLINE_SPIN_TRYLOCK is not set
# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
CONFIG_INLINE_SPIN_UNLOCK=y
# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
# CONFIG_INLINE_WRITE_LOCK is not set
# CONFIG_INLINE_WRITE_LOCK_BH is not set
# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
# CONFIG_INLINE_WRITE_TRYLOCK is not set
CONFIG_INLINE_WRITE_UNLOCK=y
# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
CONFIG_IRQ_CPU=y
CONFIG_KALLSYMS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_IFXMIPS=y
CONFIG_LOONGSON_UART_BASE=y
CONFIG_LZMA_COMPRESS=y
CONFIG_LZMA_DECOMPRESS=y
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_LOONGSON is not set
# CONFIG_MACH_TX39XX is not set
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_MACHINE=y
# CONFIG_MIPS_MALTA is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MIPS_VPE_LOADER is not set
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_IFXMIPS=y
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
# CONFIG_MUTEX_SPIN_ON_OWNER is not set
CONFIG_NLS=y
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_POWERTV is not set
CONFIG_RTL8306_PHY=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_IFXMIPS=y
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
CONFIG_SOC_DANUBE=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_SWCONFIG=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_MULTITHREADING=y
# CONFIG_TC35815 is not set
# CONFIG_TINY_RCU is not set
CONFIG_TRAD_SIGNALS=y
# CONFIG_TREE_PREEMPT_RCU is not set
CONFIG_TREE_RCU=y
CONFIG_USB=y
CONFIG_USB_DEBUG=y
# CONFIG_USB_EHCI_HCD is not set
CONFIG_USB_SUPPORT=y
# CONFIG_USB_UHCI_HCD is not set
CONFIG_ZONE_DMA_FLAG=0

View file

@ -0,0 +1,17 @@
#
# Copyright (C) 2006-2008 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/None
NAME:=Generic, No WiFi
PACKAGES:=-wpad-mini
endef
define Profile/None/Description
Package set without WiFi support
endef
$(eval $(call Profile,None))

View file

@ -0,0 +1,17 @@
#
# Copyright (C) 2008 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/Atheros
NAME:=Atheros WiFi (default)
PACKAGES:=kmod-madwifi
endef
define Profile/Atheros/Description
Package set compatible with hardware using Atheros WiFi cards
endef
$(eval $(call Profile,Atheros))

View file

@ -0,0 +1,17 @@
#
# Copyright (C) 2008 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/Ralink
NAME:=Ralink RT61 Wifi (ARV452)
PACKAGES:=kmod-rt61-pci
endef
define Profile/Ralink/Description
Package set compatible with hardware using Ralink WiFi cards
endef
$(eval $(call Profile,Ralink))

View file

@ -0,0 +1,9 @@
ARCH:=mips
SUBTARGET:=ar9
BOARDNAME:=AR9
FEATURES:=squashfs jffs2
define Target/Description
Lantiq AR9
endef

View file

@ -4,26 +4,12 @@ config IFXMIPS_ARCAYDIAN_BRNBOOT
bool
default n
menu "infineon SoC machine selection"
menu "Lantiq SoC machine selection"
config DANUBE_MACH_EASY50712
bool "Easy50712"
config DANUBE_MACH_EASY80712
bool "Easy50812"
default y
config DANUBE_MACH_EASY4010
bool "Easy4010"
default y
config DANUBE_MACH_ARV4519
bool "ARV4519"
default y
select DANUBE_ARCAYDIAN_BRNBOOT
config DANUBE_MACH_ARV452
bool "ARV452"
default y
select IFXMIPS_ARCAYDIAN_BRNBOOT
endmenu
endif

View file

@ -1,3 +1,2 @@
obj-y := dma-core.o irq.o ebu.o setup.o devices.o cgu.o
obj-$(CONFIG_IFXMIPS_ARCAYDIAN_BRNBOOT) += arcaydian.o
obj-$(CONFIG_DANUBE_MACH_ARV452) += mach-arv452.o
obj-$(CONFIG_DANUBE_MACH_EASY50812) += mach-easy50812.o

View file

@ -37,421 +37,3 @@
#include <ifxmips.h>
#include <ifxmips_irq.h>
#define MAX_BOARD_NAME_LEN 32
#define MAX_IFXMIPS_DEVS 9
#define SYSTEM_DANUBE "Danube"
#define SYSTEM_DANUBE_CHIPID1 0x00129083
#define SYSTEM_DANUBE_CHIPID2 0x0012B083
#define SYSTEM_TWINPASS "Twinpass"
#define SYSTEM_TWINPASS_CHIPID 0x0012D083
enum {
EASY50712,
EASY4010,
ARV4519,
ARV452,
};
extern int ifxmips_pci_external_clock;
extern int ifxmips_pci_req_mask;
static unsigned int chiprev;
static int cmdline_mac;
char board_name[MAX_BOARD_NAME_LEN + 1] = { 0 };
struct ifxmips_board {
int type;
char name[32];
unsigned int system_type;
struct platform_device **devs;
struct resource reset_resource;
struct resource gpiodev_resource;
struct gpio_led *ifxmips_leds;
struct gpio_led *gpio_leds;
int pci_external_clock;
int pci_req_mask;
int num_devs;
};
DEFINE_SPINLOCK(ebu_lock);
EXPORT_SYMBOL_GPL(ebu_lock);
extern unsigned char ifxmips_ethaddr[6];
static int ifxmips_brn;
static struct gpio_led_platform_data ifxmips_led_data;
static struct platform_device ifxmips_led = {
.id = 0,
.name = "ifxmips_led",
.dev = {
.platform_data = (void *) &ifxmips_led_data,
}
};
static struct platform_device ifxmips_gpio = {
.id = 0,
.name = "ifxmips_gpio",
.num_resources = 1,
};
static struct platform_device ifxmips_mii = {
.id = 0,
.name = "ifxmips_mii0",
.dev = {
.platform_data = ifxmips_ethaddr,
}
};
static struct platform_device ifxmips_wdt = {
.id = 0,
.name = "ifxmips_wdt",
};
static struct platform_device ifxmips_ebu = {
.id = 0,
.name = "ifxmips_ebu",
};
static struct resource ifxmips_mtd_resource = {
.start = IFXMIPS_FLASH_START,
.end = IFXMIPS_FLASH_START + IFXMIPS_FLASH_MAX - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device ifxmips_mtd = {
.id = 0,
.name = "ifxmips_mtd",
.num_resources = 1,
.resource = &ifxmips_mtd_resource,
};
static struct platform_device ifxmips_gpio_dev = {
.name = "GPIODEV",
.id = -1,
.num_resources = 1,
};
#ifdef CONFIG_LEDS_GPIO
static struct gpio_led arv4519_gpio_leds[] = {
{ .name = "ifx:green:power", .gpio = 3, .active_low = 1, },
{ .name = "ifx:red:power", .gpio = 7, .active_low = 1, },
{ .name = "ifx:green:adsl", .gpio = 4, .active_low = 1, },
{ .name = "ifx:green:internet", .gpio = 5, .active_low = 1, },
{ .name = "ifx:red:internet", .gpio = 8, .active_low = 1, },
{ .name = "ifx:green:wlan", .gpio = 6, .active_low = 1, },
{ .name = "ifx:green:usbpwr", .gpio = 14, .active_low = 1, },
{ .name = "ifx:green:usb", .gpio = 19, .active_low = 1, },
};
static struct gpio_led arv452_gpio_leds[] = {
{ .name = "ifx:blue:power", .gpio = 3, .active_low = 1, },
{ .name = "ifx:blue:adsl", .gpio = 4, .active_low = 1, },
{ .name = "ifx:blue:internet", .gpio = 5, .active_low = 1, },
{ .name = "ifx:red:power", .gpio = 6, .active_low = 1, },
{ .name = "ifx:yello:wps", .gpio = 7, .active_low = 1, },
{ .name = "ifx:red:wps", .gpio = 9, .active_low = 1, },
{ .name = "ifx:blue:voip", .gpio = 32, .active_low = 1, },
{ .name = "ifx:blue:fxs1", .gpio = 33, .active_low = 1, },
{ .name = "ifx:blue:fxs2", .gpio = 34, .active_low = 1, },
{ .name = "ifx:blue:fxo", .gpio = 35, .active_low = 1, },
{ .name = "ifx:blue:voice", .gpio = 36, .active_low = 1, },
{ .name = "ifx:blue:usb", .gpio = 37, .active_low = 1, },
{ .name = "ifx:blue:wlan", .gpio = 38, .active_low = 1, },
{ .name = "ifx:red:internet", .gpio = 41, .active_low = 1, },
};
static struct gpio_led_platform_data ifxmips_gpio_led_data;
static struct platform_device ifxmips_gpio_leds = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = (void *) &ifxmips_gpio_led_data,
}
};
#endif
static struct resource dwc_usb_res[] = {
{
.name = "dwc3884_membase",
.flags = IORESOURCE_MEM,
.start = 0x1E101000,
.end = 0x1E101FFF
},
{
.name = "dwc3884_irq",
.flags = IORESOURCE_IRQ,
.start = IFXMIPS_USB_INT,
}
};
static struct platform_device dwc_usb =
{
.id = 0,
.name = "dwc3884-hcd",
.resource = dwc_usb_res,
.num_resources = ARRAY_SIZE(dwc_usb_res),
};
struct platform_device *easy50712_devs[] = {
&ifxmips_led, &ifxmips_gpio, &ifxmips_mii,
&ifxmips_mtd, &ifxmips_wdt, &ifxmips_gpio_dev, &dwc_usb
};
struct platform_device *easy4010_devs[] = {
&ifxmips_led, &ifxmips_gpio, &ifxmips_mii,
&ifxmips_mtd, &ifxmips_wdt, &ifxmips_gpio_dev, &dwc_usb
};
struct platform_device *arv5419_devs[] = {
&ifxmips_gpio, &ifxmips_mii, &ifxmips_mtd,
&ifxmips_gpio_dev, &ifxmips_wdt, &dwc_usb,
#ifdef CONFIG_LEDS_GPIO
&ifxmips_gpio_leds,
#endif
};
struct platform_device *arv452_devs[] = {
&ifxmips_gpio, &ifxmips_mii, &ifxmips_mtd,
&ifxmips_gpio_dev, &ifxmips_wdt, &dwc_usb,
&ifxmips_ebu,
#ifdef CONFIG_LEDS_GPIO
&ifxmips_gpio_leds,
#endif
};
static struct gpio_led easy50712_leds[] = {
{ .name = "ifx:green:test0", .gpio = 0,},
{ .name = "ifx:green:test1", .gpio = 1,},
{ .name = "ifx:green:test2", .gpio = 2,},
{ .name = "ifx:green:test3", .gpio = 3,},
};
static struct gpio_led easy4010_leds[] = {
{ .name = "ifx:green:test0", .gpio = 0,},
{ .name = "ifx:green:test1", .gpio = 1,},
{ .name = "ifx:green:test2", .gpio = 2,},
{ .name = "ifx:green:test3", .gpio = 3,},
};
static struct ifxmips_board boards[] = {
{
/* infineon eval kit */
.type = EASY50712,
.name = "EASY50712",
.system_type = SYSTEM_DANUBE_CHIPID1,
.devs = easy50712_devs,
.reset_resource = {.name = "reset", .start = 1, .end = 15,},
.gpiodev_resource = { .name = "gpio",
.start = (1 << 0) | (1 << 1),
.end = (1 << 0) | (1 << 1)},
.ifxmips_leds = easy50712_leds,
}, {
/* infineon eval kit */
.type = EASY4010,
.name = "EASY4010",
.system_type = SYSTEM_TWINPASS_CHIPID,
.devs = easy4010_devs,
.reset_resource = {.name = "reset", .start = 1, .end = 15},
.gpiodev_resource = { .name = "gpio",
.start = (1 << 0) | (1 << 1),
.end = (1 << 0) | (1 << 1)},
.ifxmips_leds = easy4010_leds,
}, {
/* arcaydian annex-a board used by thompson, airties, ... */
.type = ARV4519,
.name = "ARV4519",
.system_type = SYSTEM_DANUBE_CHIPID2,
.devs = arv5419_devs,
.reset_resource = {.name = "reset", .start = 1, .end = 14},
.pci_external_clock = 1,
#ifdef CONFIG_LEDS_GPIO
.gpio_leds = arv4519_gpio_leds,
#endif
}, {
/* arcaydian annex-b board used by airties, arcor */
.type = ARV452,
.name = "ARV452",
.system_type = SYSTEM_DANUBE_CHIPID2,
.devs = arv452_devs,
.reset_resource = {.name = "reset", .start = 1, .end = 14},
.pci_external_clock = 1,
#ifdef CONFIG_LEDS_GPIO
.gpio_leds = arv452_gpio_leds,
#endif
},
};
const char *get_system_type(void)
{
chiprev = (ifxmips_r32(IFXMIPS_MPS_CHIPID) & 0x0FFFFFFF);
switch (chiprev) {
case SYSTEM_DANUBE_CHIPID1:
case SYSTEM_DANUBE_CHIPID2:
return SYSTEM_DANUBE;
case SYSTEM_TWINPASS_CHIPID:
return SYSTEM_TWINPASS;
}
return BOARD_SYSTEM_TYPE;
}
static int __init ifxmips_set_board_type(char *str)
{
str = strchr(str, '=');
if (!str)
goto out;
str++;
if (strlen(str) > MAX_BOARD_NAME_LEN)
goto out;
strncpy(board_name, str, MAX_BOARD_NAME_LEN);
printk(KERN_INFO "bootloader told us, that this is a %s board\n",
board_name);
out:
return 1;
}
__setup("ifxmips_board", ifxmips_set_board_type);
static int __init ifxmips_set_ethaddr(char *str)
{
#define IS_HEX(x) \
(((x >= '0' && x <= '9') || (x >= 'a' && x <= 'f') \
|| (x >= 'A' && x <= 'F')) ? (1) : (0))
int i;
str = strchr(str, '=');
if (!str)
goto out;
str++;
if (strlen(str) != 17)
goto out;
for (i = 0; i < 6; i++) {
if (!IS_HEX(str[3 * i]) || !IS_HEX(str[(3 * i) + 1]))
goto out;
if ((i != 5) && (str[(3 * i) + 2] != ':'))
goto out;
ifxmips_ethaddr[i] = simple_strtoul(&str[3 * i], NULL, 16);
}
if (is_valid_ether_addr(ifxmips_ethaddr))
cmdline_mac = 1;
out:
return 1;
}
__setup("ethaddr", ifxmips_set_ethaddr);
int ifxmips_find_brn_block(void)
{
unsigned char temp[8];
memcpy_fromio(temp,
(void *)KSEG1ADDR(IFXMIPS_FLASH_START + 0x800000 - 0x10000), 8);
if (memcmp(temp, "BRN-BOOT", 8) == 0) {
if (!cmdline_mac)
memcpy_fromio(ifxmips_ethaddr,
(void *)KSEG1ADDR(IFXMIPS_FLASH_START +
0x800000 - 0x10000 + 0x16), 6);
if (is_valid_ether_addr(ifxmips_ethaddr))
cmdline_mac = 1;
return 1;
} else {
return 0;
}
}
int ifxmips_has_brn_block(void)
{
return ifxmips_brn;
}
EXPORT_SYMBOL(ifxmips_has_brn_block);
struct ifxmips_board *ifxmips_find_board(void)
{
int i;
if (!*board_name)
return 0;
for (i = 0; i < ARRAY_SIZE(boards); i++)
if ((boards[i].system_type == chiprev) &&
(!strcmp(boards[i].name, board_name)))
return &boards[i];
return 0;
}
int __init ifxmips_init_devices(void)
{
struct ifxmips_board *board;
chiprev = (ifxmips_r32(IFXMIPS_MPS_CHIPID) & 0x0FFFFFFF);
board = ifxmips_find_board();
ifxmips_brn = ifxmips_find_brn_block();
if (!cmdline_mac)
random_ether_addr(ifxmips_ethaddr);
if (!board) {
switch (chiprev) {
case SYSTEM_DANUBE_CHIPID1:
case SYSTEM_DANUBE_CHIPID2:
default:
board = &boards[0];
break;
case SYSTEM_TWINPASS_CHIPID:
board = &boards[1];
break;
}
}
switch (board->type) {
case EASY50712:
board->num_devs = ARRAY_SIZE(easy50712_devs);
ifxmips_led_data.num_leds = ARRAY_SIZE(easy50712_leds);
break;
case EASY4010:
board->num_devs = ARRAY_SIZE(easy4010_devs);
ifxmips_led_data.num_leds = ARRAY_SIZE(easy4010_leds);
break;
case ARV4519:
/* set some sane defaults for the gpios */
gpio_set_value(3, 0);
gpio_set_value(4, 0);
gpio_set_value(5, 0);
gpio_set_value(6, 0);
gpio_set_value(7, 1);
gpio_set_value(8, 1);
gpio_set_value(19, 0);
board->num_devs = ARRAY_SIZE(arv5419_devs);
#ifdef CONFIG_LEDS_GPIO
ifxmips_gpio_led_data.num_leds = ARRAY_SIZE(arv4519_gpio_leds);
#endif
break;
case ARV452:
/* set some sane defaults for the gpios */
board->num_devs = ARRAY_SIZE(arv452_devs);
ifxmips_w32(0x8001e7ff, IFXMIPS_EBU_BUSCON1);
#ifdef CONFIG_LEDS_GPIO
ifxmips_gpio_led_data.num_leds = ARRAY_SIZE(arv452_gpio_leds);
#endif
break;
}
#ifdef CONFIG_LEDS_GPIO
ifxmips_gpio_led_data.leds = board->gpio_leds;
#endif
ifxmips_led_data.leds = board->ifxmips_leds;
printk(KERN_INFO "%s: adding %d devs\n",
__func__, board->num_devs);
ifxmips_gpio.resource = &board->reset_resource;
ifxmips_gpio_dev.resource = &board->gpiodev_resource;
if (board->pci_external_clock)
ifxmips_pci_external_clock = 1;
if (board->pci_req_mask)
ifxmips_pci_req_mask = board->pci_req_mask;
printk(KERN_INFO "using board definition %s\n", board->name);
return platform_add_devices(board->devs, board->num_devs);
}
arch_initcall(ifxmips_init_devices);

View file

@ -8,9 +8,9 @@ enum {
PCI_CLOCK_EXT
};
void __init danube_register_usb(void);
void __init danube_register_ebu_gpio(struct resource *resource, u32 value);
void __init danube_register_ethernet(unsigned char *mac);
void __init danube_register_pci(int clock, int irq_mask);
void __init ar9_register_usb(void);
void __init ar9_register_ebu_gpio(struct resource *resource, u32 value);
void __init ar9_register_ethernet(unsigned char *mac);
void __init ar9_register_pci(int clock, int irq_mask);
#endif

View file

@ -149,19 +149,19 @@ arv452_init(void)
ifxmips_register_gpio();
danube_register_ebu_gpio(&arv452_ebu_resource, ARV452_LATCH_SWITCH);
ar9_register_ebu_gpio(&arv452_ebu_resource, ARV452_LATCH_SWITCH);
ifxmips_register_mtd(&arv452_flash_data);
danube_register_pci(PCI_CLOCK_EXT, 0);
ar9_register_pci(PCI_CLOCK_EXT, 0);
ifxmips_register_wdt();
ifxmips_register_gpio_leds(arv452_leds_gpio, ARRAY_SIZE(arv452_leds_gpio));
danube_register_ethernet(mac);
ar9_register_ethernet(mac);
danube_register_usb();
ar9_register_usb();
}
MIPS_MACHINE(IFXMIPS_MACH_ARV452,

View file

@ -0,0 +1,80 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/leds.h>
#include <linux/gpio.h>
#include <linux/gpio_buttons.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/input.h>
#include <machine.h>
#include <ifxmips_prom.h>
#include "devices.h"
extern unsigned char ifxmips_ethaddr[6];
#ifdef CONFIG_MTD_PARTITIONS
static struct mtd_partition easy50812_partitions[] =
{
{
.name = "uboot",
.offset = 0x0,
.size = 0x40000,
},
{
.name = "uboot_env",
.offset = 0x40000,
.size = 0x10000,
},
{
.name = "kernel",
.offset = 0x0,
.size = 0x0,
},
{
.name = "rootfs",
.offset = 0x0,
.size = 0x0,
}
};
#endif
static struct physmap_flash_data easy50812_flash_data = {
#ifdef CONFIG_MTD_PARTITIONS
.nr_parts = ARRAY_SIZE(easy50812_partitions),
.parts = easy50812_partitions,
#endif
};
static struct gpio_led easy50812_leds[] = {
{ .name = "ifx:green:test0", .gpio = 0,},
{ .name = "ifx:green:test1", .gpio = 1,},
{ .name = "ifx:green:test2", .gpio = 2,},
{ .name = "ifx:green:test3", .gpio = 3,},
};
static void __init
easy50812_init(void)
{
ifxmips_register_gpio();
//printk("ifxmips_register_gpio_dev\n");
//ifxmips_register_gpio_dev();
ifxmips_register_mtd(&easy50812_flash_data);
ifxmips_register_leds(easy50812_leds, ARRAY_SIZE(easy50812_leds));
ifxmips_register_wdt();
ar9_register_ethernet(ifxmips_ethaddr);
ar9_register_usb();
}
MIPS_MACHINE(IFXMIPS_MACH_EASY50812,
"EASY50812",
"Lantiq AR9 Eval Board",
easy50812_init);

View file

@ -9,12 +9,9 @@
#include <ifxmips.h>
#include <ifxmips_cgu.h>
#define SYSTEM_DANUBE "Danube"
#define SYSTEM_DANUBE_CHIPID1 0x00129083
#define SYSTEM_DANUBE_CHIPID2 0x0012B083
#define SYSTEM_TWINPASS "Twinpass"
#define SYSTEM_TWINPASS_CHIPID 0x0012D083
#define SYSTEM_AR9 "AR9"
#define SYSTEM_AR9_CHIPID1 0x00129083
#define SYSTEM_AR9_CHIPID2 0x0012B083
static unsigned int chiprev = 0;
unsigned char ifxmips_sys_type[IFXMIPS_SYS_TYPE_LEN];
@ -58,10 +55,15 @@ ifxmips_machine_power_off(void)
for(;;);
}
static inline u16 get_chip_partnum(void)
{
return (ifxmips_r32(IFXMIPS_MPS_CHIPID) & 0x0FFFF000) >> 12;
}
void __init
ifxmips_soc_setup(void)
{
char *name = SYSTEM_DANUBE;
char *name = SYSTEM_AR9;
ioport_resource.start = IOPORT_RESOURCE_START;
ioport_resource.end = IOPORT_RESOURCE_END;
iomem_resource.start = IOMEM_RESOURCE_START;
@ -71,24 +73,29 @@ ifxmips_soc_setup(void)
_machine_halt = ifxmips_machine_halt;
pm_power_off = ifxmips_machine_power_off;
chiprev = (ifxmips_r32(IFXMIPS_MPS_CHIPID) & 0x0FFFFFFF);
switch (chiprev)
switch (get_chip_partnum())
{
case SYSTEM_DANUBE_CHIPID1:
case SYSTEM_DANUBE_CHIPID2:
name = SYSTEM_DANUBE;
case 0x16C,
name = = "ARX188",
break;
case SYSTEM_TWINPASS_CHIPID:
name = SYSTEM_TWINPASS;
case 0x16D,
name = = "ARX168",
break;
case 0x16F,
name = = "ARX182",
break;
case 0x170,
name = = "GRX188",
break;
case 0x171,
name = = "GRX168",
break;
default:
printk(KERN_ERR "This is not a danube chiprev : 0x%08X\n", chiprev);
printk(KERN_ERR "This is not a AR9 chiprev : 0x%08X\n", get_chip_partnum());
BUG();
break;
}
snprintf(ifxmips_sys_type, IFXMIPS_SYS_TYPE_LEN - 1, "%s rev1.%d %dMhz",
name, ifxmips_get_cpu_ver(),
ifxmips_get_cpu_hz() / 1000000);